1 /*
2 * Copyright 2006 Dave Airlie <airlied@linux.ie>
3 * Copyright © 2006-2007 Intel Corporation
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE.
23 *
24 * Authors:
25 * Eric Anholt <eric@anholt.net>
26 */
27 #include <linux/i2c.h>
28 #include <linux/slab.h>
29 #include <drm/drmP.h>
30 #include <drm/drm_atomic_helper.h>
31 #include <drm/drm_crtc.h>
32 #include "intel_drv.h"
33 #include <drm/i915_drm.h>
34 #include "i915_drv.h"
35 #include "dvo.h"
36
37 #define SIL164_ADDR 0x38
38 #define CH7xxx_ADDR 0x76
39 #define TFP410_ADDR 0x38
40 #define NS2501_ADDR 0x38
41
42 static const struct intel_dvo_device intel_dvo_devices[] = {
43 {
44 .type = INTEL_DVO_CHIP_TMDS,
45 .name = "sil164",
46 .dvo_reg = DVOC,
47 .slave_addr = SIL164_ADDR,
48 .dev_ops = &sil164_ops,
49 },
50 {
51 .type = INTEL_DVO_CHIP_TMDS,
52 .name = "ch7xxx",
53 .dvo_reg = DVOC,
54 .slave_addr = CH7xxx_ADDR,
55 .dev_ops = &ch7xxx_ops,
56 },
57 {
58 .type = INTEL_DVO_CHIP_TMDS,
59 .name = "ch7xxx",
60 .dvo_reg = DVOC,
61 .slave_addr = 0x75, /* For some ch7010 */
62 .dev_ops = &ch7xxx_ops,
63 },
64 {
65 .type = INTEL_DVO_CHIP_LVDS,
66 .name = "ivch",
67 .dvo_reg = DVOA,
68 .slave_addr = 0x02, /* Might also be 0x44, 0x84, 0xc4 */
69 .dev_ops = &ivch_ops,
70 },
71 {
72 .type = INTEL_DVO_CHIP_TMDS,
73 .name = "tfp410",
74 .dvo_reg = DVOC,
75 .slave_addr = TFP410_ADDR,
76 .dev_ops = &tfp410_ops,
77 },
78 {
79 .type = INTEL_DVO_CHIP_LVDS,
80 .name = "ch7017",
81 .dvo_reg = DVOC,
82 .slave_addr = 0x75,
83 .gpio = GMBUS_PORT_DPB,
84 .dev_ops = &ch7017_ops,
85 },
86 {
87 .type = INTEL_DVO_CHIP_TMDS,
88 .name = "ns2501",
89 .dvo_reg = DVOB,
90 .slave_addr = NS2501_ADDR,
91 .dev_ops = &ns2501_ops,
92 }
93 };
94
95 struct intel_dvo {
96 struct intel_encoder base;
97
98 struct intel_dvo_device dev;
99
100 struct drm_display_mode *panel_fixed_mode;
101 bool panel_wants_dither;
102 };
103
enc_to_dvo(struct intel_encoder * encoder)104 static struct intel_dvo *enc_to_dvo(struct intel_encoder *encoder)
105 {
106 return container_of(encoder, struct intel_dvo, base);
107 }
108
intel_attached_dvo(struct drm_connector * connector)109 static struct intel_dvo *intel_attached_dvo(struct drm_connector *connector)
110 {
111 return enc_to_dvo(intel_attached_encoder(connector));
112 }
113
intel_dvo_connector_get_hw_state(struct intel_connector * connector)114 static bool intel_dvo_connector_get_hw_state(struct intel_connector *connector)
115 {
116 struct drm_device *dev = connector->base.dev;
117 struct drm_i915_private *dev_priv = dev->dev_private;
118 struct intel_dvo *intel_dvo = intel_attached_dvo(&connector->base);
119 u32 tmp;
120
121 tmp = I915_READ(intel_dvo->dev.dvo_reg);
122
123 if (!(tmp & DVO_ENABLE))
124 return false;
125
126 return intel_dvo->dev.dev_ops->get_hw_state(&intel_dvo->dev);
127 }
128
intel_dvo_get_hw_state(struct intel_encoder * encoder,enum pipe * pipe)129 static bool intel_dvo_get_hw_state(struct intel_encoder *encoder,
130 enum pipe *pipe)
131 {
132 struct drm_device *dev = encoder->base.dev;
133 struct drm_i915_private *dev_priv = dev->dev_private;
134 struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
135 u32 tmp;
136
137 tmp = I915_READ(intel_dvo->dev.dvo_reg);
138
139 if (!(tmp & DVO_ENABLE))
140 return false;
141
142 *pipe = PORT_TO_PIPE(tmp);
143
144 return true;
145 }
146
intel_dvo_get_config(struct intel_encoder * encoder,struct intel_crtc_state * pipe_config)147 static void intel_dvo_get_config(struct intel_encoder *encoder,
148 struct intel_crtc_state *pipe_config)
149 {
150 struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;
151 struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
152 u32 tmp, flags = 0;
153
154 tmp = I915_READ(intel_dvo->dev.dvo_reg);
155 if (tmp & DVO_HSYNC_ACTIVE_HIGH)
156 flags |= DRM_MODE_FLAG_PHSYNC;
157 else
158 flags |= DRM_MODE_FLAG_NHSYNC;
159 if (tmp & DVO_VSYNC_ACTIVE_HIGH)
160 flags |= DRM_MODE_FLAG_PVSYNC;
161 else
162 flags |= DRM_MODE_FLAG_NVSYNC;
163
164 pipe_config->base.adjusted_mode.flags |= flags;
165
166 pipe_config->base.adjusted_mode.crtc_clock = pipe_config->port_clock;
167 }
168
intel_disable_dvo(struct intel_encoder * encoder)169 static void intel_disable_dvo(struct intel_encoder *encoder)
170 {
171 struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;
172 struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
173 u32 dvo_reg = intel_dvo->dev.dvo_reg;
174 u32 temp = I915_READ(dvo_reg);
175
176 intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, false);
177 I915_WRITE(dvo_reg, temp & ~DVO_ENABLE);
178 I915_READ(dvo_reg);
179 }
180
intel_enable_dvo(struct intel_encoder * encoder)181 static void intel_enable_dvo(struct intel_encoder *encoder)
182 {
183 struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;
184 struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
185 struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc);
186 u32 dvo_reg = intel_dvo->dev.dvo_reg;
187 u32 temp = I915_READ(dvo_reg);
188
189 intel_dvo->dev.dev_ops->mode_set(&intel_dvo->dev,
190 &crtc->config->base.mode,
191 &crtc->config->base.adjusted_mode);
192
193 I915_WRITE(dvo_reg, temp | DVO_ENABLE);
194 I915_READ(dvo_reg);
195
196 intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, true);
197 }
198
199 /* Special dpms function to support cloning between dvo/sdvo/crt. */
intel_dvo_dpms(struct drm_connector * connector,int mode)200 static void intel_dvo_dpms(struct drm_connector *connector, int mode)
201 {
202 struct intel_dvo *intel_dvo = intel_attached_dvo(connector);
203 struct drm_crtc *crtc;
204 struct intel_crtc_state *config;
205
206 /* dvo supports only 2 dpms states. */
207 if (mode != DRM_MODE_DPMS_ON)
208 mode = DRM_MODE_DPMS_OFF;
209
210 if (mode == connector->dpms)
211 return;
212
213 connector->dpms = mode;
214
215 /* Only need to change hw state when actually enabled */
216 crtc = intel_dvo->base.base.crtc;
217 if (!crtc) {
218 intel_dvo->base.connectors_active = false;
219 return;
220 }
221
222 /* We call connector dpms manually below in case pipe dpms doesn't
223 * change due to cloning. */
224 if (mode == DRM_MODE_DPMS_ON) {
225 config = to_intel_crtc(crtc)->config;
226
227 intel_dvo->base.connectors_active = true;
228
229 intel_crtc_update_dpms(crtc);
230
231 intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, true);
232 } else {
233 intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, false);
234
235 intel_dvo->base.connectors_active = false;
236
237 intel_crtc_update_dpms(crtc);
238 }
239
240 intel_modeset_check_state(connector->dev);
241 }
242
243 static enum drm_mode_status
intel_dvo_mode_valid(struct drm_connector * connector,struct drm_display_mode * mode)244 intel_dvo_mode_valid(struct drm_connector *connector,
245 struct drm_display_mode *mode)
246 {
247 struct intel_dvo *intel_dvo = intel_attached_dvo(connector);
248
249 if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
250 return MODE_NO_DBLESCAN;
251
252 /* XXX: Validate clock range */
253
254 if (intel_dvo->panel_fixed_mode) {
255 if (mode->hdisplay > intel_dvo->panel_fixed_mode->hdisplay)
256 return MODE_PANEL;
257 if (mode->vdisplay > intel_dvo->panel_fixed_mode->vdisplay)
258 return MODE_PANEL;
259 }
260
261 return intel_dvo->dev.dev_ops->mode_valid(&intel_dvo->dev, mode);
262 }
263
intel_dvo_compute_config(struct intel_encoder * encoder,struct intel_crtc_state * pipe_config)264 static bool intel_dvo_compute_config(struct intel_encoder *encoder,
265 struct intel_crtc_state *pipe_config)
266 {
267 struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
268 struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;
269
270 /* If we have timings from the BIOS for the panel, put them in
271 * to the adjusted mode. The CRTC will be set up for this mode,
272 * with the panel scaling set up to source from the H/VDisplay
273 * of the original mode.
274 */
275 if (intel_dvo->panel_fixed_mode != NULL) {
276 #define C(x) adjusted_mode->x = intel_dvo->panel_fixed_mode->x
277 C(hdisplay);
278 C(hsync_start);
279 C(hsync_end);
280 C(htotal);
281 C(vdisplay);
282 C(vsync_start);
283 C(vsync_end);
284 C(vtotal);
285 C(clock);
286 #undef C
287
288 drm_mode_set_crtcinfo(adjusted_mode, 0);
289 }
290
291 return true;
292 }
293
intel_dvo_pre_enable(struct intel_encoder * encoder)294 static void intel_dvo_pre_enable(struct intel_encoder *encoder)
295 {
296 struct drm_device *dev = encoder->base.dev;
297 struct drm_i915_private *dev_priv = dev->dev_private;
298 struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc);
299 struct drm_display_mode *adjusted_mode = &crtc->config->base.adjusted_mode;
300 struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
301 int pipe = crtc->pipe;
302 u32 dvo_val;
303 u32 dvo_reg = intel_dvo->dev.dvo_reg, dvo_srcdim_reg;
304
305 switch (dvo_reg) {
306 case DVOA:
307 default:
308 dvo_srcdim_reg = DVOA_SRCDIM;
309 break;
310 case DVOB:
311 dvo_srcdim_reg = DVOB_SRCDIM;
312 break;
313 case DVOC:
314 dvo_srcdim_reg = DVOC_SRCDIM;
315 break;
316 }
317
318 /* Save the data order, since I don't know what it should be set to. */
319 dvo_val = I915_READ(dvo_reg) &
320 (DVO_PRESERVE_MASK | DVO_DATA_ORDER_GBRG);
321 dvo_val |= DVO_DATA_ORDER_FP | DVO_BORDER_ENABLE |
322 DVO_BLANK_ACTIVE_HIGH;
323
324 if (pipe == 1)
325 dvo_val |= DVO_PIPE_B_SELECT;
326 dvo_val |= DVO_PIPE_STALL;
327 if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
328 dvo_val |= DVO_HSYNC_ACTIVE_HIGH;
329 if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC)
330 dvo_val |= DVO_VSYNC_ACTIVE_HIGH;
331
332 /*I915_WRITE(DVOB_SRCDIM,
333 (adjusted_mode->hdisplay << DVO_SRCDIM_HORIZONTAL_SHIFT) |
334 (adjusted_mode->VDisplay << DVO_SRCDIM_VERTICAL_SHIFT));*/
335 I915_WRITE(dvo_srcdim_reg,
336 (adjusted_mode->hdisplay << DVO_SRCDIM_HORIZONTAL_SHIFT) |
337 (adjusted_mode->vdisplay << DVO_SRCDIM_VERTICAL_SHIFT));
338 /*I915_WRITE(DVOB, dvo_val);*/
339 I915_WRITE(dvo_reg, dvo_val);
340 }
341
342 /**
343 * Detect the output connection on our DVO device.
344 *
345 * Unimplemented.
346 */
347 static enum drm_connector_status
intel_dvo_detect(struct drm_connector * connector,bool force)348 intel_dvo_detect(struct drm_connector *connector, bool force)
349 {
350 struct intel_dvo *intel_dvo = intel_attached_dvo(connector);
351 DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
352 connector->base.id, connector->name);
353 return intel_dvo->dev.dev_ops->detect(&intel_dvo->dev);
354 }
355
intel_dvo_get_modes(struct drm_connector * connector)356 static int intel_dvo_get_modes(struct drm_connector *connector)
357 {
358 struct intel_dvo *intel_dvo = intel_attached_dvo(connector);
359 struct drm_i915_private *dev_priv = connector->dev->dev_private;
360
361 /* We should probably have an i2c driver get_modes function for those
362 * devices which will have a fixed set of modes determined by the chip
363 * (TV-out, for example), but for now with just TMDS and LVDS,
364 * that's not the case.
365 */
366 intel_ddc_get_modes(connector,
367 intel_gmbus_get_adapter(dev_priv, GMBUS_PORT_DPC));
368 if (!list_empty(&connector->probed_modes))
369 return 1;
370
371 if (intel_dvo->panel_fixed_mode != NULL) {
372 struct drm_display_mode *mode;
373 mode = drm_mode_duplicate(connector->dev, intel_dvo->panel_fixed_mode);
374 if (mode) {
375 drm_mode_probed_add(connector, mode);
376 return 1;
377 }
378 }
379
380 return 0;
381 }
382
intel_dvo_destroy(struct drm_connector * connector)383 static void intel_dvo_destroy(struct drm_connector *connector)
384 {
385 drm_connector_cleanup(connector);
386 kfree(connector);
387 }
388
389 static const struct drm_connector_funcs intel_dvo_connector_funcs = {
390 .dpms = intel_dvo_dpms,
391 .detect = intel_dvo_detect,
392 .destroy = intel_dvo_destroy,
393 .fill_modes = drm_helper_probe_single_connector_modes,
394 .atomic_get_property = intel_connector_atomic_get_property,
395 .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
396 .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
397 };
398
399 static const struct drm_connector_helper_funcs intel_dvo_connector_helper_funcs = {
400 .mode_valid = intel_dvo_mode_valid,
401 .get_modes = intel_dvo_get_modes,
402 .best_encoder = intel_best_encoder,
403 };
404
intel_dvo_enc_destroy(struct drm_encoder * encoder)405 static void intel_dvo_enc_destroy(struct drm_encoder *encoder)
406 {
407 struct intel_dvo *intel_dvo = enc_to_dvo(to_intel_encoder(encoder));
408
409 if (intel_dvo->dev.dev_ops->destroy)
410 intel_dvo->dev.dev_ops->destroy(&intel_dvo->dev);
411
412 kfree(intel_dvo->panel_fixed_mode);
413
414 intel_encoder_destroy(encoder);
415 }
416
417 static const struct drm_encoder_funcs intel_dvo_enc_funcs = {
418 .destroy = intel_dvo_enc_destroy,
419 };
420
421 /**
422 * Attempts to get a fixed panel timing for LVDS (currently only the i830).
423 *
424 * Other chips with DVO LVDS will need to extend this to deal with the LVDS
425 * chip being on DVOB/C and having multiple pipes.
426 */
427 static struct drm_display_mode *
intel_dvo_get_current_mode(struct drm_connector * connector)428 intel_dvo_get_current_mode(struct drm_connector *connector)
429 {
430 struct drm_device *dev = connector->dev;
431 struct drm_i915_private *dev_priv = dev->dev_private;
432 struct intel_dvo *intel_dvo = intel_attached_dvo(connector);
433 uint32_t dvo_val = I915_READ(intel_dvo->dev.dvo_reg);
434 struct drm_display_mode *mode = NULL;
435
436 /* If the DVO port is active, that'll be the LVDS, so we can pull out
437 * its timings to get how the BIOS set up the panel.
438 */
439 if (dvo_val & DVO_ENABLE) {
440 struct drm_crtc *crtc;
441 int pipe = (dvo_val & DVO_PIPE_B_SELECT) ? 1 : 0;
442
443 crtc = intel_get_crtc_for_pipe(dev, pipe);
444 if (crtc) {
445 mode = intel_crtc_mode_get(dev, crtc);
446 if (mode) {
447 mode->type |= DRM_MODE_TYPE_PREFERRED;
448 if (dvo_val & DVO_HSYNC_ACTIVE_HIGH)
449 mode->flags |= DRM_MODE_FLAG_PHSYNC;
450 if (dvo_val & DVO_VSYNC_ACTIVE_HIGH)
451 mode->flags |= DRM_MODE_FLAG_PVSYNC;
452 }
453 }
454 }
455
456 return mode;
457 }
458
intel_dvo_init(struct drm_device * dev)459 void intel_dvo_init(struct drm_device *dev)
460 {
461 struct drm_i915_private *dev_priv = dev->dev_private;
462 struct intel_encoder *intel_encoder;
463 struct intel_dvo *intel_dvo;
464 struct intel_connector *intel_connector;
465 int i;
466 int encoder_type = DRM_MODE_ENCODER_NONE;
467
468 intel_dvo = kzalloc(sizeof(*intel_dvo), GFP_KERNEL);
469 if (!intel_dvo)
470 return;
471
472 intel_connector = intel_connector_alloc();
473 if (!intel_connector) {
474 kfree(intel_dvo);
475 return;
476 }
477
478 intel_encoder = &intel_dvo->base;
479 drm_encoder_init(dev, &intel_encoder->base,
480 &intel_dvo_enc_funcs, encoder_type);
481
482 intel_encoder->disable = intel_disable_dvo;
483 intel_encoder->enable = intel_enable_dvo;
484 intel_encoder->get_hw_state = intel_dvo_get_hw_state;
485 intel_encoder->get_config = intel_dvo_get_config;
486 intel_encoder->compute_config = intel_dvo_compute_config;
487 intel_encoder->pre_enable = intel_dvo_pre_enable;
488 intel_connector->get_hw_state = intel_dvo_connector_get_hw_state;
489 intel_connector->unregister = intel_connector_unregister;
490
491 /* Now, try to find a controller */
492 for (i = 0; i < ARRAY_SIZE(intel_dvo_devices); i++) {
493 struct drm_connector *connector = &intel_connector->base;
494 const struct intel_dvo_device *dvo = &intel_dvo_devices[i];
495 struct i2c_adapter *i2c;
496 int gpio;
497 bool dvoinit;
498
499 /* Allow the I2C driver info to specify the GPIO to be used in
500 * special cases, but otherwise default to what's defined
501 * in the spec.
502 */
503 if (intel_gmbus_is_port_valid(dvo->gpio))
504 gpio = dvo->gpio;
505 else if (dvo->type == INTEL_DVO_CHIP_LVDS)
506 gpio = GMBUS_PORT_SSC;
507 else
508 gpio = GMBUS_PORT_DPB;
509
510 /* Set up the I2C bus necessary for the chip we're probing.
511 * It appears that everything is on GPIOE except for panels
512 * on i830 laptops, which are on GPIOB (DVOA).
513 */
514 i2c = intel_gmbus_get_adapter(dev_priv, gpio);
515
516 intel_dvo->dev = *dvo;
517
518 /* GMBUS NAK handling seems to be unstable, hence let the
519 * transmitter detection run in bit banging mode for now.
520 */
521 intel_gmbus_force_bit(i2c, true);
522
523 dvoinit = dvo->dev_ops->init(&intel_dvo->dev, i2c);
524
525 intel_gmbus_force_bit(i2c, false);
526
527 if (!dvoinit)
528 continue;
529
530 intel_encoder->type = INTEL_OUTPUT_DVO;
531 intel_encoder->crtc_mask = (1 << 0) | (1 << 1);
532 switch (dvo->type) {
533 case INTEL_DVO_CHIP_TMDS:
534 intel_encoder->cloneable = (1 << INTEL_OUTPUT_ANALOG) |
535 (1 << INTEL_OUTPUT_DVO);
536 drm_connector_init(dev, connector,
537 &intel_dvo_connector_funcs,
538 DRM_MODE_CONNECTOR_DVII);
539 encoder_type = DRM_MODE_ENCODER_TMDS;
540 break;
541 case INTEL_DVO_CHIP_LVDS:
542 intel_encoder->cloneable = 0;
543 drm_connector_init(dev, connector,
544 &intel_dvo_connector_funcs,
545 DRM_MODE_CONNECTOR_LVDS);
546 encoder_type = DRM_MODE_ENCODER_LVDS;
547 break;
548 }
549
550 drm_connector_helper_add(connector,
551 &intel_dvo_connector_helper_funcs);
552 connector->display_info.subpixel_order = SubPixelHorizontalRGB;
553 connector->interlace_allowed = false;
554 connector->doublescan_allowed = false;
555
556 intel_connector_attach_encoder(intel_connector, intel_encoder);
557 if (dvo->type == INTEL_DVO_CHIP_LVDS) {
558 /* For our LVDS chipsets, we should hopefully be able
559 * to dig the fixed panel mode out of the BIOS data.
560 * However, it's in a different format from the BIOS
561 * data on chipsets with integrated LVDS (stored in AIM
562 * headers, likely), so for now, just get the current
563 * mode being output through DVO.
564 */
565 intel_dvo->panel_fixed_mode =
566 intel_dvo_get_current_mode(connector);
567 intel_dvo->panel_wants_dither = true;
568 }
569
570 drm_connector_register(connector);
571 return;
572 }
573
574 drm_encoder_cleanup(&intel_encoder->base);
575 kfree(intel_dvo);
576 kfree(intel_connector);
577 }
578