1 /*
2 * Copyright © 2009 - Maxim Levitsky
3 * driver for Ricoh xD readers
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
8 */
9
10 #include <linux/kernel.h>
11 #include <linux/module.h>
12 #include <linux/jiffies.h>
13 #include <linux/workqueue.h>
14 #include <linux/interrupt.h>
15 #include <linux/pci.h>
16 #include <linux/pci_ids.h>
17 #include <linux/delay.h>
18 #include <linux/slab.h>
19 #include <asm/byteorder.h>
20 #include <linux/sched.h>
21 #include "sm_common.h"
22 #include "r852.h"
23
24
25 static bool r852_enable_dma = 1;
26 module_param(r852_enable_dma, bool, S_IRUGO);
27 MODULE_PARM_DESC(r852_enable_dma, "Enable usage of the DMA (default)");
28
29 static int debug;
30 module_param(debug, int, S_IRUGO | S_IWUSR);
31 MODULE_PARM_DESC(debug, "Debug level (0-2)");
32
33 /* read register */
r852_read_reg(struct r852_device * dev,int address)34 static inline uint8_t r852_read_reg(struct r852_device *dev, int address)
35 {
36 uint8_t reg = readb(dev->mmio + address);
37 return reg;
38 }
39
40 /* write register */
r852_write_reg(struct r852_device * dev,int address,uint8_t value)41 static inline void r852_write_reg(struct r852_device *dev,
42 int address, uint8_t value)
43 {
44 writeb(value, dev->mmio + address);
45 mmiowb();
46 }
47
48
49 /* read dword sized register */
r852_read_reg_dword(struct r852_device * dev,int address)50 static inline uint32_t r852_read_reg_dword(struct r852_device *dev, int address)
51 {
52 uint32_t reg = le32_to_cpu(readl(dev->mmio + address));
53 return reg;
54 }
55
56 /* write dword sized register */
r852_write_reg_dword(struct r852_device * dev,int address,uint32_t value)57 static inline void r852_write_reg_dword(struct r852_device *dev,
58 int address, uint32_t value)
59 {
60 writel(cpu_to_le32(value), dev->mmio + address);
61 mmiowb();
62 }
63
64 /* returns pointer to our private structure */
r852_get_dev(struct mtd_info * mtd)65 static inline struct r852_device *r852_get_dev(struct mtd_info *mtd)
66 {
67 struct nand_chip *chip = mtd->priv;
68 return chip->priv;
69 }
70
71
72 /* check if controller supports dma */
r852_dma_test(struct r852_device * dev)73 static void r852_dma_test(struct r852_device *dev)
74 {
75 dev->dma_usable = (r852_read_reg(dev, R852_DMA_CAP) &
76 (R852_DMA1 | R852_DMA2)) == (R852_DMA1 | R852_DMA2);
77
78 if (!dev->dma_usable)
79 message("Non dma capable device detected, dma disabled");
80
81 if (!r852_enable_dma) {
82 message("disabling dma on user request");
83 dev->dma_usable = 0;
84 }
85 }
86
87 /*
88 * Enable dma. Enables ether first or second stage of the DMA,
89 * Expects dev->dma_dir and dev->dma_state be set
90 */
r852_dma_enable(struct r852_device * dev)91 static void r852_dma_enable(struct r852_device *dev)
92 {
93 uint8_t dma_reg, dma_irq_reg;
94
95 /* Set up dma settings */
96 dma_reg = r852_read_reg_dword(dev, R852_DMA_SETTINGS);
97 dma_reg &= ~(R852_DMA_READ | R852_DMA_INTERNAL | R852_DMA_MEMORY);
98
99 if (dev->dma_dir)
100 dma_reg |= R852_DMA_READ;
101
102 if (dev->dma_state == DMA_INTERNAL) {
103 dma_reg |= R852_DMA_INTERNAL;
104 /* Precaution to make sure HW doesn't write */
105 /* to random kernel memory */
106 r852_write_reg_dword(dev, R852_DMA_ADDR,
107 cpu_to_le32(dev->phys_bounce_buffer));
108 } else {
109 dma_reg |= R852_DMA_MEMORY;
110 r852_write_reg_dword(dev, R852_DMA_ADDR,
111 cpu_to_le32(dev->phys_dma_addr));
112 }
113
114 /* Precaution: make sure write reached the device */
115 r852_read_reg_dword(dev, R852_DMA_ADDR);
116
117 r852_write_reg_dword(dev, R852_DMA_SETTINGS, dma_reg);
118
119 /* Set dma irq */
120 dma_irq_reg = r852_read_reg_dword(dev, R852_DMA_IRQ_ENABLE);
121 r852_write_reg_dword(dev, R852_DMA_IRQ_ENABLE,
122 dma_irq_reg |
123 R852_DMA_IRQ_INTERNAL |
124 R852_DMA_IRQ_ERROR |
125 R852_DMA_IRQ_MEMORY);
126 }
127
128 /*
129 * Disable dma, called from the interrupt handler, which specifies
130 * success of the operation via 'error' argument
131 */
r852_dma_done(struct r852_device * dev,int error)132 static void r852_dma_done(struct r852_device *dev, int error)
133 {
134 WARN_ON(dev->dma_stage == 0);
135
136 r852_write_reg_dword(dev, R852_DMA_IRQ_STA,
137 r852_read_reg_dword(dev, R852_DMA_IRQ_STA));
138
139 r852_write_reg_dword(dev, R852_DMA_SETTINGS, 0);
140 r852_write_reg_dword(dev, R852_DMA_IRQ_ENABLE, 0);
141
142 /* Precaution to make sure HW doesn't write to random kernel memory */
143 r852_write_reg_dword(dev, R852_DMA_ADDR,
144 cpu_to_le32(dev->phys_bounce_buffer));
145 r852_read_reg_dword(dev, R852_DMA_ADDR);
146
147 dev->dma_error = error;
148 dev->dma_stage = 0;
149
150 if (dev->phys_dma_addr && dev->phys_dma_addr != dev->phys_bounce_buffer)
151 pci_unmap_single(dev->pci_dev, dev->phys_dma_addr, R852_DMA_LEN,
152 dev->dma_dir ? PCI_DMA_FROMDEVICE : PCI_DMA_TODEVICE);
153 }
154
155 /*
156 * Wait, till dma is done, which includes both phases of it
157 */
r852_dma_wait(struct r852_device * dev)158 static int r852_dma_wait(struct r852_device *dev)
159 {
160 long timeout = wait_for_completion_timeout(&dev->dma_done,
161 msecs_to_jiffies(1000));
162 if (!timeout) {
163 dbg("timeout waiting for DMA interrupt");
164 return -ETIMEDOUT;
165 }
166
167 return 0;
168 }
169
170 /*
171 * Read/Write one page using dma. Only pages can be read (512 bytes)
172 */
r852_do_dma(struct r852_device * dev,uint8_t * buf,int do_read)173 static void r852_do_dma(struct r852_device *dev, uint8_t *buf, int do_read)
174 {
175 int bounce = 0;
176 unsigned long flags;
177 int error;
178
179 dev->dma_error = 0;
180
181 /* Set dma direction */
182 dev->dma_dir = do_read;
183 dev->dma_stage = 1;
184 reinit_completion(&dev->dma_done);
185
186 dbg_verbose("doing dma %s ", do_read ? "read" : "write");
187
188 /* Set initial dma state: for reading first fill on board buffer,
189 from device, for writes first fill the buffer from memory*/
190 dev->dma_state = do_read ? DMA_INTERNAL : DMA_MEMORY;
191
192 /* if incoming buffer is not page aligned, we should do bounce */
193 if ((unsigned long)buf & (R852_DMA_LEN-1))
194 bounce = 1;
195
196 if (!bounce) {
197 dev->phys_dma_addr = pci_map_single(dev->pci_dev, (void *)buf,
198 R852_DMA_LEN,
199 (do_read ? PCI_DMA_FROMDEVICE : PCI_DMA_TODEVICE));
200
201 if (pci_dma_mapping_error(dev->pci_dev, dev->phys_dma_addr))
202 bounce = 1;
203 }
204
205 if (bounce) {
206 dbg_verbose("dma: using bounce buffer");
207 dev->phys_dma_addr = dev->phys_bounce_buffer;
208 if (!do_read)
209 memcpy(dev->bounce_buffer, buf, R852_DMA_LEN);
210 }
211
212 /* Enable DMA */
213 spin_lock_irqsave(&dev->irqlock, flags);
214 r852_dma_enable(dev);
215 spin_unlock_irqrestore(&dev->irqlock, flags);
216
217 /* Wait till complete */
218 error = r852_dma_wait(dev);
219
220 if (error) {
221 r852_dma_done(dev, error);
222 return;
223 }
224
225 if (do_read && bounce)
226 memcpy((void *)buf, dev->bounce_buffer, R852_DMA_LEN);
227 }
228
229 /*
230 * Program data lines of the nand chip to send data to it
231 */
r852_write_buf(struct mtd_info * mtd,const uint8_t * buf,int len)232 static void r852_write_buf(struct mtd_info *mtd, const uint8_t *buf, int len)
233 {
234 struct r852_device *dev = r852_get_dev(mtd);
235 uint32_t reg;
236
237 /* Don't allow any access to hardware if we suspect card removal */
238 if (dev->card_unstable)
239 return;
240
241 /* Special case for whole sector read */
242 if (len == R852_DMA_LEN && dev->dma_usable) {
243 r852_do_dma(dev, (uint8_t *)buf, 0);
244 return;
245 }
246
247 /* write DWORD chinks - faster */
248 while (len >= 4) {
249 reg = buf[0] | buf[1] << 8 | buf[2] << 16 | buf[3] << 24;
250 r852_write_reg_dword(dev, R852_DATALINE, reg);
251 buf += 4;
252 len -= 4;
253
254 }
255
256 /* write rest */
257 while (len > 0) {
258 r852_write_reg(dev, R852_DATALINE, *buf++);
259 len--;
260 }
261 }
262
263 /*
264 * Read data lines of the nand chip to retrieve data
265 */
r852_read_buf(struct mtd_info * mtd,uint8_t * buf,int len)266 static void r852_read_buf(struct mtd_info *mtd, uint8_t *buf, int len)
267 {
268 struct r852_device *dev = r852_get_dev(mtd);
269 uint32_t reg;
270
271 if (dev->card_unstable) {
272 /* since we can't signal error here, at least, return
273 predictable buffer */
274 memset(buf, 0, len);
275 return;
276 }
277
278 /* special case for whole sector read */
279 if (len == R852_DMA_LEN && dev->dma_usable) {
280 r852_do_dma(dev, buf, 1);
281 return;
282 }
283
284 /* read in dword sized chunks */
285 while (len >= 4) {
286
287 reg = r852_read_reg_dword(dev, R852_DATALINE);
288 *buf++ = reg & 0xFF;
289 *buf++ = (reg >> 8) & 0xFF;
290 *buf++ = (reg >> 16) & 0xFF;
291 *buf++ = (reg >> 24) & 0xFF;
292 len -= 4;
293 }
294
295 /* read the reset by bytes */
296 while (len--)
297 *buf++ = r852_read_reg(dev, R852_DATALINE);
298 }
299
300 /*
301 * Read one byte from nand chip
302 */
r852_read_byte(struct mtd_info * mtd)303 static uint8_t r852_read_byte(struct mtd_info *mtd)
304 {
305 struct r852_device *dev = r852_get_dev(mtd);
306
307 /* Same problem as in r852_read_buf.... */
308 if (dev->card_unstable)
309 return 0;
310
311 return r852_read_reg(dev, R852_DATALINE);
312 }
313
314 /*
315 * Control several chip lines & send commands
316 */
r852_cmdctl(struct mtd_info * mtd,int dat,unsigned int ctrl)317 static void r852_cmdctl(struct mtd_info *mtd, int dat, unsigned int ctrl)
318 {
319 struct r852_device *dev = r852_get_dev(mtd);
320
321 if (dev->card_unstable)
322 return;
323
324 if (ctrl & NAND_CTRL_CHANGE) {
325
326 dev->ctlreg &= ~(R852_CTL_DATA | R852_CTL_COMMAND |
327 R852_CTL_ON | R852_CTL_CARDENABLE);
328
329 if (ctrl & NAND_ALE)
330 dev->ctlreg |= R852_CTL_DATA;
331
332 if (ctrl & NAND_CLE)
333 dev->ctlreg |= R852_CTL_COMMAND;
334
335 if (ctrl & NAND_NCE)
336 dev->ctlreg |= (R852_CTL_CARDENABLE | R852_CTL_ON);
337 else
338 dev->ctlreg &= ~R852_CTL_WRITE;
339
340 /* when write is stareted, enable write access */
341 if (dat == NAND_CMD_ERASE1)
342 dev->ctlreg |= R852_CTL_WRITE;
343
344 r852_write_reg(dev, R852_CTL, dev->ctlreg);
345 }
346
347 /* HACK: NAND_CMD_SEQIN is called without NAND_CTRL_CHANGE, but we need
348 to set write mode */
349 if (dat == NAND_CMD_SEQIN && (dev->ctlreg & R852_CTL_COMMAND)) {
350 dev->ctlreg |= R852_CTL_WRITE;
351 r852_write_reg(dev, R852_CTL, dev->ctlreg);
352 }
353
354 if (dat != NAND_CMD_NONE)
355 r852_write_reg(dev, R852_DATALINE, dat);
356 }
357
358 /*
359 * Wait till card is ready.
360 * based on nand_wait, but returns errors on DMA error
361 */
r852_wait(struct mtd_info * mtd,struct nand_chip * chip)362 static int r852_wait(struct mtd_info *mtd, struct nand_chip *chip)
363 {
364 struct r852_device *dev = chip->priv;
365
366 unsigned long timeout;
367 int status;
368
369 timeout = jiffies + (chip->state == FL_ERASING ?
370 msecs_to_jiffies(400) : msecs_to_jiffies(20));
371
372 while (time_before(jiffies, timeout))
373 if (chip->dev_ready(mtd))
374 break;
375
376 chip->cmdfunc(mtd, NAND_CMD_STATUS, -1, -1);
377 status = (int)chip->read_byte(mtd);
378
379 /* Unfortunelly, no way to send detailed error status... */
380 if (dev->dma_error) {
381 status |= NAND_STATUS_FAIL;
382 dev->dma_error = 0;
383 }
384 return status;
385 }
386
387 /*
388 * Check if card is ready
389 */
390
r852_ready(struct mtd_info * mtd)391 static int r852_ready(struct mtd_info *mtd)
392 {
393 struct r852_device *dev = r852_get_dev(mtd);
394 return !(r852_read_reg(dev, R852_CARD_STA) & R852_CARD_STA_BUSY);
395 }
396
397
398 /*
399 * Set ECC engine mode
400 */
401
r852_ecc_hwctl(struct mtd_info * mtd,int mode)402 static void r852_ecc_hwctl(struct mtd_info *mtd, int mode)
403 {
404 struct r852_device *dev = r852_get_dev(mtd);
405
406 if (dev->card_unstable)
407 return;
408
409 switch (mode) {
410 case NAND_ECC_READ:
411 case NAND_ECC_WRITE:
412 /* enable ecc generation/check*/
413 dev->ctlreg |= R852_CTL_ECC_ENABLE;
414
415 /* flush ecc buffer */
416 r852_write_reg(dev, R852_CTL,
417 dev->ctlreg | R852_CTL_ECC_ACCESS);
418
419 r852_read_reg_dword(dev, R852_DATALINE);
420 r852_write_reg(dev, R852_CTL, dev->ctlreg);
421 return;
422
423 case NAND_ECC_READSYN:
424 /* disable ecc generation */
425 dev->ctlreg &= ~R852_CTL_ECC_ENABLE;
426 r852_write_reg(dev, R852_CTL, dev->ctlreg);
427 }
428 }
429
430 /*
431 * Calculate ECC, only used for writes
432 */
433
r852_ecc_calculate(struct mtd_info * mtd,const uint8_t * dat,uint8_t * ecc_code)434 static int r852_ecc_calculate(struct mtd_info *mtd, const uint8_t *dat,
435 uint8_t *ecc_code)
436 {
437 struct r852_device *dev = r852_get_dev(mtd);
438 struct sm_oob *oob = (struct sm_oob *)ecc_code;
439 uint32_t ecc1, ecc2;
440
441 if (dev->card_unstable)
442 return 0;
443
444 dev->ctlreg &= ~R852_CTL_ECC_ENABLE;
445 r852_write_reg(dev, R852_CTL, dev->ctlreg | R852_CTL_ECC_ACCESS);
446
447 ecc1 = r852_read_reg_dword(dev, R852_DATALINE);
448 ecc2 = r852_read_reg_dword(dev, R852_DATALINE);
449
450 oob->ecc1[0] = (ecc1) & 0xFF;
451 oob->ecc1[1] = (ecc1 >> 8) & 0xFF;
452 oob->ecc1[2] = (ecc1 >> 16) & 0xFF;
453
454 oob->ecc2[0] = (ecc2) & 0xFF;
455 oob->ecc2[1] = (ecc2 >> 8) & 0xFF;
456 oob->ecc2[2] = (ecc2 >> 16) & 0xFF;
457
458 r852_write_reg(dev, R852_CTL, dev->ctlreg);
459 return 0;
460 }
461
462 /*
463 * Correct the data using ECC, hw did almost everything for us
464 */
465
r852_ecc_correct(struct mtd_info * mtd,uint8_t * dat,uint8_t * read_ecc,uint8_t * calc_ecc)466 static int r852_ecc_correct(struct mtd_info *mtd, uint8_t *dat,
467 uint8_t *read_ecc, uint8_t *calc_ecc)
468 {
469 uint32_t ecc_reg;
470 uint8_t ecc_status, err_byte;
471 int i, error = 0;
472
473 struct r852_device *dev = r852_get_dev(mtd);
474
475 if (dev->card_unstable)
476 return 0;
477
478 if (dev->dma_error) {
479 dev->dma_error = 0;
480 return -1;
481 }
482
483 r852_write_reg(dev, R852_CTL, dev->ctlreg | R852_CTL_ECC_ACCESS);
484 ecc_reg = r852_read_reg_dword(dev, R852_DATALINE);
485 r852_write_reg(dev, R852_CTL, dev->ctlreg);
486
487 for (i = 0 ; i <= 1 ; i++) {
488
489 ecc_status = (ecc_reg >> 8) & 0xFF;
490
491 /* ecc uncorrectable error */
492 if (ecc_status & R852_ECC_FAIL) {
493 dbg("ecc: unrecoverable error, in half %d", i);
494 error = -1;
495 goto exit;
496 }
497
498 /* correctable error */
499 if (ecc_status & R852_ECC_CORRECTABLE) {
500
501 err_byte = ecc_reg & 0xFF;
502 dbg("ecc: recoverable error, "
503 "in half %d, byte %d, bit %d", i,
504 err_byte, ecc_status & R852_ECC_ERR_BIT_MSK);
505
506 dat[err_byte] ^=
507 1 << (ecc_status & R852_ECC_ERR_BIT_MSK);
508 error++;
509 }
510
511 dat += 256;
512 ecc_reg >>= 16;
513 }
514 exit:
515 return error;
516 }
517
518 /*
519 * This is copy of nand_read_oob_std
520 * nand_read_oob_syndrome assumes we can send column address - we can't
521 */
r852_read_oob(struct mtd_info * mtd,struct nand_chip * chip,int page)522 static int r852_read_oob(struct mtd_info *mtd, struct nand_chip *chip,
523 int page)
524 {
525 chip->cmdfunc(mtd, NAND_CMD_READOOB, 0, page);
526 chip->read_buf(mtd, chip->oob_poi, mtd->oobsize);
527 return 0;
528 }
529
530 /*
531 * Start the nand engine
532 */
533
r852_engine_enable(struct r852_device * dev)534 static void r852_engine_enable(struct r852_device *dev)
535 {
536 if (r852_read_reg_dword(dev, R852_HW) & R852_HW_UNKNOWN) {
537 r852_write_reg(dev, R852_CTL, R852_CTL_RESET | R852_CTL_ON);
538 r852_write_reg_dword(dev, R852_HW, R852_HW_ENABLED);
539 } else {
540 r852_write_reg_dword(dev, R852_HW, R852_HW_ENABLED);
541 r852_write_reg(dev, R852_CTL, R852_CTL_RESET | R852_CTL_ON);
542 }
543 msleep(300);
544 r852_write_reg(dev, R852_CTL, 0);
545 }
546
547
548 /*
549 * Stop the nand engine
550 */
551
r852_engine_disable(struct r852_device * dev)552 static void r852_engine_disable(struct r852_device *dev)
553 {
554 r852_write_reg_dword(dev, R852_HW, 0);
555 r852_write_reg(dev, R852_CTL, R852_CTL_RESET);
556 }
557
558 /*
559 * Test if card is present
560 */
561
r852_card_update_present(struct r852_device * dev)562 static void r852_card_update_present(struct r852_device *dev)
563 {
564 unsigned long flags;
565 uint8_t reg;
566
567 spin_lock_irqsave(&dev->irqlock, flags);
568 reg = r852_read_reg(dev, R852_CARD_STA);
569 dev->card_detected = !!(reg & R852_CARD_STA_PRESENT);
570 spin_unlock_irqrestore(&dev->irqlock, flags);
571 }
572
573 /*
574 * Update card detection IRQ state according to current card state
575 * which is read in r852_card_update_present
576 */
r852_update_card_detect(struct r852_device * dev)577 static void r852_update_card_detect(struct r852_device *dev)
578 {
579 int card_detect_reg = r852_read_reg(dev, R852_CARD_IRQ_ENABLE);
580 dev->card_unstable = 0;
581
582 card_detect_reg &= ~(R852_CARD_IRQ_REMOVE | R852_CARD_IRQ_INSERT);
583 card_detect_reg |= R852_CARD_IRQ_GENABLE;
584
585 card_detect_reg |= dev->card_detected ?
586 R852_CARD_IRQ_REMOVE : R852_CARD_IRQ_INSERT;
587
588 r852_write_reg(dev, R852_CARD_IRQ_ENABLE, card_detect_reg);
589 }
590
r852_media_type_show(struct device * sys_dev,struct device_attribute * attr,char * buf)591 static ssize_t r852_media_type_show(struct device *sys_dev,
592 struct device_attribute *attr, char *buf)
593 {
594 struct mtd_info *mtd = container_of(sys_dev, struct mtd_info, dev);
595 struct r852_device *dev = r852_get_dev(mtd);
596 char *data = dev->sm ? "smartmedia" : "xd";
597
598 strcpy(buf, data);
599 return strlen(data);
600 }
601
602 static DEVICE_ATTR(media_type, S_IRUGO, r852_media_type_show, NULL);
603
604
605 /* Detect properties of card in slot */
r852_update_media_status(struct r852_device * dev)606 static void r852_update_media_status(struct r852_device *dev)
607 {
608 uint8_t reg;
609 unsigned long flags;
610 int readonly;
611
612 spin_lock_irqsave(&dev->irqlock, flags);
613 if (!dev->card_detected) {
614 message("card removed");
615 spin_unlock_irqrestore(&dev->irqlock, flags);
616 return ;
617 }
618
619 readonly = r852_read_reg(dev, R852_CARD_STA) & R852_CARD_STA_RO;
620 reg = r852_read_reg(dev, R852_DMA_CAP);
621 dev->sm = (reg & (R852_DMA1 | R852_DMA2)) && (reg & R852_SMBIT);
622
623 message("detected %s %s card in slot",
624 dev->sm ? "SmartMedia" : "xD",
625 readonly ? "readonly" : "writeable");
626
627 dev->readonly = readonly;
628 spin_unlock_irqrestore(&dev->irqlock, flags);
629 }
630
631 /*
632 * Register the nand device
633 * Called when the card is detected
634 */
r852_register_nand_device(struct r852_device * dev)635 static int r852_register_nand_device(struct r852_device *dev)
636 {
637 dev->mtd = kzalloc(sizeof(struct mtd_info), GFP_KERNEL);
638
639 if (!dev->mtd)
640 goto error1;
641
642 WARN_ON(dev->card_registred);
643
644 dev->mtd->priv = dev->chip;
645 dev->mtd->dev.parent = &dev->pci_dev->dev;
646
647 if (dev->readonly)
648 dev->chip->options |= NAND_ROM;
649
650 r852_engine_enable(dev);
651
652 if (sm_register_device(dev->mtd, dev->sm))
653 goto error2;
654
655 if (device_create_file(&dev->mtd->dev, &dev_attr_media_type)) {
656 message("can't create media type sysfs attribute");
657 goto error3;
658 }
659
660 dev->card_registred = 1;
661 return 0;
662 error3:
663 nand_release(dev->mtd);
664 error2:
665 kfree(dev->mtd);
666 error1:
667 /* Force card redetect */
668 dev->card_detected = 0;
669 return -1;
670 }
671
672 /*
673 * Unregister the card
674 */
675
r852_unregister_nand_device(struct r852_device * dev)676 static void r852_unregister_nand_device(struct r852_device *dev)
677 {
678 if (!dev->card_registred)
679 return;
680
681 device_remove_file(&dev->mtd->dev, &dev_attr_media_type);
682 nand_release(dev->mtd);
683 r852_engine_disable(dev);
684 dev->card_registred = 0;
685 kfree(dev->mtd);
686 dev->mtd = NULL;
687 }
688
689 /* Card state updater */
r852_card_detect_work(struct work_struct * work)690 static void r852_card_detect_work(struct work_struct *work)
691 {
692 struct r852_device *dev =
693 container_of(work, struct r852_device, card_detect_work.work);
694
695 r852_card_update_present(dev);
696 r852_update_card_detect(dev);
697 dev->card_unstable = 0;
698
699 /* False alarm */
700 if (dev->card_detected == dev->card_registred)
701 goto exit;
702
703 /* Read media properties */
704 r852_update_media_status(dev);
705
706 /* Register the card */
707 if (dev->card_detected)
708 r852_register_nand_device(dev);
709 else
710 r852_unregister_nand_device(dev);
711 exit:
712 r852_update_card_detect(dev);
713 }
714
715 /* Ack + disable IRQ generation */
r852_disable_irqs(struct r852_device * dev)716 static void r852_disable_irqs(struct r852_device *dev)
717 {
718 uint8_t reg;
719 reg = r852_read_reg(dev, R852_CARD_IRQ_ENABLE);
720 r852_write_reg(dev, R852_CARD_IRQ_ENABLE, reg & ~R852_CARD_IRQ_MASK);
721
722 reg = r852_read_reg_dword(dev, R852_DMA_IRQ_ENABLE);
723 r852_write_reg_dword(dev, R852_DMA_IRQ_ENABLE,
724 reg & ~R852_DMA_IRQ_MASK);
725
726 r852_write_reg(dev, R852_CARD_IRQ_STA, R852_CARD_IRQ_MASK);
727 r852_write_reg_dword(dev, R852_DMA_IRQ_STA, R852_DMA_IRQ_MASK);
728 }
729
730 /* Interrupt handler */
r852_irq(int irq,void * data)731 static irqreturn_t r852_irq(int irq, void *data)
732 {
733 struct r852_device *dev = (struct r852_device *)data;
734
735 uint8_t card_status, dma_status;
736 unsigned long flags;
737 irqreturn_t ret = IRQ_NONE;
738
739 spin_lock_irqsave(&dev->irqlock, flags);
740
741 /* handle card detection interrupts first */
742 card_status = r852_read_reg(dev, R852_CARD_IRQ_STA);
743 r852_write_reg(dev, R852_CARD_IRQ_STA, card_status);
744
745 if (card_status & (R852_CARD_IRQ_INSERT|R852_CARD_IRQ_REMOVE)) {
746
747 ret = IRQ_HANDLED;
748 dev->card_detected = !!(card_status & R852_CARD_IRQ_INSERT);
749
750 /* we shouldn't receive any interrupts if we wait for card
751 to settle */
752 WARN_ON(dev->card_unstable);
753
754 /* disable irqs while card is unstable */
755 /* this will timeout DMA if active, but better that garbage */
756 r852_disable_irqs(dev);
757
758 if (dev->card_unstable)
759 goto out;
760
761 /* let, card state to settle a bit, and then do the work */
762 dev->card_unstable = 1;
763 queue_delayed_work(dev->card_workqueue,
764 &dev->card_detect_work, msecs_to_jiffies(100));
765 goto out;
766 }
767
768
769 /* Handle dma interrupts */
770 dma_status = r852_read_reg_dword(dev, R852_DMA_IRQ_STA);
771 r852_write_reg_dword(dev, R852_DMA_IRQ_STA, dma_status);
772
773 if (dma_status & R852_DMA_IRQ_MASK) {
774
775 ret = IRQ_HANDLED;
776
777 if (dma_status & R852_DMA_IRQ_ERROR) {
778 dbg("received dma error IRQ");
779 r852_dma_done(dev, -EIO);
780 complete(&dev->dma_done);
781 goto out;
782 }
783
784 /* received DMA interrupt out of nowhere? */
785 WARN_ON_ONCE(dev->dma_stage == 0);
786
787 if (dev->dma_stage == 0)
788 goto out;
789
790 /* done device access */
791 if (dev->dma_state == DMA_INTERNAL &&
792 (dma_status & R852_DMA_IRQ_INTERNAL)) {
793
794 dev->dma_state = DMA_MEMORY;
795 dev->dma_stage++;
796 }
797
798 /* done memory DMA */
799 if (dev->dma_state == DMA_MEMORY &&
800 (dma_status & R852_DMA_IRQ_MEMORY)) {
801 dev->dma_state = DMA_INTERNAL;
802 dev->dma_stage++;
803 }
804
805 /* Enable 2nd half of dma dance */
806 if (dev->dma_stage == 2)
807 r852_dma_enable(dev);
808
809 /* Operation done */
810 if (dev->dma_stage == 3) {
811 r852_dma_done(dev, 0);
812 complete(&dev->dma_done);
813 }
814 goto out;
815 }
816
817 /* Handle unknown interrupts */
818 if (dma_status)
819 dbg("bad dma IRQ status = %x", dma_status);
820
821 if (card_status & ~R852_CARD_STA_CD)
822 dbg("strange card status = %x", card_status);
823
824 out:
825 spin_unlock_irqrestore(&dev->irqlock, flags);
826 return ret;
827 }
828
r852_probe(struct pci_dev * pci_dev,const struct pci_device_id * id)829 static int r852_probe(struct pci_dev *pci_dev, const struct pci_device_id *id)
830 {
831 int error;
832 struct nand_chip *chip;
833 struct r852_device *dev;
834
835 /* pci initialization */
836 error = pci_enable_device(pci_dev);
837
838 if (error)
839 goto error1;
840
841 pci_set_master(pci_dev);
842
843 error = pci_set_dma_mask(pci_dev, DMA_BIT_MASK(32));
844 if (error)
845 goto error2;
846
847 error = pci_request_regions(pci_dev, DRV_NAME);
848
849 if (error)
850 goto error3;
851
852 error = -ENOMEM;
853
854 /* init nand chip, but register it only on card insert */
855 chip = kzalloc(sizeof(struct nand_chip), GFP_KERNEL);
856
857 if (!chip)
858 goto error4;
859
860 /* commands */
861 chip->cmd_ctrl = r852_cmdctl;
862 chip->waitfunc = r852_wait;
863 chip->dev_ready = r852_ready;
864
865 /* I/O */
866 chip->read_byte = r852_read_byte;
867 chip->read_buf = r852_read_buf;
868 chip->write_buf = r852_write_buf;
869
870 /* ecc */
871 chip->ecc.mode = NAND_ECC_HW_SYNDROME;
872 chip->ecc.size = R852_DMA_LEN;
873 chip->ecc.bytes = SM_OOB_SIZE;
874 chip->ecc.strength = 2;
875 chip->ecc.hwctl = r852_ecc_hwctl;
876 chip->ecc.calculate = r852_ecc_calculate;
877 chip->ecc.correct = r852_ecc_correct;
878
879 /* TODO: hack */
880 chip->ecc.read_oob = r852_read_oob;
881
882 /* init our device structure */
883 dev = kzalloc(sizeof(struct r852_device), GFP_KERNEL);
884
885 if (!dev)
886 goto error5;
887
888 chip->priv = dev;
889 dev->chip = chip;
890 dev->pci_dev = pci_dev;
891 pci_set_drvdata(pci_dev, dev);
892
893 dev->bounce_buffer = pci_alloc_consistent(pci_dev, R852_DMA_LEN,
894 &dev->phys_bounce_buffer);
895
896 if (!dev->bounce_buffer)
897 goto error6;
898
899
900 error = -ENODEV;
901 dev->mmio = pci_ioremap_bar(pci_dev, 0);
902
903 if (!dev->mmio)
904 goto error7;
905
906 error = -ENOMEM;
907 dev->tmp_buffer = kzalloc(SM_SECTOR_SIZE, GFP_KERNEL);
908
909 if (!dev->tmp_buffer)
910 goto error8;
911
912 init_completion(&dev->dma_done);
913
914 dev->card_workqueue = create_freezable_workqueue(DRV_NAME);
915
916 if (!dev->card_workqueue)
917 goto error9;
918
919 INIT_DELAYED_WORK(&dev->card_detect_work, r852_card_detect_work);
920
921 /* shutdown everything - precation */
922 r852_engine_disable(dev);
923 r852_disable_irqs(dev);
924
925 r852_dma_test(dev);
926
927 dev->irq = pci_dev->irq;
928 spin_lock_init(&dev->irqlock);
929
930 dev->card_detected = 0;
931 r852_card_update_present(dev);
932
933 /*register irq handler*/
934 error = -ENODEV;
935 if (request_irq(pci_dev->irq, &r852_irq, IRQF_SHARED,
936 DRV_NAME, dev))
937 goto error10;
938
939 /* kick initial present test */
940 queue_delayed_work(dev->card_workqueue,
941 &dev->card_detect_work, 0);
942
943
944 printk(KERN_NOTICE DRV_NAME ": driver loaded successfully\n");
945 return 0;
946
947 error10:
948 destroy_workqueue(dev->card_workqueue);
949 error9:
950 kfree(dev->tmp_buffer);
951 error8:
952 pci_iounmap(pci_dev, dev->mmio);
953 error7:
954 pci_free_consistent(pci_dev, R852_DMA_LEN,
955 dev->bounce_buffer, dev->phys_bounce_buffer);
956 error6:
957 kfree(dev);
958 error5:
959 kfree(chip);
960 error4:
961 pci_release_regions(pci_dev);
962 error3:
963 error2:
964 pci_disable_device(pci_dev);
965 error1:
966 return error;
967 }
968
r852_remove(struct pci_dev * pci_dev)969 static void r852_remove(struct pci_dev *pci_dev)
970 {
971 struct r852_device *dev = pci_get_drvdata(pci_dev);
972
973 /* Stop detect workqueue -
974 we are going to unregister the device anyway*/
975 cancel_delayed_work_sync(&dev->card_detect_work);
976 destroy_workqueue(dev->card_workqueue);
977
978 /* Unregister the device, this might make more IO */
979 r852_unregister_nand_device(dev);
980
981 /* Stop interrupts */
982 r852_disable_irqs(dev);
983 synchronize_irq(dev->irq);
984 free_irq(dev->irq, dev);
985
986 /* Cleanup */
987 kfree(dev->tmp_buffer);
988 pci_iounmap(pci_dev, dev->mmio);
989 pci_free_consistent(pci_dev, R852_DMA_LEN,
990 dev->bounce_buffer, dev->phys_bounce_buffer);
991
992 kfree(dev->chip);
993 kfree(dev);
994
995 /* Shutdown the PCI device */
996 pci_release_regions(pci_dev);
997 pci_disable_device(pci_dev);
998 }
999
r852_shutdown(struct pci_dev * pci_dev)1000 static void r852_shutdown(struct pci_dev *pci_dev)
1001 {
1002 struct r852_device *dev = pci_get_drvdata(pci_dev);
1003
1004 cancel_delayed_work_sync(&dev->card_detect_work);
1005 r852_disable_irqs(dev);
1006 synchronize_irq(dev->irq);
1007 pci_disable_device(pci_dev);
1008 }
1009
1010 #ifdef CONFIG_PM_SLEEP
r852_suspend(struct device * device)1011 static int r852_suspend(struct device *device)
1012 {
1013 struct r852_device *dev = pci_get_drvdata(to_pci_dev(device));
1014
1015 if (dev->ctlreg & R852_CTL_CARDENABLE)
1016 return -EBUSY;
1017
1018 /* First make sure the detect work is gone */
1019 cancel_delayed_work_sync(&dev->card_detect_work);
1020
1021 /* Turn off the interrupts and stop the device */
1022 r852_disable_irqs(dev);
1023 r852_engine_disable(dev);
1024
1025 /* If card was pulled off just during the suspend, which is very
1026 unlikely, we will remove it on resume, it too late now
1027 anyway... */
1028 dev->card_unstable = 0;
1029 return 0;
1030 }
1031
r852_resume(struct device * device)1032 static int r852_resume(struct device *device)
1033 {
1034 struct r852_device *dev = pci_get_drvdata(to_pci_dev(device));
1035
1036 r852_disable_irqs(dev);
1037 r852_card_update_present(dev);
1038 r852_engine_disable(dev);
1039
1040
1041 /* If card status changed, just do the work */
1042 if (dev->card_detected != dev->card_registred) {
1043 dbg("card was %s during low power state",
1044 dev->card_detected ? "added" : "removed");
1045
1046 queue_delayed_work(dev->card_workqueue,
1047 &dev->card_detect_work, msecs_to_jiffies(1000));
1048 return 0;
1049 }
1050
1051 /* Otherwise, initialize the card */
1052 if (dev->card_registred) {
1053 r852_engine_enable(dev);
1054 dev->chip->select_chip(dev->mtd, 0);
1055 dev->chip->cmdfunc(dev->mtd, NAND_CMD_RESET, -1, -1);
1056 dev->chip->select_chip(dev->mtd, -1);
1057 }
1058
1059 /* Program card detection IRQ */
1060 r852_update_card_detect(dev);
1061 return 0;
1062 }
1063 #endif
1064
1065 static const struct pci_device_id r852_pci_id_tbl[] = {
1066
1067 { PCI_VDEVICE(RICOH, 0x0852), },
1068 { },
1069 };
1070
1071 MODULE_DEVICE_TABLE(pci, r852_pci_id_tbl);
1072
1073 static SIMPLE_DEV_PM_OPS(r852_pm_ops, r852_suspend, r852_resume);
1074
1075 static struct pci_driver r852_pci_driver = {
1076 .name = DRV_NAME,
1077 .id_table = r852_pci_id_tbl,
1078 .probe = r852_probe,
1079 .remove = r852_remove,
1080 .shutdown = r852_shutdown,
1081 .driver.pm = &r852_pm_ops,
1082 };
1083
1084 module_pci_driver(r852_pci_driver);
1085
1086 MODULE_LICENSE("GPL");
1087 MODULE_AUTHOR("Maxim Levitsky <maximlevitsky@gmail.com>");
1088 MODULE_DESCRIPTION("Ricoh 85xx xD/smartmedia card reader driver");
1089