1 /****************************************************************************** 2 * Copyright(c) 2008 - 2010 Realtek Corporation. All rights reserved. 3 * 4 * Based on the r8180 driver, which is: 5 * Copyright 2004-2005 Andrea Merello <andrea.merello@gmail.com>, et al. 6 * This program is free software; you can redistribute it and/or modify it 7 * under the terms of version 2 of the GNU General Public License as 8 * published by the Free Software Foundation. 9 * 10 * This program is distributed in the hope that it will be useful, but WITHOUT 11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 13 * more details. 14 * 15 * You should have received a copy of the GNU General Public License along with 16 * this program; if not, write to the Free Software Foundation, Inc., 17 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA 18 * 19 * The full GNU General Public License is included in this distribution in the 20 * file called LICENSE. 21 * 22 * Contact Information: 23 * wlanfae <wlanfae@realtek.com> 24 ******************************************************************************/ 25 26 #ifndef _RTL_CORE_H 27 #define _RTL_CORE_H 28 29 #include <linux/module.h> 30 #include <linux/kernel.h> 31 #include <linux/ioport.h> 32 #include <linux/sched.h> 33 #include <linux/types.h> 34 #include <linux/interrupt.h> 35 #include <linux/slab.h> 36 #include <linux/netdevice.h> 37 #include <linux/pci.h> 38 #include <linux/etherdevice.h> 39 #include <linux/delay.h> 40 #include <linux/rtnetlink.h> 41 #include <linux/wireless.h> 42 #include <linux/timer.h> 43 #include <linux/proc_fs.h> 44 #include <linux/if_arp.h> 45 #include <linux/random.h> 46 #include <linux/io.h> 47 48 /* Need this defined before including local include files */ 49 #define DRV_NAME "rtl819xE" 50 51 #include "../rtllib.h" 52 53 #include "../dot11d.h" 54 55 #include "r8192E_firmware.h" 56 #include "r8192E_hw.h" 57 58 #include "r8190P_def.h" 59 #include "r8192E_dev.h" 60 61 #include "rtl_eeprom.h" 62 #include "rtl_ps.h" 63 #include "rtl_pci.h" 64 #include "rtl_cam.h" 65 66 #define DRV_COPYRIGHT \ 67 "Copyright(c) 2008 - 2010 Realsil Semiconductor Corporation" 68 #define DRV_AUTHOR "<wlanfae@realtek.com>" 69 #define DRV_VERSION "0014.0401.2010" 70 71 #define IS_HARDWARE_TYPE_819xP(_priv) \ 72 ((((struct r8192_priv *)rtllib_priv(dev))->card_8192 == NIC_8190P) || \ 73 (((struct r8192_priv *)rtllib_priv(dev))->card_8192 == NIC_8192E)) 74 #define IS_HARDWARE_TYPE_8192SE(_priv) \ 75 (((struct r8192_priv *)rtllib_priv(dev))->card_8192 == NIC_8192SE) 76 #define IS_HARDWARE_TYPE_8192CE(_priv) \ 77 (((struct r8192_priv *)rtllib_priv(dev))->card_8192 == NIC_8192CE) 78 #define IS_HARDWARE_TYPE_8192CU(_priv) \ 79 (((struct r8192_priv *)rtllib_priv(dev))->card_8192 == NIC_8192CU) 80 #define IS_HARDWARE_TYPE_8192DE(_priv) \ 81 (((struct r8192_priv *)rtllib_priv(dev))->card_8192 == NIC_8192DE) 82 #define IS_HARDWARE_TYPE_8192DU(_priv) \ 83 (((struct r8192_priv *)rtllib_priv(dev))->card_8192 == NIC_8192DU) 84 85 #define RTL_PCI_DEVICE(vend, dev, cfg) \ 86 .vendor = (vend), .device = (dev), \ 87 .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID , \ 88 .driver_data = (kernel_ulong_t)&(cfg) 89 90 #define RTL_MAX_SCAN_SIZE 128 91 92 #define RTL_RATE_MAX 30 93 94 #define TOTAL_CAM_ENTRY 32 95 #define CAM_CONTENT_COUNT 8 96 97 #ifndef BIT 98 #define BIT(_i) (1<<(_i)) 99 #endif 100 101 #define IS_ADAPTER_SENDS_BEACON(dev) 0 102 103 #define HAL_MEMORY_MAPPED_IO_RANGE_8190PCI 0x1000 104 #define HAL_HW_PCI_REVISION_ID_8190PCI 0x00 105 #define HAL_MEMORY_MAPPED_IO_RANGE_8192PCIE 0x4000 106 #define HAL_HW_PCI_REVISION_ID_8192PCIE 0x01 107 #define HAL_MEMORY_MAPPED_IO_RANGE_8192SE 0x4000 108 #define HAL_HW_PCI_REVISION_ID_8192SE 0x10 109 #define HAL_HW_PCI_REVISION_ID_8192CE 0x1 110 #define HAL_MEMORY_MAPPED_IO_RANGE_8192CE 0x4000 111 #define HAL_HW_PCI_REVISION_ID_8192DE 0x0 112 #define HAL_MEMORY_MAPPED_IO_RANGE_8192DE 0x4000 113 114 #define HAL_HW_PCI_8180_DEVICE_ID 0x8180 115 #define HAL_HW_PCI_8185_DEVICE_ID 0x8185 116 #define HAL_HW_PCI_8188_DEVICE_ID 0x8188 117 #define HAL_HW_PCI_8198_DEVICE_ID 0x8198 118 #define HAL_HW_PCI_8190_DEVICE_ID 0x8190 119 #define HAL_HW_PCI_8192_DEVICE_ID 0x8192 120 #define HAL_HW_PCI_8192SE_DEVICE_ID 0x8192 121 #define HAL_HW_PCI_8174_DEVICE_ID 0x8174 122 #define HAL_HW_PCI_8173_DEVICE_ID 0x8173 123 #define HAL_HW_PCI_8172_DEVICE_ID 0x8172 124 #define HAL_HW_PCI_8171_DEVICE_ID 0x8171 125 #define HAL_HW_PCI_0045_DEVICE_ID 0x0045 126 #define HAL_HW_PCI_0046_DEVICE_ID 0x0046 127 #define HAL_HW_PCI_0044_DEVICE_ID 0x0044 128 #define HAL_HW_PCI_0047_DEVICE_ID 0x0047 129 #define HAL_HW_PCI_700F_DEVICE_ID 0x700F 130 #define HAL_HW_PCI_701F_DEVICE_ID 0x701F 131 #define HAL_HW_PCI_DLINK_DEVICE_ID 0x3304 132 #define HAL_HW_PCI_8192CET_DEVICE_ID 0x8191 133 #define HAL_HW_PCI_8192CE_DEVICE_ID 0x8178 134 #define HAL_HW_PCI_8191CE_DEVICE_ID 0x8177 135 #define HAL_HW_PCI_8188CE_DEVICE_ID 0x8176 136 #define HAL_HW_PCI_8192CU_DEVICE_ID 0x8191 137 #define HAL_HW_PCI_8192DE_DEVICE_ID 0x092D 138 #define HAL_HW_PCI_8192DU_DEVICE_ID 0x092D 139 140 #define RTL819X_DEFAULT_RF_TYPE RF_1T2R 141 142 #define RTLLIB_WATCH_DOG_TIME 2000 143 144 #define MAX_DEV_ADDR_SIZE 8 /*support till 64 bit bus width OS*/ 145 #define MAX_FIRMWARE_INFORMATION_SIZE 32 146 #define MAX_802_11_HEADER_LENGTH (40 + MAX_FIRMWARE_INFORMATION_SIZE) 147 #define ENCRYPTION_MAX_OVERHEAD 128 148 #define MAX_FRAGMENT_COUNT 8 149 #define MAX_TRANSMIT_BUFFER_SIZE \ 150 (1600 + (MAX_802_11_HEADER_LENGTH + ENCRYPTION_MAX_OVERHEAD) * \ 151 MAX_FRAGMENT_COUNT) 152 153 #define scrclng 4 154 155 #define DEFAULT_FRAG_THRESHOLD 2342U 156 #define MIN_FRAG_THRESHOLD 256U 157 #define DEFAULT_BEACONINTERVAL 0x64U 158 159 #define DEFAULT_SSID "" 160 #define DEFAULT_RETRY_RTS 7 161 #define DEFAULT_RETRY_DATA 7 162 #define PRISM_HDR_SIZE 64 163 164 #define PHY_RSSI_SLID_WIN_MAX 100 165 166 #define RTL_IOCTL_WPA_SUPPLICANT (SIOCIWFIRSTPRIV + 30) 167 168 #define TxBBGainTableLength 37 169 #define CCKTxBBGainTableLength 23 170 171 #define CHANNEL_PLAN_LEN 10 172 #define sCrcLng 4 173 174 #define NIC_SEND_HANG_THRESHOLD_NORMAL 4 175 #define NIC_SEND_HANG_THRESHOLD_POWERSAVE 8 176 177 #define MAX_TX_QUEUE 9 178 179 #define MAX_RX_QUEUE 1 180 181 #define MAX_RX_COUNT 64 182 #define MAX_TX_QUEUE_COUNT 9 183 184 extern int hwwep; 185 186 enum RTL819x_PHY_PARAM { 187 RTL819X_PHY_MACPHY_REG = 0, 188 RTL819X_PHY_MACPHY_REG_PG = 1, 189 RTL8188C_PHY_MACREG = 2, 190 RTL8192C_PHY_MACREG = 3, 191 RTL819X_PHY_REG = 4, 192 RTL819X_PHY_REG_1T2R = 5, 193 RTL819X_PHY_REG_to1T1R = 6, 194 RTL819X_PHY_REG_to1T2R = 7, 195 RTL819X_PHY_REG_to2T2R = 8, 196 RTL819X_PHY_REG_PG = 9, 197 RTL819X_AGC_TAB = 10, 198 RTL819X_PHY_RADIO_A = 11, 199 RTL819X_PHY_RADIO_A_1T = 12, 200 RTL819X_PHY_RADIO_A_2T = 13, 201 RTL819X_PHY_RADIO_B = 14, 202 RTL819X_PHY_RADIO_B_GM = 15, 203 RTL819X_PHY_RADIO_C = 16, 204 RTL819X_PHY_RADIO_D = 17, 205 RTL819X_EEPROM_MAP = 18, 206 RTL819X_EFUSE_MAP = 19, 207 }; 208 209 enum nic_t { 210 NIC_UNKNOWN = 0, 211 NIC_8192E = 1, 212 NIC_8190P = 2, 213 NIC_8192SE = 4, 214 NIC_8192CE = 5, 215 NIC_8192CU = 6, 216 NIC_8192DE = 7, 217 NIC_8192DU = 8, 218 }; 219 220 enum rt_eeprom_type { 221 EEPROM_93C46, 222 EEPROM_93C56, 223 EEPROM_BOOT_EFUSE, 224 }; 225 226 enum dcmg_txcmd_op { 227 TXCMD_TXRA_HISTORY_CTRL = 0xFF900000, 228 TXCMD_RESET_TX_PKT_BUFF = 0xFF900001, 229 TXCMD_RESET_RX_PKT_BUFF = 0xFF900002, 230 TXCMD_SET_TX_DURATION = 0xFF900003, 231 TXCMD_SET_RX_RSSI = 0xFF900004, 232 TXCMD_SET_TX_PWR_TRACKING = 0xFF900005, 233 TXCMD_XXXX_CTRL, 234 }; 235 236 enum rt_rf_type_819xu { 237 RF_TYPE_MIN = 0, 238 RF_8225, 239 RF_8256, 240 RF_8258, 241 RF_6052 = 4, 242 RF_PSEUDO_11N = 5, 243 }; 244 245 enum rf_step { 246 RF_STEP_INIT = 0, 247 RF_STEP_NORMAL, 248 RF_STEP_MAX 249 }; 250 251 enum rt_status { 252 RT_STATUS_SUCCESS, 253 RT_STATUS_FAILURE, 254 RT_STATUS_PENDING, 255 RT_STATUS_RESOURCE 256 }; 257 258 enum rt_customer_id { 259 RT_CID_DEFAULT = 0, 260 RT_CID_8187_ALPHA0 = 1, 261 RT_CID_8187_SERCOMM_PS = 2, 262 RT_CID_8187_HW_LED = 3, 263 RT_CID_8187_NETGEAR = 4, 264 RT_CID_WHQL = 5, 265 RT_CID_819x_CAMEO = 6, 266 RT_CID_819x_RUNTOP = 7, 267 RT_CID_819x_Senao = 8, 268 RT_CID_TOSHIBA = 9, 269 RT_CID_819x_Netcore = 10, 270 RT_CID_Nettronix = 11, 271 RT_CID_DLINK = 12, 272 RT_CID_PRONET = 13, 273 RT_CID_COREGA = 14, 274 RT_CID_819x_ALPHA = 15, 275 RT_CID_819x_Sitecom = 16, 276 RT_CID_CCX = 17, 277 RT_CID_819x_Lenovo = 18, 278 RT_CID_819x_QMI = 19, 279 RT_CID_819x_Edimax_Belkin = 20, 280 RT_CID_819x_Sercomm_Belkin = 21, 281 RT_CID_819x_CAMEO1 = 22, 282 RT_CID_819x_MSI = 23, 283 RT_CID_819x_Acer = 24, 284 RT_CID_819x_HP = 27, 285 RT_CID_819x_CLEVO = 28, 286 RT_CID_819x_Arcadyan_Belkin = 29, 287 RT_CID_819x_SAMSUNG = 30, 288 RT_CID_819x_WNC_COREGA = 31, 289 }; 290 291 enum reset_type { 292 RESET_TYPE_NORESET = 0x00, 293 RESET_TYPE_NORMAL = 0x01, 294 RESET_TYPE_SILENT = 0x02 295 }; 296 297 enum ic_inferiority_8192s { 298 IC_INFERIORITY_A = 0, 299 IC_INFERIORITY_B = 1, 300 }; 301 302 enum pci_bridge_vendor { 303 PCI_BRIDGE_VENDOR_INTEL = 0x0, 304 PCI_BRIDGE_VENDOR_ATI, 305 PCI_BRIDGE_VENDOR_AMD, 306 PCI_BRIDGE_VENDOR_SIS , 307 PCI_BRIDGE_VENDOR_UNKNOWN, 308 PCI_BRIDGE_VENDOR_MAX , 309 }; 310 311 struct buffer { 312 struct buffer *next; 313 u32 *buf; 314 dma_addr_t dma; 315 316 }; 317 318 struct rtl_reg_debug { 319 unsigned int cmd; 320 struct { 321 unsigned char type; 322 unsigned char addr; 323 unsigned char page; 324 unsigned char length; 325 } head; 326 unsigned char buf[0xff]; 327 }; 328 329 struct rt_tx_rahis { 330 u32 cck[4]; 331 u32 ofdm[8]; 332 u32 ht_mcs[4][16]; 333 }; 334 335 struct rt_smooth_data_4rf { 336 char elements[4][100]; 337 u32 index; 338 u32 TotalNum; 339 u32 TotalVal[4]; 340 }; 341 342 struct rt_stats { 343 unsigned long txrdu; 344 unsigned long rxrdu; 345 unsigned long rxok; 346 unsigned long rxframgment; 347 unsigned long rxurberr; 348 unsigned long rxstaterr; 349 unsigned long rxdatacrcerr; 350 unsigned long rxmgmtcrcerr; 351 unsigned long rxcrcerrmin; 352 unsigned long rxcrcerrmid; 353 unsigned long rxcrcerrmax; 354 unsigned long received_rate_histogram[4][32]; 355 unsigned long received_preamble_GI[2][32]; 356 unsigned long rx_AMPDUsize_histogram[5]; 357 unsigned long rx_AMPDUnum_histogram[5]; 358 unsigned long numpacket_matchbssid; 359 unsigned long numpacket_toself; 360 unsigned long num_process_phyinfo; 361 unsigned long numqry_phystatus; 362 unsigned long numqry_phystatusCCK; 363 unsigned long numqry_phystatusHT; 364 unsigned long received_bwtype[5]; 365 unsigned long txnperr; 366 unsigned long txnpdrop; 367 unsigned long txresumed; 368 unsigned long rxoverflow; 369 unsigned long rxint; 370 unsigned long txnpokint; 371 unsigned long ints; 372 unsigned long shints; 373 unsigned long txoverflow; 374 unsigned long txlpokint; 375 unsigned long txlpdrop; 376 unsigned long txlperr; 377 unsigned long txbeokint; 378 unsigned long txbedrop; 379 unsigned long txbeerr; 380 unsigned long txbkokint; 381 unsigned long txbkdrop; 382 unsigned long txbkerr; 383 unsigned long txviokint; 384 unsigned long txvidrop; 385 unsigned long txvierr; 386 unsigned long txvookint; 387 unsigned long txvodrop; 388 unsigned long txvoerr; 389 unsigned long txbeaconokint; 390 unsigned long txbeacondrop; 391 unsigned long txbeaconerr; 392 unsigned long txmanageokint; 393 unsigned long txmanagedrop; 394 unsigned long txmanageerr; 395 unsigned long txcmdpktokint; 396 unsigned long txdatapkt; 397 unsigned long txfeedback; 398 unsigned long txfeedbackok; 399 unsigned long txoktotal; 400 unsigned long txokbytestotal; 401 unsigned long txokinperiod; 402 unsigned long txmulticast; 403 unsigned long txbytesmulticast; 404 unsigned long txbroadcast; 405 unsigned long txbytesbroadcast; 406 unsigned long txunicast; 407 unsigned long txbytesunicast; 408 unsigned long rxbytesunicast; 409 unsigned long txfeedbackfail; 410 unsigned long txerrtotal; 411 unsigned long txerrbytestotal; 412 unsigned long txerrmulticast; 413 unsigned long txerrbroadcast; 414 unsigned long txerrunicast; 415 unsigned long txretrycount; 416 unsigned long txfeedbackretry; 417 u8 last_packet_rate; 418 unsigned long slide_signal_strength[100]; 419 unsigned long slide_evm[100]; 420 unsigned long slide_rssi_total; 421 unsigned long slide_evm_total; 422 long signal_strength; 423 long signal_quality; 424 long last_signal_strength_inpercent; 425 long recv_signal_power; 426 u8 rx_rssi_percentage[4]; 427 u8 rx_evm_percentage[2]; 428 long rxSNRdB[4]; 429 struct rt_tx_rahis txrate; 430 u32 Slide_Beacon_pwdb[100]; 431 u32 Slide_Beacon_Total; 432 struct rt_smooth_data_4rf cck_adc_pwdb; 433 u32 CurrentShowTxate; 434 }; 435 436 struct channel_access_setting { 437 u16 SIFS_Timer; 438 u16 DIFS_Timer; 439 u16 SlotTimeTimer; 440 u16 EIFS_Timer; 441 u16 CWminIndex; 442 u16 CWmaxIndex; 443 }; 444 445 enum two_port_status { 446 TWO_PORT_STATUS__DEFAULT_ONLY, 447 TWO_PORT_STATUS__EXTENSION_ONLY, 448 TWO_PORT_STATUS__EXTENSION_FOLLOW_DEFAULT, 449 TWO_PORT_STATUS__DEFAULT_G_EXTENSION_N20, 450 TWO_PORT_STATUS__ADHOC, 451 TWO_PORT_STATUS__WITHOUT_ANY_ASSOCIATE 452 }; 453 454 struct txbbgain_struct { 455 long txbb_iq_amplifygain; 456 u32 txbbgain_value; 457 }; 458 459 struct ccktxbbgain { 460 u8 ccktxbb_valuearray[8]; 461 }; 462 463 struct init_gain { 464 u8 xaagccore1; 465 u8 xbagccore1; 466 u8 xcagccore1; 467 u8 xdagccore1; 468 u8 cca; 469 470 }; 471 472 struct tx_ring { 473 u32 *desc; 474 u8 nStuckCount; 475 struct tx_ring *next; 476 } __packed; 477 478 struct rtl8192_tx_ring { 479 struct tx_desc *desc; 480 dma_addr_t dma; 481 unsigned int idx; 482 unsigned int entries; 483 struct sk_buff_head queue; 484 }; 485 486 487 488 struct rtl819x_ops { 489 enum nic_t nic_type; 490 void (*get_eeprom_size)(struct net_device *dev); 491 void (*init_adapter_variable)(struct net_device *dev); 492 void (*init_before_adapter_start)(struct net_device *dev); 493 bool (*initialize_adapter)(struct net_device *dev); 494 void (*link_change)(struct net_device *dev); 495 void (*tx_fill_descriptor)(struct net_device *dev, 496 struct tx_desc *tx_desc, 497 struct cb_desc *cb_desc, 498 struct sk_buff *skb); 499 void (*tx_fill_cmd_descriptor)(struct net_device *dev, 500 struct tx_desc_cmd *entry, 501 struct cb_desc *cb_desc, 502 struct sk_buff *skb); 503 bool (*rx_query_status_descriptor)(struct net_device *dev, 504 struct rtllib_rx_stats *stats, 505 struct rx_desc *pdesc, 506 struct sk_buff *skb); 507 bool (*rx_command_packet_handler)(struct net_device *dev, 508 struct sk_buff *skb, 509 struct rx_desc *pdesc); 510 void (*stop_adapter)(struct net_device *dev, bool reset); 511 void (*update_ratr_table)(struct net_device *dev); 512 void (*irq_enable)(struct net_device *dev); 513 void (*irq_disable)(struct net_device *dev); 514 void (*irq_clear)(struct net_device *dev); 515 void (*rx_enable)(struct net_device *dev); 516 void (*tx_enable)(struct net_device *dev); 517 void (*interrupt_recognized)(struct net_device *dev, 518 u32 *p_inta, u32 *p_intb); 519 bool (*TxCheckStuckHandler)(struct net_device *dev); 520 bool (*RxCheckStuckHandler)(struct net_device *dev); 521 }; 522 523 struct r8192_priv { 524 struct pci_dev *pdev; 525 struct pci_dev *bridge_pdev; 526 527 bool bfirst_init; 528 bool bfirst_after_down; 529 bool initialized_at_probe; 530 bool being_init_adapter; 531 bool bDriverIsGoingToUnload; 532 533 int irq; 534 short irq_enabled; 535 536 short up; 537 short up_first_time; 538 struct delayed_work update_beacon_wq; 539 struct delayed_work watch_dog_wq; 540 struct delayed_work txpower_tracking_wq; 541 struct delayed_work rfpath_check_wq; 542 struct delayed_work gpio_change_rf_wq; 543 struct delayed_work initialgain_operate_wq; 544 struct delayed_work check_hw_scan_wq; 545 struct delayed_work hw_scan_simu_wq; 546 struct delayed_work start_hw_scan_wq; 547 548 struct workqueue_struct *priv_wq; 549 550 struct channel_access_setting ChannelAccessSetting; 551 552 struct mp_adapter NdisAdapter; 553 554 struct rtl819x_ops *ops; 555 struct rtllib_device *rtllib; 556 557 struct work_struct reset_wq; 558 559 struct log_int_8190 InterruptLog; 560 561 enum rt_customer_id CustomerID; 562 563 564 enum rt_rf_type_819xu rf_chip; 565 enum ic_inferiority_8192s IC_Class; 566 enum ht_channel_width CurrentChannelBW; 567 struct bb_reg_definition PHYRegDef[4]; 568 struct rate_adaptive rate_adaptive; 569 570 struct ccktxbbgain cck_txbbgain_table[CCKTxBBGainTableLength]; 571 struct ccktxbbgain cck_txbbgain_ch14_table[CCKTxBBGainTableLength]; 572 573 struct txbbgain_struct txbbgain_table[TxBBGainTableLength]; 574 575 enum acm_method AcmMethod; 576 577 struct rt_firmware *pFirmware; 578 enum rtl819x_loopback LoopbackMode; 579 580 struct timer_list watch_dog_timer; 581 struct timer_list fsync_timer; 582 struct timer_list gpio_polling_timer; 583 584 spinlock_t fw_scan_lock; 585 spinlock_t irq_lock; 586 spinlock_t irq_th_lock; 587 spinlock_t tx_lock; 588 spinlock_t rf_ps_lock; 589 spinlock_t rw_lock; 590 spinlock_t rt_h2c_lock; 591 spinlock_t rf_lock; 592 spinlock_t ps_lock; 593 594 struct sk_buff_head rx_queue; 595 struct sk_buff_head skb_queue; 596 597 struct tasklet_struct irq_rx_tasklet; 598 struct tasklet_struct irq_tx_tasklet; 599 struct tasklet_struct irq_prepare_beacon_tasklet; 600 601 struct semaphore wx_sem; 602 struct semaphore rf_sem; 603 struct mutex mutex; 604 605 struct rt_stats stats; 606 struct iw_statistics wstats; 607 struct proc_dir_entry *dir_dev; 608 609 short (*rf_set_sens)(struct net_device *dev, short sens); 610 u8 (*rf_set_chan)(struct net_device *dev, u8 ch); 611 void (*rf_close)(struct net_device *dev); 612 void (*rf_init)(struct net_device *dev); 613 614 struct rx_desc *rx_ring[MAX_RX_QUEUE]; 615 struct sk_buff *rx_buf[MAX_RX_QUEUE][MAX_RX_COUNT]; 616 dma_addr_t rx_ring_dma[MAX_RX_QUEUE]; 617 unsigned int rx_idx[MAX_RX_QUEUE]; 618 int rxringcount; 619 u16 rxbuffersize; 620 621 u64 LastRxDescTSF; 622 623 u16 EarlyRxThreshold; 624 u32 ReceiveConfig; 625 u8 AcmControl; 626 u8 RFProgType; 627 u8 retry_data; 628 u8 retry_rts; 629 u16 rts; 630 631 struct rtl8192_tx_ring tx_ring[MAX_TX_QUEUE_COUNT]; 632 int txringcount; 633 int txbuffsize; 634 int txfwbuffersize; 635 atomic_t tx_pending[0x10]; 636 637 u16 ShortRetryLimit; 638 u16 LongRetryLimit; 639 u32 TransmitConfig; 640 u8 RegCWinMin; 641 u8 keepAliveLevel; 642 643 bool sw_radio_on; 644 bool bHwRadioOff; 645 bool pwrdown; 646 bool blinked_ingpio; 647 u8 polling_timer_on; 648 649 /**********************************************************/ 650 651 enum card_type { 652 PCI, MINIPCI, 653 CARDBUS, USB 654 } card_type; 655 656 struct work_struct qos_activate; 657 658 u8 bIbssCoordinator; 659 660 short promisc; 661 short crcmon; 662 663 int txbeaconcount; 664 665 short chan; 666 short sens; 667 short max_sens; 668 u32 rx_prevlen; 669 670 u8 ScanDelay; 671 bool ps_force; 672 673 u32 irq_mask[2]; 674 675 u8 Rf_Mode; 676 enum nic_t card_8192; 677 u8 card_8192_version; 678 679 short enable_gpio0; 680 681 u8 rf_type; 682 u8 IC_Cut; 683 char nick[IW_ESSID_MAX_SIZE + 1]; 684 685 u8 RegBcnCtrlVal; 686 bool bHwAntDiv; 687 688 bool bTKIPinNmodeFromReg; 689 bool bWEPinNmodeFromReg; 690 691 bool bLedOpenDrain; 692 693 u8 check_roaming_cnt; 694 695 bool bIgnoreSilentReset; 696 u32 SilentResetRxSoltNum; 697 u32 SilentResetRxSlotIndex; 698 u32 SilentResetRxStuckEvent[MAX_SILENT_RESET_RX_SLOT_NUM]; 699 700 void *scan_cmd; 701 u8 hwscan_bw_40; 702 703 u16 nrxAMPDU_size; 704 u8 nrxAMPDU_aggr_num; 705 706 u32 last_rxdesc_tsf_high; 707 u32 last_rxdesc_tsf_low; 708 709 u16 basic_rate; 710 u8 short_preamble; 711 u8 dot11CurrentPreambleMode; 712 u8 slot_time; 713 u16 SifsTime; 714 715 u8 RegWirelessMode; 716 717 u8 firmware_version; 718 u16 FirmwareSubVersion; 719 u16 rf_pathmap; 720 bool AutoloadFailFlag; 721 722 u8 RegPciASPM; 723 u8 RegAMDPciASPM; 724 u8 RegHwSwRfOffD3; 725 u8 RegSupportPciASPM; 726 bool bSupportASPM; 727 728 u32 RfRegChnlVal[2]; 729 730 u8 ShowRateMode; 731 u8 RATRTableBitmap; 732 733 u8 EfuseMap[2][HWSET_MAX_SIZE_92S]; 734 u16 EfuseUsedBytes; 735 u8 EfuseUsedPercentage; 736 737 short epromtype; 738 u16 eeprom_vid; 739 u16 eeprom_did; 740 u16 eeprom_svid; 741 u16 eeprom_smid; 742 u8 eeprom_CustomerID; 743 u16 eeprom_ChannelPlan; 744 u8 eeprom_version; 745 746 u8 EEPROMRegulatory; 747 u8 EEPROMPwrGroup[2][3]; 748 u8 EEPROMOptional; 749 750 u8 EEPROMTxPowerLevelCCK[14]; 751 u8 EEPROMTxPowerLevelOFDM24G[14]; 752 u8 EEPROMTxPowerLevelOFDM5G[24]; 753 u8 EEPROMRfACCKChnl1TxPwLevel[3]; 754 u8 EEPROMRfAOfdmChnlTxPwLevel[3]; 755 u8 EEPROMRfCCCKChnl1TxPwLevel[3]; 756 u8 EEPROMRfCOfdmChnlTxPwLevel[3]; 757 u16 EEPROMTxPowerDiff; 758 u16 EEPROMAntPwDiff; 759 u8 EEPROMThermalMeter; 760 u8 EEPROMPwDiff; 761 u8 EEPROMCrystalCap; 762 763 u8 EEPROMBluetoothCoexist; 764 u8 EEPROMBluetoothType; 765 u8 EEPROMBluetoothAntNum; 766 u8 EEPROMBluetoothAntIsolation; 767 u8 EEPROMBluetoothRadioShared; 768 769 770 u8 EEPROMSupportWoWLAN; 771 u8 EEPROMBoardType; 772 u8 EEPROM_Def_Ver; 773 u8 EEPROMHT2T_TxPwr[6]; 774 u8 EEPROMTSSI_A; 775 u8 EEPROMTSSI_B; 776 u8 EEPROMTxPowerLevelCCK_V1[3]; 777 u8 EEPROMLegacyHTTxPowerDiff; 778 779 u8 BluetoothCoexist; 780 781 u8 CrystalCap; 782 u8 ThermalMeter[2]; 783 784 u16 FwCmdIOMap; 785 u32 FwCmdIOParam; 786 787 u8 SwChnlInProgress; 788 u8 SwChnlStage; 789 u8 SwChnlStep; 790 u8 SetBWModeInProgress; 791 792 u8 nCur40MhzPrimeSC; 793 794 u32 RfReg0Value[4]; 795 u8 NumTotalRFPath; 796 bool brfpath_rxenable[4]; 797 798 bool bTXPowerDataReadFromEEPORM; 799 800 u16 RegChannelPlan; 801 u16 ChannelPlan; 802 bool bChnlPlanFromHW; 803 804 bool RegRfOff; 805 bool isRFOff; 806 bool bInPowerSaveMode; 807 u8 bHwRfOffAction; 808 809 bool aspm_clkreq_enable; 810 u32 pci_bridge_vendor; 811 u8 RegHostPciASPMSetting; 812 u8 RegDevicePciASPMSetting; 813 814 bool RFChangeInProgress; 815 bool SetRFPowerStateInProgress; 816 bool bdisable_nic; 817 818 u8 pwrGroupCnt; 819 820 u8 ThermalValue_LCK; 821 u8 ThermalValue_IQK; 822 bool bRfPiEnable; 823 824 u32 APKoutput[2][2]; 825 bool bAPKdone; 826 827 long RegE94; 828 long RegE9C; 829 long RegEB4; 830 long RegEBC; 831 832 u32 RegC04; 833 u32 Reg874; 834 u32 RegC08; 835 u32 ADDA_backup[16]; 836 u32 IQK_MAC_backup[3]; 837 838 bool SetFwCmdInProgress; 839 u8 CurrentFwCmdIO; 840 841 u8 rssi_level; 842 843 bool bInformFWDriverControlDM; 844 u8 PwrGroupHT20[2][14]; 845 u8 PwrGroupHT40[2][14]; 846 847 u8 ThermalValue; 848 long EntryMinUndecoratedSmoothedPWDB; 849 long EntryMaxUndecoratedSmoothedPWDB; 850 u8 DynamicTxHighPowerLvl; 851 u8 LastDTPLvl; 852 u32 CurrentRATR0; 853 struct false_alarm_stats FalseAlmCnt; 854 855 u8 DMFlag; 856 u8 DM_Type; 857 858 u8 CckPwEnl; 859 u16 TSSI_13dBm; 860 u32 Pwr_Track; 861 u8 CCKPresentAttentuation_20Mdefault; 862 u8 CCKPresentAttentuation_40Mdefault; 863 char CCKPresentAttentuation_difference; 864 char CCKPresentAttentuation; 865 u8 bCckHighPower; 866 long undecorated_smoothed_pwdb; 867 long undecorated_smoothed_cck_adc_pwdb[4]; 868 869 u32 MCSTxPowerLevelOriginalOffset[6]; 870 u32 CCKTxPowerLevelOriginalOffset; 871 u8 TxPowerLevelCCK[14]; 872 u8 TxPowerLevelCCK_A[14]; 873 u8 TxPowerLevelCCK_C[14]; 874 u8 TxPowerLevelOFDM24G[14]; 875 u8 TxPowerLevelOFDM5G[14]; 876 u8 TxPowerLevelOFDM24G_A[14]; 877 u8 TxPowerLevelOFDM24G_C[14]; 878 u8 LegacyHTTxPowerDiff; 879 u8 TxPowerDiff; 880 s8 RF_C_TxPwDiff; 881 s8 RF_B_TxPwDiff; 882 u8 RfTxPwrLevelCck[2][14]; 883 u8 RfTxPwrLevelOfdm1T[2][14]; 884 u8 RfTxPwrLevelOfdm2T[2][14]; 885 u8 AntennaTxPwDiff[3]; 886 u8 TxPwrHt20Diff[2][14]; 887 u8 TxPwrLegacyHtDiff[2][14]; 888 u8 TxPwrSafetyFlag; 889 u8 HT2T_TxPwr_A[14]; 890 u8 HT2T_TxPwr_B[14]; 891 u8 CurrentCckTxPwrIdx; 892 u8 CurrentOfdm24GTxPwrIdx; 893 894 bool bdynamic_txpower; 895 bool bDynamicTxHighPower; 896 bool bDynamicTxLowPower; 897 bool bLastDTPFlag_High; 898 bool bLastDTPFlag_Low; 899 900 bool bstore_last_dtpflag; 901 bool bstart_txctrl_bydtp; 902 903 u8 rfa_txpowertrackingindex; 904 u8 rfa_txpowertrackingindex_real; 905 u8 rfa_txpowertracking_default; 906 u8 rfc_txpowertrackingindex; 907 u8 rfc_txpowertrackingindex_real; 908 u8 rfc_txpowertracking_default; 909 bool btxpower_tracking; 910 bool bcck_in_ch14; 911 912 u8 TxPowerTrackControl; 913 u8 txpower_count; 914 bool btxpower_trackingInit; 915 916 u8 OFDM_index[2]; 917 u8 CCK_index; 918 919 u8 Record_CCK_20Mindex; 920 u8 Record_CCK_40Mindex; 921 922 struct init_gain initgain_backup; 923 u8 DefaultInitialGain[4]; 924 bool bis_any_nonbepkts; 925 bool bcurrent_turbo_EDCA; 926 bool bis_cur_rdlstate; 927 928 bool bCCKinCH14; 929 930 u8 MidHighPwrTHR_L1; 931 u8 MidHighPwrTHR_L2; 932 933 bool bfsync_processing; 934 u32 rate_record; 935 u32 rateCountDiffRecord; 936 u32 ContinueDiffCount; 937 bool bswitch_fsync; 938 u8 framesync; 939 u32 framesyncC34; 940 u8 framesyncMonitor; 941 942 bool bDMInitialGainEnable; 943 bool MutualAuthenticationFail; 944 945 bool bDisableFrameBursting; 946 947 u32 reset_count; 948 bool bpbc_pressed; 949 950 u32 txpower_checkcnt; 951 u32 txpower_tracking_callback_cnt; 952 u8 thermal_read_val[40]; 953 u8 thermal_readback_index; 954 u32 ccktxpower_adjustcnt_not_ch14; 955 u32 ccktxpower_adjustcnt_ch14; 956 957 enum reset_type ResetProgress; 958 bool bForcedSilentReset; 959 bool bDisableNormalResetCheck; 960 u16 TxCounter; 961 u16 RxCounter; 962 int IrpPendingCount; 963 bool bResetInProgress; 964 bool force_reset; 965 bool force_lps; 966 u8 InitialGainOperateType; 967 968 bool chan_forced; 969 bool bSingleCarrier; 970 bool RegBoard; 971 bool bCckContTx; 972 bool bOfdmContTx; 973 bool bStartContTx; 974 u8 RegPaModel; 975 u8 btMpCckTxPower; 976 u8 btMpOfdmTxPower; 977 978 u32 MptActType; 979 u32 MptIoOffset; 980 u32 MptIoValue; 981 u32 MptRfPath; 982 983 u32 MptBandWidth; 984 u32 MptRateIndex; 985 u8 MptChannelToSw; 986 u32 MptRCR; 987 988 u8 PwrDomainProtect; 989 u8 H2CTxCmdSeq; 990 991 992 }; 993 994 extern const struct ethtool_ops rtl819x_ethtool_ops; 995 996 void rtl8192_tx_cmd(struct net_device *dev, struct sk_buff *skb); 997 short rtl8192_tx(struct net_device *dev, struct sk_buff *skb); 998 999 u8 read_nic_io_byte(struct net_device *dev, int x); 1000 u32 read_nic_io_dword(struct net_device *dev, int x); 1001 u16 read_nic_io_word(struct net_device *dev, int x); 1002 void write_nic_io_byte(struct net_device *dev, int x, u8 y); 1003 void write_nic_io_word(struct net_device *dev, int x, u16 y); 1004 void write_nic_io_dword(struct net_device *dev, int x, u32 y); 1005 1006 u8 read_nic_byte(struct net_device *dev, int x); 1007 u32 read_nic_dword(struct net_device *dev, int x); 1008 u16 read_nic_word(struct net_device *dev, int x); 1009 void write_nic_byte(struct net_device *dev, int x, u8 y); 1010 void write_nic_word(struct net_device *dev, int x, u16 y); 1011 void write_nic_dword(struct net_device *dev, int x, u32 y); 1012 1013 void force_pci_posting(struct net_device *dev); 1014 1015 void rtl8192_rx_enable(struct net_device *); 1016 void rtl8192_tx_enable(struct net_device *); 1017 1018 int rtl8192_hard_start_xmit(struct sk_buff *skb, struct net_device *dev); 1019 void rtl8192_hard_data_xmit(struct sk_buff *skb, struct net_device *dev, 1020 int rate); 1021 void rtl8192_data_hard_stop(struct net_device *dev); 1022 void rtl8192_data_hard_resume(struct net_device *dev); 1023 void rtl8192_restart(void *data); 1024 void rtl819x_watchdog_wqcallback(void *data); 1025 void rtl8192_hw_sleep_wq(void *data); 1026 void watch_dog_timer_callback(unsigned long data); 1027 void rtl8192_irq_rx_tasklet(struct r8192_priv *priv); 1028 void rtl8192_irq_tx_tasklet(struct r8192_priv *priv); 1029 int rtl8192_down(struct net_device *dev, bool shutdownrf); 1030 int rtl8192_up(struct net_device *dev); 1031 void rtl8192_commit(struct net_device *dev); 1032 void rtl8192_set_chan(struct net_device *dev, short ch); 1033 1034 void check_rfctrl_gpio_timer(unsigned long data); 1035 1036 void rtl8192_hw_wakeup_wq(void *data); 1037 short rtl8192_pci_initdescring(struct net_device *dev); 1038 1039 void rtl8192_cancel_deferred_work(struct r8192_priv *priv); 1040 1041 int _rtl8192_up(struct net_device *dev, bool is_silent_reset); 1042 1043 short rtl8192_is_tx_queue_empty(struct net_device *dev); 1044 void rtl8192_irq_disable(struct net_device *dev); 1045 1046 void rtl8192_tx_timeout(struct net_device *dev); 1047 void rtl8192_pci_resetdescring(struct net_device *dev); 1048 void rtl8192_SetWirelessMode(struct net_device *dev, u8 wireless_mode); 1049 void rtl8192_irq_enable(struct net_device *dev); 1050 void rtl8192_config_rate(struct net_device *dev, u16 *rate_config); 1051 void rtl8192_update_cap(struct net_device *dev, u16 cap); 1052 void rtl8192_irq_disable(struct net_device *dev); 1053 1054 void rtl819x_UpdateRxPktTimeStamp(struct net_device *dev, 1055 struct rtllib_rx_stats *stats); 1056 long rtl819x_translate_todbm(struct r8192_priv *priv, u8 signal_strength_index); 1057 void rtl819x_update_rxsignalstatistics8190pci(struct r8192_priv *priv, 1058 struct rtllib_rx_stats *pprevious_stats); 1059 u8 rtl819x_evm_dbtopercentage(char value); 1060 void rtl819x_process_cck_rxpathsel(struct r8192_priv *priv, 1061 struct rtllib_rx_stats *pprevious_stats); 1062 u8 rtl819x_query_rxpwrpercentage(char antpower); 1063 void rtl8192_record_rxdesc_forlateruse(struct rtllib_rx_stats *psrc_stats, 1064 struct rtllib_rx_stats *ptarget_stats); 1065 bool NicIFEnableNIC(struct net_device *dev); 1066 bool NicIFDisableNIC(struct net_device *dev); 1067 1068 bool MgntActSet_RF_State(struct net_device *dev, 1069 enum rt_rf_power_state StateToSet, 1070 RT_RF_CHANGE_SOURCE ChangeSource, 1071 bool ProtectOrNot); 1072 void ActUpdateChannelAccessSetting(struct net_device *dev, 1073 enum wireless_mode WirelessMode, 1074 struct channel_access_setting *ChnlAccessSetting); 1075 1076 #endif 1077