1 /*
2  * Universal Flash Storage Host controller driver Core
3  *
4  * This code is based on drivers/scsi/ufs/ufshcd.c
5  * Copyright (C) 2011-2013 Samsung India Software Operations
6  * Copyright (c) 2013-2014, The Linux Foundation. All rights reserved.
7  *
8  * Authors:
9  *	Santosh Yaraganavi <santosh.sy@samsung.com>
10  *	Vinayak Holikatti <h.vinayak@samsung.com>
11  *
12  * This program is free software; you can redistribute it and/or
13  * modify it under the terms of the GNU General Public License
14  * as published by the Free Software Foundation; either version 2
15  * of the License, or (at your option) any later version.
16  * See the COPYING file in the top-level directory or visit
17  * <http://www.gnu.org/licenses/gpl-2.0.html>
18  *
19  * This program is distributed in the hope that it will be useful,
20  * but WITHOUT ANY WARRANTY; without even the implied warranty of
21  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
22  * GNU General Public License for more details.
23  *
24  * This program is provided "AS IS" and "WITH ALL FAULTS" and
25  * without warranty of any kind. You are solely responsible for
26  * determining the appropriateness of using and distributing
27  * the program and assume all risks associated with your exercise
28  * of rights with respect to the program, including but not limited
29  * to infringement of third party rights, the risks and costs of
30  * program errors, damage to or loss of data, programs or equipment,
31  * and unavailability or interruption of operations. Under no
32  * circumstances will the contributor of this Program be liable for
33  * any damages of any kind arising from your use or distribution of
34  * this program.
35  *
36  * The Linux Foundation chooses to take subject only to the GPLv2
37  * license terms, and distributes only under these terms.
38  */
39 
40 #include <linux/async.h>
41 #include <linux/devfreq.h>
42 
43 #include "ufshcd.h"
44 #include "unipro.h"
45 
46 #define UFSHCD_ENABLE_INTRS	(UTP_TRANSFER_REQ_COMPL |\
47 				 UTP_TASK_REQ_COMPL |\
48 				 UFSHCD_ERROR_MASK)
49 /* UIC command timeout, unit: ms */
50 #define UIC_CMD_TIMEOUT	500
51 
52 /* NOP OUT retries waiting for NOP IN response */
53 #define NOP_OUT_RETRIES    10
54 /* Timeout after 30 msecs if NOP OUT hangs without response */
55 #define NOP_OUT_TIMEOUT    30 /* msecs */
56 
57 /* Query request retries */
58 #define QUERY_REQ_RETRIES 10
59 /* Query request timeout */
60 #define QUERY_REQ_TIMEOUT 30 /* msec */
61 
62 /* Task management command timeout */
63 #define TM_CMD_TIMEOUT	100 /* msecs */
64 
65 /* maximum number of link-startup retries */
66 #define DME_LINKSTARTUP_RETRIES 3
67 
68 /* maximum number of reset retries before giving up */
69 #define MAX_HOST_RESET_RETRIES 5
70 
71 /* Expose the flag value from utp_upiu_query.value */
72 #define MASK_QUERY_UPIU_FLAG_LOC 0xFF
73 
74 /* Interrupt aggregation default timeout, unit: 40us */
75 #define INT_AGGR_DEF_TO	0x02
76 
77 #define ufshcd_toggle_vreg(_dev, _vreg, _on)				\
78 	({                                                              \
79 		int _ret;                                               \
80 		if (_on)                                                \
81 			_ret = ufshcd_enable_vreg(_dev, _vreg);         \
82 		else                                                    \
83 			_ret = ufshcd_disable_vreg(_dev, _vreg);        \
84 		_ret;                                                   \
85 	})
86 
87 static u32 ufs_query_desc_max_size[] = {
88 	QUERY_DESC_DEVICE_MAX_SIZE,
89 	QUERY_DESC_CONFIGURAION_MAX_SIZE,
90 	QUERY_DESC_UNIT_MAX_SIZE,
91 	QUERY_DESC_RFU_MAX_SIZE,
92 	QUERY_DESC_INTERCONNECT_MAX_SIZE,
93 	QUERY_DESC_STRING_MAX_SIZE,
94 	QUERY_DESC_RFU_MAX_SIZE,
95 	QUERY_DESC_GEOMETRY_MAZ_SIZE,
96 	QUERY_DESC_POWER_MAX_SIZE,
97 	QUERY_DESC_RFU_MAX_SIZE,
98 };
99 
100 enum {
101 	UFSHCD_MAX_CHANNEL	= 0,
102 	UFSHCD_MAX_ID		= 1,
103 	UFSHCD_CMD_PER_LUN	= 32,
104 	UFSHCD_CAN_QUEUE	= 32,
105 };
106 
107 /* UFSHCD states */
108 enum {
109 	UFSHCD_STATE_RESET,
110 	UFSHCD_STATE_ERROR,
111 	UFSHCD_STATE_OPERATIONAL,
112 };
113 
114 /* UFSHCD error handling flags */
115 enum {
116 	UFSHCD_EH_IN_PROGRESS = (1 << 0),
117 };
118 
119 /* UFSHCD UIC layer error flags */
120 enum {
121 	UFSHCD_UIC_DL_PA_INIT_ERROR = (1 << 0), /* Data link layer error */
122 	UFSHCD_UIC_NL_ERROR = (1 << 1), /* Network layer error */
123 	UFSHCD_UIC_TL_ERROR = (1 << 2), /* Transport Layer error */
124 	UFSHCD_UIC_DME_ERROR = (1 << 3), /* DME error */
125 };
126 
127 /* Interrupt configuration options */
128 enum {
129 	UFSHCD_INT_DISABLE,
130 	UFSHCD_INT_ENABLE,
131 	UFSHCD_INT_CLEAR,
132 };
133 
134 #define ufshcd_set_eh_in_progress(h) \
135 	(h->eh_flags |= UFSHCD_EH_IN_PROGRESS)
136 #define ufshcd_eh_in_progress(h) \
137 	(h->eh_flags & UFSHCD_EH_IN_PROGRESS)
138 #define ufshcd_clear_eh_in_progress(h) \
139 	(h->eh_flags &= ~UFSHCD_EH_IN_PROGRESS)
140 
141 #define ufshcd_set_ufs_dev_active(h) \
142 	((h)->curr_dev_pwr_mode = UFS_ACTIVE_PWR_MODE)
143 #define ufshcd_set_ufs_dev_sleep(h) \
144 	((h)->curr_dev_pwr_mode = UFS_SLEEP_PWR_MODE)
145 #define ufshcd_set_ufs_dev_poweroff(h) \
146 	((h)->curr_dev_pwr_mode = UFS_POWERDOWN_PWR_MODE)
147 #define ufshcd_is_ufs_dev_active(h) \
148 	((h)->curr_dev_pwr_mode == UFS_ACTIVE_PWR_MODE)
149 #define ufshcd_is_ufs_dev_sleep(h) \
150 	((h)->curr_dev_pwr_mode == UFS_SLEEP_PWR_MODE)
151 #define ufshcd_is_ufs_dev_poweroff(h) \
152 	((h)->curr_dev_pwr_mode == UFS_POWERDOWN_PWR_MODE)
153 
154 static struct ufs_pm_lvl_states ufs_pm_lvl_states[] = {
155 	{UFS_ACTIVE_PWR_MODE, UIC_LINK_ACTIVE_STATE},
156 	{UFS_ACTIVE_PWR_MODE, UIC_LINK_HIBERN8_STATE},
157 	{UFS_SLEEP_PWR_MODE, UIC_LINK_ACTIVE_STATE},
158 	{UFS_SLEEP_PWR_MODE, UIC_LINK_HIBERN8_STATE},
159 	{UFS_POWERDOWN_PWR_MODE, UIC_LINK_HIBERN8_STATE},
160 	{UFS_POWERDOWN_PWR_MODE, UIC_LINK_OFF_STATE},
161 };
162 
163 static inline enum ufs_dev_pwr_mode
ufs_get_pm_lvl_to_dev_pwr_mode(enum ufs_pm_level lvl)164 ufs_get_pm_lvl_to_dev_pwr_mode(enum ufs_pm_level lvl)
165 {
166 	return ufs_pm_lvl_states[lvl].dev_state;
167 }
168 
169 static inline enum uic_link_state
ufs_get_pm_lvl_to_link_pwr_state(enum ufs_pm_level lvl)170 ufs_get_pm_lvl_to_link_pwr_state(enum ufs_pm_level lvl)
171 {
172 	return ufs_pm_lvl_states[lvl].link_state;
173 }
174 
175 static void ufshcd_tmc_handler(struct ufs_hba *hba);
176 static void ufshcd_async_scan(void *data, async_cookie_t cookie);
177 static int ufshcd_reset_and_restore(struct ufs_hba *hba);
178 static int ufshcd_clear_tm_cmd(struct ufs_hba *hba, int tag);
179 static void ufshcd_hba_exit(struct ufs_hba *hba);
180 static int ufshcd_probe_hba(struct ufs_hba *hba);
181 static int __ufshcd_setup_clocks(struct ufs_hba *hba, bool on,
182 				 bool skip_ref_clk);
183 static int ufshcd_setup_clocks(struct ufs_hba *hba, bool on);
184 static int ufshcd_uic_hibern8_exit(struct ufs_hba *hba);
185 static int ufshcd_uic_hibern8_enter(struct ufs_hba *hba);
186 static inline void ufshcd_add_delay_before_dme_cmd(struct ufs_hba *hba);
187 static int ufshcd_host_reset_and_restore(struct ufs_hba *hba);
188 static irqreturn_t ufshcd_intr(int irq, void *__hba);
189 static int ufshcd_config_pwr_mode(struct ufs_hba *hba,
190 		struct ufs_pa_layer_attr *desired_pwr_mode);
191 static int ufshcd_change_power_mode(struct ufs_hba *hba,
192 			     struct ufs_pa_layer_attr *pwr_mode);
193 
ufshcd_enable_irq(struct ufs_hba * hba)194 static inline int ufshcd_enable_irq(struct ufs_hba *hba)
195 {
196 	int ret = 0;
197 
198 	if (!hba->is_irq_enabled) {
199 		ret = request_irq(hba->irq, ufshcd_intr, IRQF_SHARED, UFSHCD,
200 				hba);
201 		if (ret)
202 			dev_err(hba->dev, "%s: request_irq failed, ret=%d\n",
203 				__func__, ret);
204 		hba->is_irq_enabled = true;
205 	}
206 
207 	return ret;
208 }
209 
ufshcd_disable_irq(struct ufs_hba * hba)210 static inline void ufshcd_disable_irq(struct ufs_hba *hba)
211 {
212 	if (hba->is_irq_enabled) {
213 		free_irq(hba->irq, hba);
214 		hba->is_irq_enabled = false;
215 	}
216 }
217 
218 /*
219  * ufshcd_wait_for_register - wait for register value to change
220  * @hba - per-adapter interface
221  * @reg - mmio register offset
222  * @mask - mask to apply to read register value
223  * @val - wait condition
224  * @interval_us - polling interval in microsecs
225  * @timeout_ms - timeout in millisecs
226  *
227  * Returns -ETIMEDOUT on error, zero on success
228  */
ufshcd_wait_for_register(struct ufs_hba * hba,u32 reg,u32 mask,u32 val,unsigned long interval_us,unsigned long timeout_ms)229 static int ufshcd_wait_for_register(struct ufs_hba *hba, u32 reg, u32 mask,
230 		u32 val, unsigned long interval_us, unsigned long timeout_ms)
231 {
232 	int err = 0;
233 	unsigned long timeout = jiffies + msecs_to_jiffies(timeout_ms);
234 
235 	/* ignore bits that we don't intend to wait on */
236 	val = val & mask;
237 
238 	while ((ufshcd_readl(hba, reg) & mask) != val) {
239 		/* wakeup within 50us of expiry */
240 		usleep_range(interval_us, interval_us + 50);
241 
242 		if (time_after(jiffies, timeout)) {
243 			if ((ufshcd_readl(hba, reg) & mask) != val)
244 				err = -ETIMEDOUT;
245 			break;
246 		}
247 	}
248 
249 	return err;
250 }
251 
252 /**
253  * ufshcd_get_intr_mask - Get the interrupt bit mask
254  * @hba - Pointer to adapter instance
255  *
256  * Returns interrupt bit mask per version
257  */
ufshcd_get_intr_mask(struct ufs_hba * hba)258 static inline u32 ufshcd_get_intr_mask(struct ufs_hba *hba)
259 {
260 	if (hba->ufs_version == UFSHCI_VERSION_10)
261 		return INTERRUPT_MASK_ALL_VER_10;
262 	else
263 		return INTERRUPT_MASK_ALL_VER_11;
264 }
265 
266 /**
267  * ufshcd_get_ufs_version - Get the UFS version supported by the HBA
268  * @hba - Pointer to adapter instance
269  *
270  * Returns UFSHCI version supported by the controller
271  */
ufshcd_get_ufs_version(struct ufs_hba * hba)272 static inline u32 ufshcd_get_ufs_version(struct ufs_hba *hba)
273 {
274 	if (hba->quirks & UFSHCD_QUIRK_BROKEN_UFS_HCI_VERSION)
275 		return ufshcd_vops_get_ufs_hci_version(hba);
276 
277 	return ufshcd_readl(hba, REG_UFS_VERSION);
278 }
279 
280 /**
281  * ufshcd_is_device_present - Check if any device connected to
282  *			      the host controller
283  * @hba: pointer to adapter instance
284  *
285  * Returns 1 if device present, 0 if no device detected
286  */
ufshcd_is_device_present(struct ufs_hba * hba)287 static inline int ufshcd_is_device_present(struct ufs_hba *hba)
288 {
289 	return (ufshcd_readl(hba, REG_CONTROLLER_STATUS) &
290 						DEVICE_PRESENT) ? 1 : 0;
291 }
292 
293 /**
294  * ufshcd_get_tr_ocs - Get the UTRD Overall Command Status
295  * @lrb: pointer to local command reference block
296  *
297  * This function is used to get the OCS field from UTRD
298  * Returns the OCS field in the UTRD
299  */
ufshcd_get_tr_ocs(struct ufshcd_lrb * lrbp)300 static inline int ufshcd_get_tr_ocs(struct ufshcd_lrb *lrbp)
301 {
302 	return le32_to_cpu(lrbp->utr_descriptor_ptr->header.dword_2) & MASK_OCS;
303 }
304 
305 /**
306  * ufshcd_get_tmr_ocs - Get the UTMRD Overall Command Status
307  * @task_req_descp: pointer to utp_task_req_desc structure
308  *
309  * This function is used to get the OCS field from UTMRD
310  * Returns the OCS field in the UTMRD
311  */
312 static inline int
ufshcd_get_tmr_ocs(struct utp_task_req_desc * task_req_descp)313 ufshcd_get_tmr_ocs(struct utp_task_req_desc *task_req_descp)
314 {
315 	return le32_to_cpu(task_req_descp->header.dword_2) & MASK_OCS;
316 }
317 
318 /**
319  * ufshcd_get_tm_free_slot - get a free slot for task management request
320  * @hba: per adapter instance
321  * @free_slot: pointer to variable with available slot value
322  *
323  * Get a free tag and lock it until ufshcd_put_tm_slot() is called.
324  * Returns 0 if free slot is not available, else return 1 with tag value
325  * in @free_slot.
326  */
ufshcd_get_tm_free_slot(struct ufs_hba * hba,int * free_slot)327 static bool ufshcd_get_tm_free_slot(struct ufs_hba *hba, int *free_slot)
328 {
329 	int tag;
330 	bool ret = false;
331 
332 	if (!free_slot)
333 		goto out;
334 
335 	do {
336 		tag = find_first_zero_bit(&hba->tm_slots_in_use, hba->nutmrs);
337 		if (tag >= hba->nutmrs)
338 			goto out;
339 	} while (test_and_set_bit_lock(tag, &hba->tm_slots_in_use));
340 
341 	*free_slot = tag;
342 	ret = true;
343 out:
344 	return ret;
345 }
346 
ufshcd_put_tm_slot(struct ufs_hba * hba,int slot)347 static inline void ufshcd_put_tm_slot(struct ufs_hba *hba, int slot)
348 {
349 	clear_bit_unlock(slot, &hba->tm_slots_in_use);
350 }
351 
352 /**
353  * ufshcd_utrl_clear - Clear a bit in UTRLCLR register
354  * @hba: per adapter instance
355  * @pos: position of the bit to be cleared
356  */
ufshcd_utrl_clear(struct ufs_hba * hba,u32 pos)357 static inline void ufshcd_utrl_clear(struct ufs_hba *hba, u32 pos)
358 {
359 	ufshcd_writel(hba, ~(1 << pos), REG_UTP_TRANSFER_REQ_LIST_CLEAR);
360 }
361 
362 /**
363  * ufshcd_get_lists_status - Check UCRDY, UTRLRDY and UTMRLRDY
364  * @reg: Register value of host controller status
365  *
366  * Returns integer, 0 on Success and positive value if failed
367  */
ufshcd_get_lists_status(u32 reg)368 static inline int ufshcd_get_lists_status(u32 reg)
369 {
370 	/*
371 	 * The mask 0xFF is for the following HCS register bits
372 	 * Bit		Description
373 	 *  0		Device Present
374 	 *  1		UTRLRDY
375 	 *  2		UTMRLRDY
376 	 *  3		UCRDY
377 	 *  4		HEI
378 	 *  5		DEI
379 	 * 6-7		reserved
380 	 */
381 	return (((reg) & (0xFF)) >> 1) ^ (0x07);
382 }
383 
384 /**
385  * ufshcd_get_uic_cmd_result - Get the UIC command result
386  * @hba: Pointer to adapter instance
387  *
388  * This function gets the result of UIC command completion
389  * Returns 0 on success, non zero value on error
390  */
ufshcd_get_uic_cmd_result(struct ufs_hba * hba)391 static inline int ufshcd_get_uic_cmd_result(struct ufs_hba *hba)
392 {
393 	return ufshcd_readl(hba, REG_UIC_COMMAND_ARG_2) &
394 	       MASK_UIC_COMMAND_RESULT;
395 }
396 
397 /**
398  * ufshcd_get_dme_attr_val - Get the value of attribute returned by UIC command
399  * @hba: Pointer to adapter instance
400  *
401  * This function gets UIC command argument3
402  * Returns 0 on success, non zero value on error
403  */
ufshcd_get_dme_attr_val(struct ufs_hba * hba)404 static inline u32 ufshcd_get_dme_attr_val(struct ufs_hba *hba)
405 {
406 	return ufshcd_readl(hba, REG_UIC_COMMAND_ARG_3);
407 }
408 
409 /**
410  * ufshcd_get_req_rsp - returns the TR response transaction type
411  * @ucd_rsp_ptr: pointer to response UPIU
412  */
413 static inline int
ufshcd_get_req_rsp(struct utp_upiu_rsp * ucd_rsp_ptr)414 ufshcd_get_req_rsp(struct utp_upiu_rsp *ucd_rsp_ptr)
415 {
416 	return be32_to_cpu(ucd_rsp_ptr->header.dword_0) >> 24;
417 }
418 
419 /**
420  * ufshcd_get_rsp_upiu_result - Get the result from response UPIU
421  * @ucd_rsp_ptr: pointer to response UPIU
422  *
423  * This function gets the response status and scsi_status from response UPIU
424  * Returns the response result code.
425  */
426 static inline int
ufshcd_get_rsp_upiu_result(struct utp_upiu_rsp * ucd_rsp_ptr)427 ufshcd_get_rsp_upiu_result(struct utp_upiu_rsp *ucd_rsp_ptr)
428 {
429 	return be32_to_cpu(ucd_rsp_ptr->header.dword_1) & MASK_RSP_UPIU_RESULT;
430 }
431 
432 /*
433  * ufshcd_get_rsp_upiu_data_seg_len - Get the data segment length
434  *				from response UPIU
435  * @ucd_rsp_ptr: pointer to response UPIU
436  *
437  * Return the data segment length.
438  */
439 static inline unsigned int
ufshcd_get_rsp_upiu_data_seg_len(struct utp_upiu_rsp * ucd_rsp_ptr)440 ufshcd_get_rsp_upiu_data_seg_len(struct utp_upiu_rsp *ucd_rsp_ptr)
441 {
442 	return be32_to_cpu(ucd_rsp_ptr->header.dword_2) &
443 		MASK_RSP_UPIU_DATA_SEG_LEN;
444 }
445 
446 /**
447  * ufshcd_is_exception_event - Check if the device raised an exception event
448  * @ucd_rsp_ptr: pointer to response UPIU
449  *
450  * The function checks if the device raised an exception event indicated in
451  * the Device Information field of response UPIU.
452  *
453  * Returns true if exception is raised, false otherwise.
454  */
ufshcd_is_exception_event(struct utp_upiu_rsp * ucd_rsp_ptr)455 static inline bool ufshcd_is_exception_event(struct utp_upiu_rsp *ucd_rsp_ptr)
456 {
457 	return be32_to_cpu(ucd_rsp_ptr->header.dword_2) &
458 			MASK_RSP_EXCEPTION_EVENT ? true : false;
459 }
460 
461 /**
462  * ufshcd_reset_intr_aggr - Reset interrupt aggregation values.
463  * @hba: per adapter instance
464  */
465 static inline void
ufshcd_reset_intr_aggr(struct ufs_hba * hba)466 ufshcd_reset_intr_aggr(struct ufs_hba *hba)
467 {
468 	ufshcd_writel(hba, INT_AGGR_ENABLE |
469 		      INT_AGGR_COUNTER_AND_TIMER_RESET,
470 		      REG_UTP_TRANSFER_REQ_INT_AGG_CONTROL);
471 }
472 
473 /**
474  * ufshcd_config_intr_aggr - Configure interrupt aggregation values.
475  * @hba: per adapter instance
476  * @cnt: Interrupt aggregation counter threshold
477  * @tmout: Interrupt aggregation timeout value
478  */
479 static inline void
ufshcd_config_intr_aggr(struct ufs_hba * hba,u8 cnt,u8 tmout)480 ufshcd_config_intr_aggr(struct ufs_hba *hba, u8 cnt, u8 tmout)
481 {
482 	ufshcd_writel(hba, INT_AGGR_ENABLE | INT_AGGR_PARAM_WRITE |
483 		      INT_AGGR_COUNTER_THLD_VAL(cnt) |
484 		      INT_AGGR_TIMEOUT_VAL(tmout),
485 		      REG_UTP_TRANSFER_REQ_INT_AGG_CONTROL);
486 }
487 
488 /**
489  * ufshcd_disable_intr_aggr - Disables interrupt aggregation.
490  * @hba: per adapter instance
491  */
ufshcd_disable_intr_aggr(struct ufs_hba * hba)492 static inline void ufshcd_disable_intr_aggr(struct ufs_hba *hba)
493 {
494 	ufshcd_writel(hba, 0, REG_UTP_TRANSFER_REQ_INT_AGG_CONTROL);
495 }
496 
497 /**
498  * ufshcd_enable_run_stop_reg - Enable run-stop registers,
499  *			When run-stop registers are set to 1, it indicates the
500  *			host controller that it can process the requests
501  * @hba: per adapter instance
502  */
ufshcd_enable_run_stop_reg(struct ufs_hba * hba)503 static void ufshcd_enable_run_stop_reg(struct ufs_hba *hba)
504 {
505 	ufshcd_writel(hba, UTP_TASK_REQ_LIST_RUN_STOP_BIT,
506 		      REG_UTP_TASK_REQ_LIST_RUN_STOP);
507 	ufshcd_writel(hba, UTP_TRANSFER_REQ_LIST_RUN_STOP_BIT,
508 		      REG_UTP_TRANSFER_REQ_LIST_RUN_STOP);
509 }
510 
511 /**
512  * ufshcd_hba_start - Start controller initialization sequence
513  * @hba: per adapter instance
514  */
ufshcd_hba_start(struct ufs_hba * hba)515 static inline void ufshcd_hba_start(struct ufs_hba *hba)
516 {
517 	ufshcd_writel(hba, CONTROLLER_ENABLE, REG_CONTROLLER_ENABLE);
518 }
519 
520 /**
521  * ufshcd_is_hba_active - Get controller state
522  * @hba: per adapter instance
523  *
524  * Returns zero if controller is active, 1 otherwise
525  */
ufshcd_is_hba_active(struct ufs_hba * hba)526 static inline int ufshcd_is_hba_active(struct ufs_hba *hba)
527 {
528 	return (ufshcd_readl(hba, REG_CONTROLLER_ENABLE) & 0x1) ? 0 : 1;
529 }
530 
ufshcd_ungate_work(struct work_struct * work)531 static void ufshcd_ungate_work(struct work_struct *work)
532 {
533 	int ret;
534 	unsigned long flags;
535 	struct ufs_hba *hba = container_of(work, struct ufs_hba,
536 			clk_gating.ungate_work);
537 
538 	cancel_delayed_work_sync(&hba->clk_gating.gate_work);
539 
540 	spin_lock_irqsave(hba->host->host_lock, flags);
541 	if (hba->clk_gating.state == CLKS_ON) {
542 		spin_unlock_irqrestore(hba->host->host_lock, flags);
543 		goto unblock_reqs;
544 	}
545 
546 	spin_unlock_irqrestore(hba->host->host_lock, flags);
547 	ufshcd_setup_clocks(hba, true);
548 
549 	/* Exit from hibern8 */
550 	if (ufshcd_can_hibern8_during_gating(hba)) {
551 		/* Prevent gating in this path */
552 		hba->clk_gating.is_suspended = true;
553 		if (ufshcd_is_link_hibern8(hba)) {
554 			ret = ufshcd_uic_hibern8_exit(hba);
555 			if (ret)
556 				dev_err(hba->dev, "%s: hibern8 exit failed %d\n",
557 					__func__, ret);
558 			else
559 				ufshcd_set_link_active(hba);
560 		}
561 		hba->clk_gating.is_suspended = false;
562 	}
563 unblock_reqs:
564 	if (ufshcd_is_clkscaling_enabled(hba))
565 		devfreq_resume_device(hba->devfreq);
566 	scsi_unblock_requests(hba->host);
567 }
568 
569 /**
570  * ufshcd_hold - Enable clocks that were gated earlier due to ufshcd_release.
571  * Also, exit from hibern8 mode and set the link as active.
572  * @hba: per adapter instance
573  * @async: This indicates whether caller should ungate clocks asynchronously.
574  */
ufshcd_hold(struct ufs_hba * hba,bool async)575 int ufshcd_hold(struct ufs_hba *hba, bool async)
576 {
577 	int rc = 0;
578 	unsigned long flags;
579 
580 	if (!ufshcd_is_clkgating_allowed(hba))
581 		goto out;
582 	spin_lock_irqsave(hba->host->host_lock, flags);
583 	hba->clk_gating.active_reqs++;
584 
585 start:
586 	switch (hba->clk_gating.state) {
587 	case CLKS_ON:
588 		break;
589 	case REQ_CLKS_OFF:
590 		if (cancel_delayed_work(&hba->clk_gating.gate_work)) {
591 			hba->clk_gating.state = CLKS_ON;
592 			break;
593 		}
594 		/*
595 		 * If we here, it means gating work is either done or
596 		 * currently running. Hence, fall through to cancel gating
597 		 * work and to enable clocks.
598 		 */
599 	case CLKS_OFF:
600 		scsi_block_requests(hba->host);
601 		hba->clk_gating.state = REQ_CLKS_ON;
602 		schedule_work(&hba->clk_gating.ungate_work);
603 		/*
604 		 * fall through to check if we should wait for this
605 		 * work to be done or not.
606 		 */
607 	case REQ_CLKS_ON:
608 		if (async) {
609 			rc = -EAGAIN;
610 			hba->clk_gating.active_reqs--;
611 			break;
612 		}
613 
614 		spin_unlock_irqrestore(hba->host->host_lock, flags);
615 		flush_work(&hba->clk_gating.ungate_work);
616 		/* Make sure state is CLKS_ON before returning */
617 		spin_lock_irqsave(hba->host->host_lock, flags);
618 		goto start;
619 	default:
620 		dev_err(hba->dev, "%s: clk gating is in invalid state %d\n",
621 				__func__, hba->clk_gating.state);
622 		break;
623 	}
624 	spin_unlock_irqrestore(hba->host->host_lock, flags);
625 out:
626 	return rc;
627 }
628 EXPORT_SYMBOL_GPL(ufshcd_hold);
629 
ufshcd_gate_work(struct work_struct * work)630 static void ufshcd_gate_work(struct work_struct *work)
631 {
632 	struct ufs_hba *hba = container_of(work, struct ufs_hba,
633 			clk_gating.gate_work.work);
634 	unsigned long flags;
635 
636 	spin_lock_irqsave(hba->host->host_lock, flags);
637 	if (hba->clk_gating.is_suspended) {
638 		hba->clk_gating.state = CLKS_ON;
639 		goto rel_lock;
640 	}
641 
642 	if (hba->clk_gating.active_reqs
643 		|| hba->ufshcd_state != UFSHCD_STATE_OPERATIONAL
644 		|| hba->lrb_in_use || hba->outstanding_tasks
645 		|| hba->active_uic_cmd || hba->uic_async_done)
646 		goto rel_lock;
647 
648 	spin_unlock_irqrestore(hba->host->host_lock, flags);
649 
650 	/* put the link into hibern8 mode before turning off clocks */
651 	if (ufshcd_can_hibern8_during_gating(hba)) {
652 		if (ufshcd_uic_hibern8_enter(hba)) {
653 			hba->clk_gating.state = CLKS_ON;
654 			goto out;
655 		}
656 		ufshcd_set_link_hibern8(hba);
657 	}
658 
659 	if (ufshcd_is_clkscaling_enabled(hba)) {
660 		devfreq_suspend_device(hba->devfreq);
661 		hba->clk_scaling.window_start_t = 0;
662 	}
663 
664 	if (!ufshcd_is_link_active(hba))
665 		ufshcd_setup_clocks(hba, false);
666 	else
667 		/* If link is active, device ref_clk can't be switched off */
668 		__ufshcd_setup_clocks(hba, false, true);
669 
670 	/*
671 	 * In case you are here to cancel this work the gating state
672 	 * would be marked as REQ_CLKS_ON. In this case keep the state
673 	 * as REQ_CLKS_ON which would anyway imply that clocks are off
674 	 * and a request to turn them on is pending. By doing this way,
675 	 * we keep the state machine in tact and this would ultimately
676 	 * prevent from doing cancel work multiple times when there are
677 	 * new requests arriving before the current cancel work is done.
678 	 */
679 	spin_lock_irqsave(hba->host->host_lock, flags);
680 	if (hba->clk_gating.state == REQ_CLKS_OFF)
681 		hba->clk_gating.state = CLKS_OFF;
682 
683 rel_lock:
684 	spin_unlock_irqrestore(hba->host->host_lock, flags);
685 out:
686 	return;
687 }
688 
689 /* host lock must be held before calling this variant */
__ufshcd_release(struct ufs_hba * hba)690 static void __ufshcd_release(struct ufs_hba *hba)
691 {
692 	if (!ufshcd_is_clkgating_allowed(hba))
693 		return;
694 
695 	hba->clk_gating.active_reqs--;
696 
697 	if (hba->clk_gating.active_reqs || hba->clk_gating.is_suspended
698 		|| hba->ufshcd_state != UFSHCD_STATE_OPERATIONAL
699 		|| hba->lrb_in_use || hba->outstanding_tasks
700 		|| hba->active_uic_cmd || hba->uic_async_done)
701 		return;
702 
703 	hba->clk_gating.state = REQ_CLKS_OFF;
704 	schedule_delayed_work(&hba->clk_gating.gate_work,
705 			msecs_to_jiffies(hba->clk_gating.delay_ms));
706 }
707 
ufshcd_release(struct ufs_hba * hba)708 void ufshcd_release(struct ufs_hba *hba)
709 {
710 	unsigned long flags;
711 
712 	spin_lock_irqsave(hba->host->host_lock, flags);
713 	__ufshcd_release(hba);
714 	spin_unlock_irqrestore(hba->host->host_lock, flags);
715 }
716 EXPORT_SYMBOL_GPL(ufshcd_release);
717 
ufshcd_clkgate_delay_show(struct device * dev,struct device_attribute * attr,char * buf)718 static ssize_t ufshcd_clkgate_delay_show(struct device *dev,
719 		struct device_attribute *attr, char *buf)
720 {
721 	struct ufs_hba *hba = dev_get_drvdata(dev);
722 
723 	return snprintf(buf, PAGE_SIZE, "%lu\n", hba->clk_gating.delay_ms);
724 }
725 
ufshcd_clkgate_delay_store(struct device * dev,struct device_attribute * attr,const char * buf,size_t count)726 static ssize_t ufshcd_clkgate_delay_store(struct device *dev,
727 		struct device_attribute *attr, const char *buf, size_t count)
728 {
729 	struct ufs_hba *hba = dev_get_drvdata(dev);
730 	unsigned long flags, value;
731 
732 	if (kstrtoul(buf, 0, &value))
733 		return -EINVAL;
734 
735 	spin_lock_irqsave(hba->host->host_lock, flags);
736 	hba->clk_gating.delay_ms = value;
737 	spin_unlock_irqrestore(hba->host->host_lock, flags);
738 	return count;
739 }
740 
ufshcd_init_clk_gating(struct ufs_hba * hba)741 static void ufshcd_init_clk_gating(struct ufs_hba *hba)
742 {
743 	if (!ufshcd_is_clkgating_allowed(hba))
744 		return;
745 
746 	hba->clk_gating.delay_ms = 150;
747 	INIT_DELAYED_WORK(&hba->clk_gating.gate_work, ufshcd_gate_work);
748 	INIT_WORK(&hba->clk_gating.ungate_work, ufshcd_ungate_work);
749 
750 	hba->clk_gating.delay_attr.show = ufshcd_clkgate_delay_show;
751 	hba->clk_gating.delay_attr.store = ufshcd_clkgate_delay_store;
752 	sysfs_attr_init(&hba->clk_gating.delay_attr.attr);
753 	hba->clk_gating.delay_attr.attr.name = "clkgate_delay_ms";
754 	hba->clk_gating.delay_attr.attr.mode = S_IRUGO | S_IWUSR;
755 	if (device_create_file(hba->dev, &hba->clk_gating.delay_attr))
756 		dev_err(hba->dev, "Failed to create sysfs for clkgate_delay\n");
757 }
758 
ufshcd_exit_clk_gating(struct ufs_hba * hba)759 static void ufshcd_exit_clk_gating(struct ufs_hba *hba)
760 {
761 	if (!ufshcd_is_clkgating_allowed(hba))
762 		return;
763 	device_remove_file(hba->dev, &hba->clk_gating.delay_attr);
764 	cancel_work_sync(&hba->clk_gating.ungate_work);
765 	cancel_delayed_work_sync(&hba->clk_gating.gate_work);
766 }
767 
768 /* Must be called with host lock acquired */
ufshcd_clk_scaling_start_busy(struct ufs_hba * hba)769 static void ufshcd_clk_scaling_start_busy(struct ufs_hba *hba)
770 {
771 	if (!ufshcd_is_clkscaling_enabled(hba))
772 		return;
773 
774 	if (!hba->clk_scaling.is_busy_started) {
775 		hba->clk_scaling.busy_start_t = ktime_get();
776 		hba->clk_scaling.is_busy_started = true;
777 	}
778 }
779 
ufshcd_clk_scaling_update_busy(struct ufs_hba * hba)780 static void ufshcd_clk_scaling_update_busy(struct ufs_hba *hba)
781 {
782 	struct ufs_clk_scaling *scaling = &hba->clk_scaling;
783 
784 	if (!ufshcd_is_clkscaling_enabled(hba))
785 		return;
786 
787 	if (!hba->outstanding_reqs && scaling->is_busy_started) {
788 		scaling->tot_busy_t += ktime_to_us(ktime_sub(ktime_get(),
789 					scaling->busy_start_t));
790 		scaling->busy_start_t = ktime_set(0, 0);
791 		scaling->is_busy_started = false;
792 	}
793 }
794 /**
795  * ufshcd_send_command - Send SCSI or device management commands
796  * @hba: per adapter instance
797  * @task_tag: Task tag of the command
798  */
799 static inline
ufshcd_send_command(struct ufs_hba * hba,unsigned int task_tag)800 void ufshcd_send_command(struct ufs_hba *hba, unsigned int task_tag)
801 {
802 	ufshcd_clk_scaling_start_busy(hba);
803 	__set_bit(task_tag, &hba->outstanding_reqs);
804 	ufshcd_writel(hba, 1 << task_tag, REG_UTP_TRANSFER_REQ_DOOR_BELL);
805 }
806 
807 /**
808  * ufshcd_copy_sense_data - Copy sense data in case of check condition
809  * @lrb - pointer to local reference block
810  */
ufshcd_copy_sense_data(struct ufshcd_lrb * lrbp)811 static inline void ufshcd_copy_sense_data(struct ufshcd_lrb *lrbp)
812 {
813 	int len;
814 	if (lrbp->sense_buffer &&
815 	    ufshcd_get_rsp_upiu_data_seg_len(lrbp->ucd_rsp_ptr)) {
816 		len = be16_to_cpu(lrbp->ucd_rsp_ptr->sr.sense_data_len);
817 		memcpy(lrbp->sense_buffer,
818 			lrbp->ucd_rsp_ptr->sr.sense_data,
819 			min_t(int, len, SCSI_SENSE_BUFFERSIZE));
820 	}
821 }
822 
823 /**
824  * ufshcd_copy_query_response() - Copy the Query Response and the data
825  * descriptor
826  * @hba: per adapter instance
827  * @lrb - pointer to local reference block
828  */
829 static
ufshcd_copy_query_response(struct ufs_hba * hba,struct ufshcd_lrb * lrbp)830 int ufshcd_copy_query_response(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
831 {
832 	struct ufs_query_res *query_res = &hba->dev_cmd.query.response;
833 
834 	memcpy(&query_res->upiu_res, &lrbp->ucd_rsp_ptr->qr, QUERY_OSF_SIZE);
835 
836 	/* Get the descriptor */
837 	if (lrbp->ucd_rsp_ptr->qr.opcode == UPIU_QUERY_OPCODE_READ_DESC) {
838 		u8 *descp = (u8 *)lrbp->ucd_rsp_ptr +
839 				GENERAL_UPIU_REQUEST_SIZE;
840 		u16 resp_len;
841 		u16 buf_len;
842 
843 		/* data segment length */
844 		resp_len = be32_to_cpu(lrbp->ucd_rsp_ptr->header.dword_2) &
845 						MASK_QUERY_DATA_SEG_LEN;
846 		buf_len = be16_to_cpu(
847 				hba->dev_cmd.query.request.upiu_req.length);
848 		if (likely(buf_len >= resp_len)) {
849 			memcpy(hba->dev_cmd.query.descriptor, descp, resp_len);
850 		} else {
851 			dev_warn(hba->dev,
852 				"%s: Response size is bigger than buffer",
853 				__func__);
854 			return -EINVAL;
855 		}
856 	}
857 
858 	return 0;
859 }
860 
861 /**
862  * ufshcd_hba_capabilities - Read controller capabilities
863  * @hba: per adapter instance
864  */
ufshcd_hba_capabilities(struct ufs_hba * hba)865 static inline void ufshcd_hba_capabilities(struct ufs_hba *hba)
866 {
867 	hba->capabilities = ufshcd_readl(hba, REG_CONTROLLER_CAPABILITIES);
868 
869 	/* nutrs and nutmrs are 0 based values */
870 	hba->nutrs = (hba->capabilities & MASK_TRANSFER_REQUESTS_SLOTS) + 1;
871 	hba->nutmrs =
872 	((hba->capabilities & MASK_TASK_MANAGEMENT_REQUEST_SLOTS) >> 16) + 1;
873 }
874 
875 /**
876  * ufshcd_ready_for_uic_cmd - Check if controller is ready
877  *                            to accept UIC commands
878  * @hba: per adapter instance
879  * Return true on success, else false
880  */
ufshcd_ready_for_uic_cmd(struct ufs_hba * hba)881 static inline bool ufshcd_ready_for_uic_cmd(struct ufs_hba *hba)
882 {
883 	if (ufshcd_readl(hba, REG_CONTROLLER_STATUS) & UIC_COMMAND_READY)
884 		return true;
885 	else
886 		return false;
887 }
888 
889 /**
890  * ufshcd_get_upmcrs - Get the power mode change request status
891  * @hba: Pointer to adapter instance
892  *
893  * This function gets the UPMCRS field of HCS register
894  * Returns value of UPMCRS field
895  */
ufshcd_get_upmcrs(struct ufs_hba * hba)896 static inline u8 ufshcd_get_upmcrs(struct ufs_hba *hba)
897 {
898 	return (ufshcd_readl(hba, REG_CONTROLLER_STATUS) >> 8) & 0x7;
899 }
900 
901 /**
902  * ufshcd_dispatch_uic_cmd - Dispatch UIC commands to unipro layers
903  * @hba: per adapter instance
904  * @uic_cmd: UIC command
905  *
906  * Mutex must be held.
907  */
908 static inline void
ufshcd_dispatch_uic_cmd(struct ufs_hba * hba,struct uic_command * uic_cmd)909 ufshcd_dispatch_uic_cmd(struct ufs_hba *hba, struct uic_command *uic_cmd)
910 {
911 	WARN_ON(hba->active_uic_cmd);
912 
913 	hba->active_uic_cmd = uic_cmd;
914 
915 	/* Write Args */
916 	ufshcd_writel(hba, uic_cmd->argument1, REG_UIC_COMMAND_ARG_1);
917 	ufshcd_writel(hba, uic_cmd->argument2, REG_UIC_COMMAND_ARG_2);
918 	ufshcd_writel(hba, uic_cmd->argument3, REG_UIC_COMMAND_ARG_3);
919 
920 	/* Write UIC Cmd */
921 	ufshcd_writel(hba, uic_cmd->command & COMMAND_OPCODE_MASK,
922 		      REG_UIC_COMMAND);
923 }
924 
925 /**
926  * ufshcd_wait_for_uic_cmd - Wait complectioin of UIC command
927  * @hba: per adapter instance
928  * @uic_command: UIC command
929  *
930  * Must be called with mutex held.
931  * Returns 0 only if success.
932  */
933 static int
ufshcd_wait_for_uic_cmd(struct ufs_hba * hba,struct uic_command * uic_cmd)934 ufshcd_wait_for_uic_cmd(struct ufs_hba *hba, struct uic_command *uic_cmd)
935 {
936 	int ret;
937 	unsigned long flags;
938 
939 	if (wait_for_completion_timeout(&uic_cmd->done,
940 					msecs_to_jiffies(UIC_CMD_TIMEOUT)))
941 		ret = uic_cmd->argument2 & MASK_UIC_COMMAND_RESULT;
942 	else
943 		ret = -ETIMEDOUT;
944 
945 	spin_lock_irqsave(hba->host->host_lock, flags);
946 	hba->active_uic_cmd = NULL;
947 	spin_unlock_irqrestore(hba->host->host_lock, flags);
948 
949 	return ret;
950 }
951 
952 /**
953  * __ufshcd_send_uic_cmd - Send UIC commands and retrieve the result
954  * @hba: per adapter instance
955  * @uic_cmd: UIC command
956  *
957  * Identical to ufshcd_send_uic_cmd() expect mutex. Must be called
958  * with mutex held and host_lock locked.
959  * Returns 0 only if success.
960  */
961 static int
__ufshcd_send_uic_cmd(struct ufs_hba * hba,struct uic_command * uic_cmd)962 __ufshcd_send_uic_cmd(struct ufs_hba *hba, struct uic_command *uic_cmd)
963 {
964 	if (!ufshcd_ready_for_uic_cmd(hba)) {
965 		dev_err(hba->dev,
966 			"Controller not ready to accept UIC commands\n");
967 		return -EIO;
968 	}
969 
970 	init_completion(&uic_cmd->done);
971 
972 	ufshcd_dispatch_uic_cmd(hba, uic_cmd);
973 
974 	return 0;
975 }
976 
977 /**
978  * ufshcd_send_uic_cmd - Send UIC commands and retrieve the result
979  * @hba: per adapter instance
980  * @uic_cmd: UIC command
981  *
982  * Returns 0 only if success.
983  */
984 static int
ufshcd_send_uic_cmd(struct ufs_hba * hba,struct uic_command * uic_cmd)985 ufshcd_send_uic_cmd(struct ufs_hba *hba, struct uic_command *uic_cmd)
986 {
987 	int ret;
988 	unsigned long flags;
989 
990 	ufshcd_hold(hba, false);
991 	mutex_lock(&hba->uic_cmd_mutex);
992 	ufshcd_add_delay_before_dme_cmd(hba);
993 
994 	spin_lock_irqsave(hba->host->host_lock, flags);
995 	ret = __ufshcd_send_uic_cmd(hba, uic_cmd);
996 	spin_unlock_irqrestore(hba->host->host_lock, flags);
997 	if (!ret)
998 		ret = ufshcd_wait_for_uic_cmd(hba, uic_cmd);
999 
1000 	mutex_unlock(&hba->uic_cmd_mutex);
1001 
1002 	ufshcd_release(hba);
1003 	return ret;
1004 }
1005 
1006 /**
1007  * ufshcd_map_sg - Map scatter-gather list to prdt
1008  * @lrbp - pointer to local reference block
1009  *
1010  * Returns 0 in case of success, non-zero value in case of failure
1011  */
ufshcd_map_sg(struct ufshcd_lrb * lrbp)1012 static int ufshcd_map_sg(struct ufshcd_lrb *lrbp)
1013 {
1014 	struct ufshcd_sg_entry *prd_table;
1015 	struct scatterlist *sg;
1016 	struct scsi_cmnd *cmd;
1017 	int sg_segments;
1018 	int i;
1019 
1020 	cmd = lrbp->cmd;
1021 	sg_segments = scsi_dma_map(cmd);
1022 	if (sg_segments < 0)
1023 		return sg_segments;
1024 
1025 	if (sg_segments) {
1026 		lrbp->utr_descriptor_ptr->prd_table_length =
1027 					cpu_to_le16((u16) (sg_segments));
1028 
1029 		prd_table = (struct ufshcd_sg_entry *)lrbp->ucd_prdt_ptr;
1030 
1031 		scsi_for_each_sg(cmd, sg, sg_segments, i) {
1032 			prd_table[i].size  =
1033 				cpu_to_le32(((u32) sg_dma_len(sg))-1);
1034 			prd_table[i].base_addr =
1035 				cpu_to_le32(lower_32_bits(sg->dma_address));
1036 			prd_table[i].upper_addr =
1037 				cpu_to_le32(upper_32_bits(sg->dma_address));
1038 		}
1039 	} else {
1040 		lrbp->utr_descriptor_ptr->prd_table_length = 0;
1041 	}
1042 
1043 	return 0;
1044 }
1045 
1046 /**
1047  * ufshcd_enable_intr - enable interrupts
1048  * @hba: per adapter instance
1049  * @intrs: interrupt bits
1050  */
ufshcd_enable_intr(struct ufs_hba * hba,u32 intrs)1051 static void ufshcd_enable_intr(struct ufs_hba *hba, u32 intrs)
1052 {
1053 	u32 set = ufshcd_readl(hba, REG_INTERRUPT_ENABLE);
1054 
1055 	if (hba->ufs_version == UFSHCI_VERSION_10) {
1056 		u32 rw;
1057 		rw = set & INTERRUPT_MASK_RW_VER_10;
1058 		set = rw | ((set ^ intrs) & intrs);
1059 	} else {
1060 		set |= intrs;
1061 	}
1062 
1063 	ufshcd_writel(hba, set, REG_INTERRUPT_ENABLE);
1064 }
1065 
1066 /**
1067  * ufshcd_disable_intr - disable interrupts
1068  * @hba: per adapter instance
1069  * @intrs: interrupt bits
1070  */
ufshcd_disable_intr(struct ufs_hba * hba,u32 intrs)1071 static void ufshcd_disable_intr(struct ufs_hba *hba, u32 intrs)
1072 {
1073 	u32 set = ufshcd_readl(hba, REG_INTERRUPT_ENABLE);
1074 
1075 	if (hba->ufs_version == UFSHCI_VERSION_10) {
1076 		u32 rw;
1077 		rw = (set & INTERRUPT_MASK_RW_VER_10) &
1078 			~(intrs & INTERRUPT_MASK_RW_VER_10);
1079 		set = rw | ((set & intrs) & ~INTERRUPT_MASK_RW_VER_10);
1080 
1081 	} else {
1082 		set &= ~intrs;
1083 	}
1084 
1085 	ufshcd_writel(hba, set, REG_INTERRUPT_ENABLE);
1086 }
1087 
1088 /**
1089  * ufshcd_prepare_req_desc_hdr() - Fills the requests header
1090  * descriptor according to request
1091  * @lrbp: pointer to local reference block
1092  * @upiu_flags: flags required in the header
1093  * @cmd_dir: requests data direction
1094  */
ufshcd_prepare_req_desc_hdr(struct ufshcd_lrb * lrbp,u32 * upiu_flags,enum dma_data_direction cmd_dir)1095 static void ufshcd_prepare_req_desc_hdr(struct ufshcd_lrb *lrbp,
1096 		u32 *upiu_flags, enum dma_data_direction cmd_dir)
1097 {
1098 	struct utp_transfer_req_desc *req_desc = lrbp->utr_descriptor_ptr;
1099 	u32 data_direction;
1100 	u32 dword_0;
1101 
1102 	if (cmd_dir == DMA_FROM_DEVICE) {
1103 		data_direction = UTP_DEVICE_TO_HOST;
1104 		*upiu_flags = UPIU_CMD_FLAGS_READ;
1105 	} else if (cmd_dir == DMA_TO_DEVICE) {
1106 		data_direction = UTP_HOST_TO_DEVICE;
1107 		*upiu_flags = UPIU_CMD_FLAGS_WRITE;
1108 	} else {
1109 		data_direction = UTP_NO_DATA_TRANSFER;
1110 		*upiu_flags = UPIU_CMD_FLAGS_NONE;
1111 	}
1112 
1113 	dword_0 = data_direction | (lrbp->command_type
1114 				<< UPIU_COMMAND_TYPE_OFFSET);
1115 	if (lrbp->intr_cmd)
1116 		dword_0 |= UTP_REQ_DESC_INT_CMD;
1117 
1118 	/* Transfer request descriptor header fields */
1119 	req_desc->header.dword_0 = cpu_to_le32(dword_0);
1120 
1121 	/*
1122 	 * assigning invalid value for command status. Controller
1123 	 * updates OCS on command completion, with the command
1124 	 * status
1125 	 */
1126 	req_desc->header.dword_2 =
1127 		cpu_to_le32(OCS_INVALID_COMMAND_STATUS);
1128 }
1129 
1130 /**
1131  * ufshcd_prepare_utp_scsi_cmd_upiu() - fills the utp_transfer_req_desc,
1132  * for scsi commands
1133  * @lrbp - local reference block pointer
1134  * @upiu_flags - flags
1135  */
1136 static
ufshcd_prepare_utp_scsi_cmd_upiu(struct ufshcd_lrb * lrbp,u32 upiu_flags)1137 void ufshcd_prepare_utp_scsi_cmd_upiu(struct ufshcd_lrb *lrbp, u32 upiu_flags)
1138 {
1139 	struct utp_upiu_req *ucd_req_ptr = lrbp->ucd_req_ptr;
1140 
1141 	/* command descriptor fields */
1142 	ucd_req_ptr->header.dword_0 = UPIU_HEADER_DWORD(
1143 				UPIU_TRANSACTION_COMMAND, upiu_flags,
1144 				lrbp->lun, lrbp->task_tag);
1145 	ucd_req_ptr->header.dword_1 = UPIU_HEADER_DWORD(
1146 				UPIU_COMMAND_SET_TYPE_SCSI, 0, 0, 0);
1147 
1148 	/* Total EHS length and Data segment length will be zero */
1149 	ucd_req_ptr->header.dword_2 = 0;
1150 
1151 	ucd_req_ptr->sc.exp_data_transfer_len =
1152 		cpu_to_be32(lrbp->cmd->sdb.length);
1153 
1154 	memcpy(ucd_req_ptr->sc.cdb, lrbp->cmd->cmnd,
1155 		(min_t(unsigned short, lrbp->cmd->cmd_len, MAX_CDB_SIZE)));
1156 }
1157 
1158 /**
1159  * ufshcd_prepare_utp_query_req_upiu() - fills the utp_transfer_req_desc,
1160  * for query requsts
1161  * @hba: UFS hba
1162  * @lrbp: local reference block pointer
1163  * @upiu_flags: flags
1164  */
ufshcd_prepare_utp_query_req_upiu(struct ufs_hba * hba,struct ufshcd_lrb * lrbp,u32 upiu_flags)1165 static void ufshcd_prepare_utp_query_req_upiu(struct ufs_hba *hba,
1166 				struct ufshcd_lrb *lrbp, u32 upiu_flags)
1167 {
1168 	struct utp_upiu_req *ucd_req_ptr = lrbp->ucd_req_ptr;
1169 	struct ufs_query *query = &hba->dev_cmd.query;
1170 	u16 len = be16_to_cpu(query->request.upiu_req.length);
1171 	u8 *descp = (u8 *)lrbp->ucd_req_ptr + GENERAL_UPIU_REQUEST_SIZE;
1172 
1173 	/* Query request header */
1174 	ucd_req_ptr->header.dword_0 = UPIU_HEADER_DWORD(
1175 			UPIU_TRANSACTION_QUERY_REQ, upiu_flags,
1176 			lrbp->lun, lrbp->task_tag);
1177 	ucd_req_ptr->header.dword_1 = UPIU_HEADER_DWORD(
1178 			0, query->request.query_func, 0, 0);
1179 
1180 	/* Data segment length */
1181 	ucd_req_ptr->header.dword_2 = UPIU_HEADER_DWORD(
1182 			0, 0, len >> 8, (u8)len);
1183 
1184 	/* Copy the Query Request buffer as is */
1185 	memcpy(&ucd_req_ptr->qr, &query->request.upiu_req,
1186 			QUERY_OSF_SIZE);
1187 
1188 	/* Copy the Descriptor */
1189 	if (query->request.upiu_req.opcode == UPIU_QUERY_OPCODE_WRITE_DESC)
1190 		memcpy(descp, query->descriptor, len);
1191 
1192 }
1193 
ufshcd_prepare_utp_nop_upiu(struct ufshcd_lrb * lrbp)1194 static inline void ufshcd_prepare_utp_nop_upiu(struct ufshcd_lrb *lrbp)
1195 {
1196 	struct utp_upiu_req *ucd_req_ptr = lrbp->ucd_req_ptr;
1197 
1198 	memset(ucd_req_ptr, 0, sizeof(struct utp_upiu_req));
1199 
1200 	/* command descriptor fields */
1201 	ucd_req_ptr->header.dword_0 =
1202 		UPIU_HEADER_DWORD(
1203 			UPIU_TRANSACTION_NOP_OUT, 0, 0, lrbp->task_tag);
1204 }
1205 
1206 /**
1207  * ufshcd_compose_upiu - form UFS Protocol Information Unit(UPIU)
1208  * @hba - per adapter instance
1209  * @lrb - pointer to local reference block
1210  */
ufshcd_compose_upiu(struct ufs_hba * hba,struct ufshcd_lrb * lrbp)1211 static int ufshcd_compose_upiu(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
1212 {
1213 	u32 upiu_flags;
1214 	int ret = 0;
1215 
1216 	switch (lrbp->command_type) {
1217 	case UTP_CMD_TYPE_SCSI:
1218 		if (likely(lrbp->cmd)) {
1219 			ufshcd_prepare_req_desc_hdr(lrbp, &upiu_flags,
1220 					lrbp->cmd->sc_data_direction);
1221 			ufshcd_prepare_utp_scsi_cmd_upiu(lrbp, upiu_flags);
1222 		} else {
1223 			ret = -EINVAL;
1224 		}
1225 		break;
1226 	case UTP_CMD_TYPE_DEV_MANAGE:
1227 		ufshcd_prepare_req_desc_hdr(lrbp, &upiu_flags, DMA_NONE);
1228 		if (hba->dev_cmd.type == DEV_CMD_TYPE_QUERY)
1229 			ufshcd_prepare_utp_query_req_upiu(
1230 					hba, lrbp, upiu_flags);
1231 		else if (hba->dev_cmd.type == DEV_CMD_TYPE_NOP)
1232 			ufshcd_prepare_utp_nop_upiu(lrbp);
1233 		else
1234 			ret = -EINVAL;
1235 		break;
1236 	case UTP_CMD_TYPE_UFS:
1237 		/* For UFS native command implementation */
1238 		ret = -ENOTSUPP;
1239 		dev_err(hba->dev, "%s: UFS native command are not supported\n",
1240 			__func__);
1241 		break;
1242 	default:
1243 		ret = -ENOTSUPP;
1244 		dev_err(hba->dev, "%s: unknown command type: 0x%x\n",
1245 				__func__, lrbp->command_type);
1246 		break;
1247 	} /* end of switch */
1248 
1249 	return ret;
1250 }
1251 
1252 /*
1253  * ufshcd_scsi_to_upiu_lun - maps scsi LUN to UPIU LUN
1254  * @scsi_lun: scsi LUN id
1255  *
1256  * Returns UPIU LUN id
1257  */
ufshcd_scsi_to_upiu_lun(unsigned int scsi_lun)1258 static inline u8 ufshcd_scsi_to_upiu_lun(unsigned int scsi_lun)
1259 {
1260 	if (scsi_is_wlun(scsi_lun))
1261 		return (scsi_lun & UFS_UPIU_MAX_UNIT_NUM_ID)
1262 			| UFS_UPIU_WLUN_ID;
1263 	else
1264 		return scsi_lun & UFS_UPIU_MAX_UNIT_NUM_ID;
1265 }
1266 
1267 /**
1268  * ufshcd_upiu_wlun_to_scsi_wlun - maps UPIU W-LUN id to SCSI W-LUN ID
1269  * @scsi_lun: UPIU W-LUN id
1270  *
1271  * Returns SCSI W-LUN id
1272  */
ufshcd_upiu_wlun_to_scsi_wlun(u8 upiu_wlun_id)1273 static inline u16 ufshcd_upiu_wlun_to_scsi_wlun(u8 upiu_wlun_id)
1274 {
1275 	return (upiu_wlun_id & ~UFS_UPIU_WLUN_ID) | SCSI_W_LUN_BASE;
1276 }
1277 
1278 /**
1279  * ufshcd_queuecommand - main entry point for SCSI requests
1280  * @cmd: command from SCSI Midlayer
1281  * @done: call back function
1282  *
1283  * Returns 0 for success, non-zero in case of failure
1284  */
ufshcd_queuecommand(struct Scsi_Host * host,struct scsi_cmnd * cmd)1285 static int ufshcd_queuecommand(struct Scsi_Host *host, struct scsi_cmnd *cmd)
1286 {
1287 	struct ufshcd_lrb *lrbp;
1288 	struct ufs_hba *hba;
1289 	unsigned long flags;
1290 	int tag;
1291 	int err = 0;
1292 
1293 	hba = shost_priv(host);
1294 
1295 	tag = cmd->request->tag;
1296 
1297 	spin_lock_irqsave(hba->host->host_lock, flags);
1298 	switch (hba->ufshcd_state) {
1299 	case UFSHCD_STATE_OPERATIONAL:
1300 		break;
1301 	case UFSHCD_STATE_RESET:
1302 		err = SCSI_MLQUEUE_HOST_BUSY;
1303 		goto out_unlock;
1304 	case UFSHCD_STATE_ERROR:
1305 		set_host_byte(cmd, DID_ERROR);
1306 		cmd->scsi_done(cmd);
1307 		goto out_unlock;
1308 	default:
1309 		dev_WARN_ONCE(hba->dev, 1, "%s: invalid state %d\n",
1310 				__func__, hba->ufshcd_state);
1311 		set_host_byte(cmd, DID_BAD_TARGET);
1312 		cmd->scsi_done(cmd);
1313 		goto out_unlock;
1314 	}
1315 	spin_unlock_irqrestore(hba->host->host_lock, flags);
1316 
1317 	/* acquire the tag to make sure device cmds don't use it */
1318 	if (test_and_set_bit_lock(tag, &hba->lrb_in_use)) {
1319 		/*
1320 		 * Dev manage command in progress, requeue the command.
1321 		 * Requeuing the command helps in cases where the request *may*
1322 		 * find different tag instead of waiting for dev manage command
1323 		 * completion.
1324 		 */
1325 		err = SCSI_MLQUEUE_HOST_BUSY;
1326 		goto out;
1327 	}
1328 
1329 	err = ufshcd_hold(hba, true);
1330 	if (err) {
1331 		err = SCSI_MLQUEUE_HOST_BUSY;
1332 		clear_bit_unlock(tag, &hba->lrb_in_use);
1333 		goto out;
1334 	}
1335 	WARN_ON(hba->clk_gating.state != CLKS_ON);
1336 
1337 	lrbp = &hba->lrb[tag];
1338 
1339 	WARN_ON(lrbp->cmd);
1340 	lrbp->cmd = cmd;
1341 	lrbp->sense_bufflen = SCSI_SENSE_BUFFERSIZE;
1342 	lrbp->sense_buffer = cmd->sense_buffer;
1343 	lrbp->task_tag = tag;
1344 	lrbp->lun = ufshcd_scsi_to_upiu_lun(cmd->device->lun);
1345 	lrbp->intr_cmd = !ufshcd_is_intr_aggr_allowed(hba) ? true : false;
1346 	lrbp->command_type = UTP_CMD_TYPE_SCSI;
1347 
1348 	/* form UPIU before issuing the command */
1349 	ufshcd_compose_upiu(hba, lrbp);
1350 	err = ufshcd_map_sg(lrbp);
1351 	if (err) {
1352 		lrbp->cmd = NULL;
1353 		clear_bit_unlock(tag, &hba->lrb_in_use);
1354 		goto out;
1355 	}
1356 
1357 	/* issue command to the controller */
1358 	spin_lock_irqsave(hba->host->host_lock, flags);
1359 	ufshcd_send_command(hba, tag);
1360 out_unlock:
1361 	spin_unlock_irqrestore(hba->host->host_lock, flags);
1362 out:
1363 	return err;
1364 }
1365 
ufshcd_compose_dev_cmd(struct ufs_hba * hba,struct ufshcd_lrb * lrbp,enum dev_cmd_type cmd_type,int tag)1366 static int ufshcd_compose_dev_cmd(struct ufs_hba *hba,
1367 		struct ufshcd_lrb *lrbp, enum dev_cmd_type cmd_type, int tag)
1368 {
1369 	lrbp->cmd = NULL;
1370 	lrbp->sense_bufflen = 0;
1371 	lrbp->sense_buffer = NULL;
1372 	lrbp->task_tag = tag;
1373 	lrbp->lun = 0; /* device management cmd is not specific to any LUN */
1374 	lrbp->command_type = UTP_CMD_TYPE_DEV_MANAGE;
1375 	lrbp->intr_cmd = true; /* No interrupt aggregation */
1376 	hba->dev_cmd.type = cmd_type;
1377 
1378 	return ufshcd_compose_upiu(hba, lrbp);
1379 }
1380 
1381 static int
ufshcd_clear_cmd(struct ufs_hba * hba,int tag)1382 ufshcd_clear_cmd(struct ufs_hba *hba, int tag)
1383 {
1384 	int err = 0;
1385 	unsigned long flags;
1386 	u32 mask = 1 << tag;
1387 
1388 	/* clear outstanding transaction before retry */
1389 	spin_lock_irqsave(hba->host->host_lock, flags);
1390 	ufshcd_utrl_clear(hba, tag);
1391 	spin_unlock_irqrestore(hba->host->host_lock, flags);
1392 
1393 	/*
1394 	 * wait for for h/w to clear corresponding bit in door-bell.
1395 	 * max. wait is 1 sec.
1396 	 */
1397 	err = ufshcd_wait_for_register(hba,
1398 			REG_UTP_TRANSFER_REQ_DOOR_BELL,
1399 			mask, ~mask, 1000, 1000);
1400 
1401 	return err;
1402 }
1403 
1404 static int
ufshcd_check_query_response(struct ufs_hba * hba,struct ufshcd_lrb * lrbp)1405 ufshcd_check_query_response(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
1406 {
1407 	struct ufs_query_res *query_res = &hba->dev_cmd.query.response;
1408 
1409 	/* Get the UPIU response */
1410 	query_res->response = ufshcd_get_rsp_upiu_result(lrbp->ucd_rsp_ptr) >>
1411 				UPIU_RSP_CODE_OFFSET;
1412 	return query_res->response;
1413 }
1414 
1415 /**
1416  * ufshcd_dev_cmd_completion() - handles device management command responses
1417  * @hba: per adapter instance
1418  * @lrbp: pointer to local reference block
1419  */
1420 static int
ufshcd_dev_cmd_completion(struct ufs_hba * hba,struct ufshcd_lrb * lrbp)1421 ufshcd_dev_cmd_completion(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
1422 {
1423 	int resp;
1424 	int err = 0;
1425 
1426 	resp = ufshcd_get_req_rsp(lrbp->ucd_rsp_ptr);
1427 
1428 	switch (resp) {
1429 	case UPIU_TRANSACTION_NOP_IN:
1430 		if (hba->dev_cmd.type != DEV_CMD_TYPE_NOP) {
1431 			err = -EINVAL;
1432 			dev_err(hba->dev, "%s: unexpected response %x\n",
1433 					__func__, resp);
1434 		}
1435 		break;
1436 	case UPIU_TRANSACTION_QUERY_RSP:
1437 		err = ufshcd_check_query_response(hba, lrbp);
1438 		if (!err)
1439 			err = ufshcd_copy_query_response(hba, lrbp);
1440 		break;
1441 	case UPIU_TRANSACTION_REJECT_UPIU:
1442 		/* TODO: handle Reject UPIU Response */
1443 		err = -EPERM;
1444 		dev_err(hba->dev, "%s: Reject UPIU not fully implemented\n",
1445 				__func__);
1446 		break;
1447 	default:
1448 		err = -EINVAL;
1449 		dev_err(hba->dev, "%s: Invalid device management cmd response: %x\n",
1450 				__func__, resp);
1451 		break;
1452 	}
1453 
1454 	return err;
1455 }
1456 
ufshcd_wait_for_dev_cmd(struct ufs_hba * hba,struct ufshcd_lrb * lrbp,int max_timeout)1457 static int ufshcd_wait_for_dev_cmd(struct ufs_hba *hba,
1458 		struct ufshcd_lrb *lrbp, int max_timeout)
1459 {
1460 	int err = 0;
1461 	unsigned long time_left;
1462 	unsigned long flags;
1463 
1464 	time_left = wait_for_completion_timeout(hba->dev_cmd.complete,
1465 			msecs_to_jiffies(max_timeout));
1466 
1467 	spin_lock_irqsave(hba->host->host_lock, flags);
1468 	hba->dev_cmd.complete = NULL;
1469 	if (likely(time_left)) {
1470 		err = ufshcd_get_tr_ocs(lrbp);
1471 		if (!err)
1472 			err = ufshcd_dev_cmd_completion(hba, lrbp);
1473 	}
1474 	spin_unlock_irqrestore(hba->host->host_lock, flags);
1475 
1476 	if (!time_left) {
1477 		err = -ETIMEDOUT;
1478 		if (!ufshcd_clear_cmd(hba, lrbp->task_tag))
1479 			/* sucessfully cleared the command, retry if needed */
1480 			err = -EAGAIN;
1481 	}
1482 
1483 	return err;
1484 }
1485 
1486 /**
1487  * ufshcd_get_dev_cmd_tag - Get device management command tag
1488  * @hba: per-adapter instance
1489  * @tag: pointer to variable with available slot value
1490  *
1491  * Get a free slot and lock it until device management command
1492  * completes.
1493  *
1494  * Returns false if free slot is unavailable for locking, else
1495  * return true with tag value in @tag.
1496  */
ufshcd_get_dev_cmd_tag(struct ufs_hba * hba,int * tag_out)1497 static bool ufshcd_get_dev_cmd_tag(struct ufs_hba *hba, int *tag_out)
1498 {
1499 	int tag;
1500 	bool ret = false;
1501 	unsigned long tmp;
1502 
1503 	if (!tag_out)
1504 		goto out;
1505 
1506 	do {
1507 		tmp = ~hba->lrb_in_use;
1508 		tag = find_last_bit(&tmp, hba->nutrs);
1509 		if (tag >= hba->nutrs)
1510 			goto out;
1511 	} while (test_and_set_bit_lock(tag, &hba->lrb_in_use));
1512 
1513 	*tag_out = tag;
1514 	ret = true;
1515 out:
1516 	return ret;
1517 }
1518 
ufshcd_put_dev_cmd_tag(struct ufs_hba * hba,int tag)1519 static inline void ufshcd_put_dev_cmd_tag(struct ufs_hba *hba, int tag)
1520 {
1521 	clear_bit_unlock(tag, &hba->lrb_in_use);
1522 }
1523 
1524 /**
1525  * ufshcd_exec_dev_cmd - API for sending device management requests
1526  * @hba - UFS hba
1527  * @cmd_type - specifies the type (NOP, Query...)
1528  * @timeout - time in seconds
1529  *
1530  * NOTE: Since there is only one available tag for device management commands,
1531  * it is expected you hold the hba->dev_cmd.lock mutex.
1532  */
ufshcd_exec_dev_cmd(struct ufs_hba * hba,enum dev_cmd_type cmd_type,int timeout)1533 static int ufshcd_exec_dev_cmd(struct ufs_hba *hba,
1534 		enum dev_cmd_type cmd_type, int timeout)
1535 {
1536 	struct ufshcd_lrb *lrbp;
1537 	int err;
1538 	int tag;
1539 	struct completion wait;
1540 	unsigned long flags;
1541 
1542 	/*
1543 	 * Get free slot, sleep if slots are unavailable.
1544 	 * Even though we use wait_event() which sleeps indefinitely,
1545 	 * the maximum wait time is bounded by SCSI request timeout.
1546 	 */
1547 	wait_event(hba->dev_cmd.tag_wq, ufshcd_get_dev_cmd_tag(hba, &tag));
1548 
1549 	init_completion(&wait);
1550 	lrbp = &hba->lrb[tag];
1551 	WARN_ON(lrbp->cmd);
1552 	err = ufshcd_compose_dev_cmd(hba, lrbp, cmd_type, tag);
1553 	if (unlikely(err))
1554 		goto out_put_tag;
1555 
1556 	hba->dev_cmd.complete = &wait;
1557 
1558 	spin_lock_irqsave(hba->host->host_lock, flags);
1559 	ufshcd_send_command(hba, tag);
1560 	spin_unlock_irqrestore(hba->host->host_lock, flags);
1561 
1562 	err = ufshcd_wait_for_dev_cmd(hba, lrbp, timeout);
1563 
1564 out_put_tag:
1565 	ufshcd_put_dev_cmd_tag(hba, tag);
1566 	wake_up(&hba->dev_cmd.tag_wq);
1567 	return err;
1568 }
1569 
1570 /**
1571  * ufshcd_init_query() - init the query response and request parameters
1572  * @hba: per-adapter instance
1573  * @request: address of the request pointer to be initialized
1574  * @response: address of the response pointer to be initialized
1575  * @opcode: operation to perform
1576  * @idn: flag idn to access
1577  * @index: LU number to access
1578  * @selector: query/flag/descriptor further identification
1579  */
ufshcd_init_query(struct ufs_hba * hba,struct ufs_query_req ** request,struct ufs_query_res ** response,enum query_opcode opcode,u8 idn,u8 index,u8 selector)1580 static inline void ufshcd_init_query(struct ufs_hba *hba,
1581 		struct ufs_query_req **request, struct ufs_query_res **response,
1582 		enum query_opcode opcode, u8 idn, u8 index, u8 selector)
1583 {
1584 	*request = &hba->dev_cmd.query.request;
1585 	*response = &hba->dev_cmd.query.response;
1586 	memset(*request, 0, sizeof(struct ufs_query_req));
1587 	memset(*response, 0, sizeof(struct ufs_query_res));
1588 	(*request)->upiu_req.opcode = opcode;
1589 	(*request)->upiu_req.idn = idn;
1590 	(*request)->upiu_req.index = index;
1591 	(*request)->upiu_req.selector = selector;
1592 }
1593 
1594 /**
1595  * ufshcd_query_flag() - API function for sending flag query requests
1596  * hba: per-adapter instance
1597  * query_opcode: flag query to perform
1598  * idn: flag idn to access
1599  * flag_res: the flag value after the query request completes
1600  *
1601  * Returns 0 for success, non-zero in case of failure
1602  */
ufshcd_query_flag(struct ufs_hba * hba,enum query_opcode opcode,enum flag_idn idn,bool * flag_res)1603 static int ufshcd_query_flag(struct ufs_hba *hba, enum query_opcode opcode,
1604 			enum flag_idn idn, bool *flag_res)
1605 {
1606 	struct ufs_query_req *request = NULL;
1607 	struct ufs_query_res *response = NULL;
1608 	int err, index = 0, selector = 0;
1609 
1610 	BUG_ON(!hba);
1611 
1612 	ufshcd_hold(hba, false);
1613 	mutex_lock(&hba->dev_cmd.lock);
1614 	ufshcd_init_query(hba, &request, &response, opcode, idn, index,
1615 			selector);
1616 
1617 	switch (opcode) {
1618 	case UPIU_QUERY_OPCODE_SET_FLAG:
1619 	case UPIU_QUERY_OPCODE_CLEAR_FLAG:
1620 	case UPIU_QUERY_OPCODE_TOGGLE_FLAG:
1621 		request->query_func = UPIU_QUERY_FUNC_STANDARD_WRITE_REQUEST;
1622 		break;
1623 	case UPIU_QUERY_OPCODE_READ_FLAG:
1624 		request->query_func = UPIU_QUERY_FUNC_STANDARD_READ_REQUEST;
1625 		if (!flag_res) {
1626 			/* No dummy reads */
1627 			dev_err(hba->dev, "%s: Invalid argument for read request\n",
1628 					__func__);
1629 			err = -EINVAL;
1630 			goto out_unlock;
1631 		}
1632 		break;
1633 	default:
1634 		dev_err(hba->dev,
1635 			"%s: Expected query flag opcode but got = %d\n",
1636 			__func__, opcode);
1637 		err = -EINVAL;
1638 		goto out_unlock;
1639 	}
1640 
1641 	err = ufshcd_exec_dev_cmd(hba, DEV_CMD_TYPE_QUERY, QUERY_REQ_TIMEOUT);
1642 
1643 	if (err) {
1644 		dev_err(hba->dev,
1645 			"%s: Sending flag query for idn %d failed, err = %d\n",
1646 			__func__, idn, err);
1647 		goto out_unlock;
1648 	}
1649 
1650 	if (flag_res)
1651 		*flag_res = (be32_to_cpu(response->upiu_res.value) &
1652 				MASK_QUERY_UPIU_FLAG_LOC) & 0x1;
1653 
1654 out_unlock:
1655 	mutex_unlock(&hba->dev_cmd.lock);
1656 	ufshcd_release(hba);
1657 	return err;
1658 }
1659 
1660 /**
1661  * ufshcd_query_attr - API function for sending attribute requests
1662  * hba: per-adapter instance
1663  * opcode: attribute opcode
1664  * idn: attribute idn to access
1665  * index: index field
1666  * selector: selector field
1667  * attr_val: the attribute value after the query request completes
1668  *
1669  * Returns 0 for success, non-zero in case of failure
1670 */
ufshcd_query_attr(struct ufs_hba * hba,enum query_opcode opcode,enum attr_idn idn,u8 index,u8 selector,u32 * attr_val)1671 static int ufshcd_query_attr(struct ufs_hba *hba, enum query_opcode opcode,
1672 			enum attr_idn idn, u8 index, u8 selector, u32 *attr_val)
1673 {
1674 	struct ufs_query_req *request = NULL;
1675 	struct ufs_query_res *response = NULL;
1676 	int err;
1677 
1678 	BUG_ON(!hba);
1679 
1680 	ufshcd_hold(hba, false);
1681 	if (!attr_val) {
1682 		dev_err(hba->dev, "%s: attribute value required for opcode 0x%x\n",
1683 				__func__, opcode);
1684 		err = -EINVAL;
1685 		goto out;
1686 	}
1687 
1688 	mutex_lock(&hba->dev_cmd.lock);
1689 	ufshcd_init_query(hba, &request, &response, opcode, idn, index,
1690 			selector);
1691 
1692 	switch (opcode) {
1693 	case UPIU_QUERY_OPCODE_WRITE_ATTR:
1694 		request->query_func = UPIU_QUERY_FUNC_STANDARD_WRITE_REQUEST;
1695 		request->upiu_req.value = cpu_to_be32(*attr_val);
1696 		break;
1697 	case UPIU_QUERY_OPCODE_READ_ATTR:
1698 		request->query_func = UPIU_QUERY_FUNC_STANDARD_READ_REQUEST;
1699 		break;
1700 	default:
1701 		dev_err(hba->dev, "%s: Expected query attr opcode but got = 0x%.2x\n",
1702 				__func__, opcode);
1703 		err = -EINVAL;
1704 		goto out_unlock;
1705 	}
1706 
1707 	err = ufshcd_exec_dev_cmd(hba, DEV_CMD_TYPE_QUERY, QUERY_REQ_TIMEOUT);
1708 
1709 	if (err) {
1710 		dev_err(hba->dev, "%s: opcode 0x%.2x for idn %d failed, err = %d\n",
1711 				__func__, opcode, idn, err);
1712 		goto out_unlock;
1713 	}
1714 
1715 	*attr_val = be32_to_cpu(response->upiu_res.value);
1716 
1717 out_unlock:
1718 	mutex_unlock(&hba->dev_cmd.lock);
1719 out:
1720 	ufshcd_release(hba);
1721 	return err;
1722 }
1723 
1724 /**
1725  * ufshcd_query_descriptor - API function for sending descriptor requests
1726  * hba: per-adapter instance
1727  * opcode: attribute opcode
1728  * idn: attribute idn to access
1729  * index: index field
1730  * selector: selector field
1731  * desc_buf: the buffer that contains the descriptor
1732  * buf_len: length parameter passed to the device
1733  *
1734  * Returns 0 for success, non-zero in case of failure.
1735  * The buf_len parameter will contain, on return, the length parameter
1736  * received on the response.
1737  */
ufshcd_query_descriptor(struct ufs_hba * hba,enum query_opcode opcode,enum desc_idn idn,u8 index,u8 selector,u8 * desc_buf,int * buf_len)1738 static int ufshcd_query_descriptor(struct ufs_hba *hba,
1739 			enum query_opcode opcode, enum desc_idn idn, u8 index,
1740 			u8 selector, u8 *desc_buf, int *buf_len)
1741 {
1742 	struct ufs_query_req *request = NULL;
1743 	struct ufs_query_res *response = NULL;
1744 	int err;
1745 
1746 	BUG_ON(!hba);
1747 
1748 	ufshcd_hold(hba, false);
1749 	if (!desc_buf) {
1750 		dev_err(hba->dev, "%s: descriptor buffer required for opcode 0x%x\n",
1751 				__func__, opcode);
1752 		err = -EINVAL;
1753 		goto out;
1754 	}
1755 
1756 	if (*buf_len <= QUERY_DESC_MIN_SIZE || *buf_len > QUERY_DESC_MAX_SIZE) {
1757 		dev_err(hba->dev, "%s: descriptor buffer size (%d) is out of range\n",
1758 				__func__, *buf_len);
1759 		err = -EINVAL;
1760 		goto out;
1761 	}
1762 
1763 	mutex_lock(&hba->dev_cmd.lock);
1764 	ufshcd_init_query(hba, &request, &response, opcode, idn, index,
1765 			selector);
1766 	hba->dev_cmd.query.descriptor = desc_buf;
1767 	request->upiu_req.length = cpu_to_be16(*buf_len);
1768 
1769 	switch (opcode) {
1770 	case UPIU_QUERY_OPCODE_WRITE_DESC:
1771 		request->query_func = UPIU_QUERY_FUNC_STANDARD_WRITE_REQUEST;
1772 		break;
1773 	case UPIU_QUERY_OPCODE_READ_DESC:
1774 		request->query_func = UPIU_QUERY_FUNC_STANDARD_READ_REQUEST;
1775 		break;
1776 	default:
1777 		dev_err(hba->dev,
1778 				"%s: Expected query descriptor opcode but got = 0x%.2x\n",
1779 				__func__, opcode);
1780 		err = -EINVAL;
1781 		goto out_unlock;
1782 	}
1783 
1784 	err = ufshcd_exec_dev_cmd(hba, DEV_CMD_TYPE_QUERY, QUERY_REQ_TIMEOUT);
1785 
1786 	if (err) {
1787 		dev_err(hba->dev, "%s: opcode 0x%.2x for idn %d failed, err = %d\n",
1788 				__func__, opcode, idn, err);
1789 		goto out_unlock;
1790 	}
1791 
1792 	hba->dev_cmd.query.descriptor = NULL;
1793 	*buf_len = be16_to_cpu(response->upiu_res.length);
1794 
1795 out_unlock:
1796 	mutex_unlock(&hba->dev_cmd.lock);
1797 out:
1798 	ufshcd_release(hba);
1799 	return err;
1800 }
1801 
1802 /**
1803  * ufshcd_read_desc_param - read the specified descriptor parameter
1804  * @hba: Pointer to adapter instance
1805  * @desc_id: descriptor idn value
1806  * @desc_index: descriptor index
1807  * @param_offset: offset of the parameter to read
1808  * @param_read_buf: pointer to buffer where parameter would be read
1809  * @param_size: sizeof(param_read_buf)
1810  *
1811  * Return 0 in case of success, non-zero otherwise
1812  */
ufshcd_read_desc_param(struct ufs_hba * hba,enum desc_idn desc_id,int desc_index,u32 param_offset,u8 * param_read_buf,u32 param_size)1813 static int ufshcd_read_desc_param(struct ufs_hba *hba,
1814 				  enum desc_idn desc_id,
1815 				  int desc_index,
1816 				  u32 param_offset,
1817 				  u8 *param_read_buf,
1818 				  u32 param_size)
1819 {
1820 	int ret;
1821 	u8 *desc_buf;
1822 	u32 buff_len;
1823 	bool is_kmalloc = true;
1824 
1825 	/* safety checks */
1826 	if (desc_id >= QUERY_DESC_IDN_MAX)
1827 		return -EINVAL;
1828 
1829 	buff_len = ufs_query_desc_max_size[desc_id];
1830 	if ((param_offset + param_size) > buff_len)
1831 		return -EINVAL;
1832 
1833 	if (!param_offset && (param_size == buff_len)) {
1834 		/* memory space already available to hold full descriptor */
1835 		desc_buf = param_read_buf;
1836 		is_kmalloc = false;
1837 	} else {
1838 		/* allocate memory to hold full descriptor */
1839 		desc_buf = kmalloc(buff_len, GFP_KERNEL);
1840 		if (!desc_buf)
1841 			return -ENOMEM;
1842 	}
1843 
1844 	ret = ufshcd_query_descriptor(hba, UPIU_QUERY_OPCODE_READ_DESC,
1845 				      desc_id, desc_index, 0, desc_buf,
1846 				      &buff_len);
1847 
1848 	if (ret || (buff_len < ufs_query_desc_max_size[desc_id]) ||
1849 	    (desc_buf[QUERY_DESC_LENGTH_OFFSET] !=
1850 	     ufs_query_desc_max_size[desc_id])
1851 	    || (desc_buf[QUERY_DESC_DESC_TYPE_OFFSET] != desc_id)) {
1852 		dev_err(hba->dev, "%s: Failed reading descriptor. desc_id %d param_offset %d buff_len %d ret %d",
1853 			__func__, desc_id, param_offset, buff_len, ret);
1854 		if (!ret)
1855 			ret = -EINVAL;
1856 
1857 		goto out;
1858 	}
1859 
1860 	if (is_kmalloc)
1861 		memcpy(param_read_buf, &desc_buf[param_offset], param_size);
1862 out:
1863 	if (is_kmalloc)
1864 		kfree(desc_buf);
1865 	return ret;
1866 }
1867 
ufshcd_read_desc(struct ufs_hba * hba,enum desc_idn desc_id,int desc_index,u8 * buf,u32 size)1868 static inline int ufshcd_read_desc(struct ufs_hba *hba,
1869 				   enum desc_idn desc_id,
1870 				   int desc_index,
1871 				   u8 *buf,
1872 				   u32 size)
1873 {
1874 	return ufshcd_read_desc_param(hba, desc_id, desc_index, 0, buf, size);
1875 }
1876 
ufshcd_read_power_desc(struct ufs_hba * hba,u8 * buf,u32 size)1877 static inline int ufshcd_read_power_desc(struct ufs_hba *hba,
1878 					 u8 *buf,
1879 					 u32 size)
1880 {
1881 	return ufshcd_read_desc(hba, QUERY_DESC_IDN_POWER, 0, buf, size);
1882 }
1883 
1884 /**
1885  * ufshcd_read_unit_desc_param - read the specified unit descriptor parameter
1886  * @hba: Pointer to adapter instance
1887  * @lun: lun id
1888  * @param_offset: offset of the parameter to read
1889  * @param_read_buf: pointer to buffer where parameter would be read
1890  * @param_size: sizeof(param_read_buf)
1891  *
1892  * Return 0 in case of success, non-zero otherwise
1893  */
ufshcd_read_unit_desc_param(struct ufs_hba * hba,int lun,enum unit_desc_param param_offset,u8 * param_read_buf,u32 param_size)1894 static inline int ufshcd_read_unit_desc_param(struct ufs_hba *hba,
1895 					      int lun,
1896 					      enum unit_desc_param param_offset,
1897 					      u8 *param_read_buf,
1898 					      u32 param_size)
1899 {
1900 	/*
1901 	 * Unit descriptors are only available for general purpose LUs (LUN id
1902 	 * from 0 to 7) and RPMB Well known LU.
1903 	 */
1904 	if (lun != UFS_UPIU_RPMB_WLUN && (lun >= UFS_UPIU_MAX_GENERAL_LUN))
1905 		return -EOPNOTSUPP;
1906 
1907 	return ufshcd_read_desc_param(hba, QUERY_DESC_IDN_UNIT, lun,
1908 				      param_offset, param_read_buf, param_size);
1909 }
1910 
1911 /**
1912  * ufshcd_memory_alloc - allocate memory for host memory space data structures
1913  * @hba: per adapter instance
1914  *
1915  * 1. Allocate DMA memory for Command Descriptor array
1916  *	Each command descriptor consist of Command UPIU, Response UPIU and PRDT
1917  * 2. Allocate DMA memory for UTP Transfer Request Descriptor List (UTRDL).
1918  * 3. Allocate DMA memory for UTP Task Management Request Descriptor List
1919  *	(UTMRDL)
1920  * 4. Allocate memory for local reference block(lrb).
1921  *
1922  * Returns 0 for success, non-zero in case of failure
1923  */
ufshcd_memory_alloc(struct ufs_hba * hba)1924 static int ufshcd_memory_alloc(struct ufs_hba *hba)
1925 {
1926 	size_t utmrdl_size, utrdl_size, ucdl_size;
1927 
1928 	/* Allocate memory for UTP command descriptors */
1929 	ucdl_size = (sizeof(struct utp_transfer_cmd_desc) * hba->nutrs);
1930 	hba->ucdl_base_addr = dmam_alloc_coherent(hba->dev,
1931 						  ucdl_size,
1932 						  &hba->ucdl_dma_addr,
1933 						  GFP_KERNEL);
1934 
1935 	/*
1936 	 * UFSHCI requires UTP command descriptor to be 128 byte aligned.
1937 	 * make sure hba->ucdl_dma_addr is aligned to PAGE_SIZE
1938 	 * if hba->ucdl_dma_addr is aligned to PAGE_SIZE, then it will
1939 	 * be aligned to 128 bytes as well
1940 	 */
1941 	if (!hba->ucdl_base_addr ||
1942 	    WARN_ON(hba->ucdl_dma_addr & (PAGE_SIZE - 1))) {
1943 		dev_err(hba->dev,
1944 			"Command Descriptor Memory allocation failed\n");
1945 		goto out;
1946 	}
1947 
1948 	/*
1949 	 * Allocate memory for UTP Transfer descriptors
1950 	 * UFSHCI requires 1024 byte alignment of UTRD
1951 	 */
1952 	utrdl_size = (sizeof(struct utp_transfer_req_desc) * hba->nutrs);
1953 	hba->utrdl_base_addr = dmam_alloc_coherent(hba->dev,
1954 						   utrdl_size,
1955 						   &hba->utrdl_dma_addr,
1956 						   GFP_KERNEL);
1957 	if (!hba->utrdl_base_addr ||
1958 	    WARN_ON(hba->utrdl_dma_addr & (PAGE_SIZE - 1))) {
1959 		dev_err(hba->dev,
1960 			"Transfer Descriptor Memory allocation failed\n");
1961 		goto out;
1962 	}
1963 
1964 	/*
1965 	 * Allocate memory for UTP Task Management descriptors
1966 	 * UFSHCI requires 1024 byte alignment of UTMRD
1967 	 */
1968 	utmrdl_size = sizeof(struct utp_task_req_desc) * hba->nutmrs;
1969 	hba->utmrdl_base_addr = dmam_alloc_coherent(hba->dev,
1970 						    utmrdl_size,
1971 						    &hba->utmrdl_dma_addr,
1972 						    GFP_KERNEL);
1973 	if (!hba->utmrdl_base_addr ||
1974 	    WARN_ON(hba->utmrdl_dma_addr & (PAGE_SIZE - 1))) {
1975 		dev_err(hba->dev,
1976 		"Task Management Descriptor Memory allocation failed\n");
1977 		goto out;
1978 	}
1979 
1980 	/* Allocate memory for local reference block */
1981 	hba->lrb = devm_kzalloc(hba->dev,
1982 				hba->nutrs * sizeof(struct ufshcd_lrb),
1983 				GFP_KERNEL);
1984 	if (!hba->lrb) {
1985 		dev_err(hba->dev, "LRB Memory allocation failed\n");
1986 		goto out;
1987 	}
1988 	return 0;
1989 out:
1990 	return -ENOMEM;
1991 }
1992 
1993 /**
1994  * ufshcd_host_memory_configure - configure local reference block with
1995  *				memory offsets
1996  * @hba: per adapter instance
1997  *
1998  * Configure Host memory space
1999  * 1. Update Corresponding UTRD.UCDBA and UTRD.UCDBAU with UCD DMA
2000  * address.
2001  * 2. Update each UTRD with Response UPIU offset, Response UPIU length
2002  * and PRDT offset.
2003  * 3. Save the corresponding addresses of UTRD, UCD.CMD, UCD.RSP and UCD.PRDT
2004  * into local reference block.
2005  */
ufshcd_host_memory_configure(struct ufs_hba * hba)2006 static void ufshcd_host_memory_configure(struct ufs_hba *hba)
2007 {
2008 	struct utp_transfer_cmd_desc *cmd_descp;
2009 	struct utp_transfer_req_desc *utrdlp;
2010 	dma_addr_t cmd_desc_dma_addr;
2011 	dma_addr_t cmd_desc_element_addr;
2012 	u16 response_offset;
2013 	u16 prdt_offset;
2014 	int cmd_desc_size;
2015 	int i;
2016 
2017 	utrdlp = hba->utrdl_base_addr;
2018 	cmd_descp = hba->ucdl_base_addr;
2019 
2020 	response_offset =
2021 		offsetof(struct utp_transfer_cmd_desc, response_upiu);
2022 	prdt_offset =
2023 		offsetof(struct utp_transfer_cmd_desc, prd_table);
2024 
2025 	cmd_desc_size = sizeof(struct utp_transfer_cmd_desc);
2026 	cmd_desc_dma_addr = hba->ucdl_dma_addr;
2027 
2028 	for (i = 0; i < hba->nutrs; i++) {
2029 		/* Configure UTRD with command descriptor base address */
2030 		cmd_desc_element_addr =
2031 				(cmd_desc_dma_addr + (cmd_desc_size * i));
2032 		utrdlp[i].command_desc_base_addr_lo =
2033 				cpu_to_le32(lower_32_bits(cmd_desc_element_addr));
2034 		utrdlp[i].command_desc_base_addr_hi =
2035 				cpu_to_le32(upper_32_bits(cmd_desc_element_addr));
2036 
2037 		/* Response upiu and prdt offset should be in double words */
2038 		utrdlp[i].response_upiu_offset =
2039 				cpu_to_le16((response_offset >> 2));
2040 		utrdlp[i].prd_table_offset =
2041 				cpu_to_le16((prdt_offset >> 2));
2042 		utrdlp[i].response_upiu_length =
2043 				cpu_to_le16(ALIGNED_UPIU_SIZE >> 2);
2044 
2045 		hba->lrb[i].utr_descriptor_ptr = (utrdlp + i);
2046 		hba->lrb[i].ucd_req_ptr =
2047 			(struct utp_upiu_req *)(cmd_descp + i);
2048 		hba->lrb[i].ucd_rsp_ptr =
2049 			(struct utp_upiu_rsp *)cmd_descp[i].response_upiu;
2050 		hba->lrb[i].ucd_prdt_ptr =
2051 			(struct ufshcd_sg_entry *)cmd_descp[i].prd_table;
2052 	}
2053 }
2054 
2055 /**
2056  * ufshcd_dme_link_startup - Notify Unipro to perform link startup
2057  * @hba: per adapter instance
2058  *
2059  * UIC_CMD_DME_LINK_STARTUP command must be issued to Unipro layer,
2060  * in order to initialize the Unipro link startup procedure.
2061  * Once the Unipro links are up, the device connected to the controller
2062  * is detected.
2063  *
2064  * Returns 0 on success, non-zero value on failure
2065  */
ufshcd_dme_link_startup(struct ufs_hba * hba)2066 static int ufshcd_dme_link_startup(struct ufs_hba *hba)
2067 {
2068 	struct uic_command uic_cmd = {0};
2069 	int ret;
2070 
2071 	uic_cmd.command = UIC_CMD_DME_LINK_STARTUP;
2072 
2073 	ret = ufshcd_send_uic_cmd(hba, &uic_cmd);
2074 	if (ret)
2075 		dev_err(hba->dev,
2076 			"dme-link-startup: error code %d\n", ret);
2077 	return ret;
2078 }
2079 
ufshcd_add_delay_before_dme_cmd(struct ufs_hba * hba)2080 static inline void ufshcd_add_delay_before_dme_cmd(struct ufs_hba *hba)
2081 {
2082 	#define MIN_DELAY_BEFORE_DME_CMDS_US	1000
2083 	unsigned long min_sleep_time_us;
2084 
2085 	if (!(hba->quirks & UFSHCD_QUIRK_DELAY_BEFORE_DME_CMDS))
2086 		return;
2087 
2088 	/*
2089 	 * last_dme_cmd_tstamp will be 0 only for 1st call to
2090 	 * this function
2091 	 */
2092 	if (unlikely(!ktime_to_us(hba->last_dme_cmd_tstamp))) {
2093 		min_sleep_time_us = MIN_DELAY_BEFORE_DME_CMDS_US;
2094 	} else {
2095 		unsigned long delta =
2096 			(unsigned long) ktime_to_us(
2097 				ktime_sub(ktime_get(),
2098 				hba->last_dme_cmd_tstamp));
2099 
2100 		if (delta < MIN_DELAY_BEFORE_DME_CMDS_US)
2101 			min_sleep_time_us =
2102 				MIN_DELAY_BEFORE_DME_CMDS_US - delta;
2103 		else
2104 			return; /* no more delay required */
2105 	}
2106 
2107 	/* allow sleep for extra 50us if needed */
2108 	usleep_range(min_sleep_time_us, min_sleep_time_us + 50);
2109 }
2110 
2111 /**
2112  * ufshcd_dme_set_attr - UIC command for DME_SET, DME_PEER_SET
2113  * @hba: per adapter instance
2114  * @attr_sel: uic command argument1
2115  * @attr_set: attribute set type as uic command argument2
2116  * @mib_val: setting value as uic command argument3
2117  * @peer: indicate whether peer or local
2118  *
2119  * Returns 0 on success, non-zero value on failure
2120  */
ufshcd_dme_set_attr(struct ufs_hba * hba,u32 attr_sel,u8 attr_set,u32 mib_val,u8 peer)2121 int ufshcd_dme_set_attr(struct ufs_hba *hba, u32 attr_sel,
2122 			u8 attr_set, u32 mib_val, u8 peer)
2123 {
2124 	struct uic_command uic_cmd = {0};
2125 	static const char *const action[] = {
2126 		"dme-set",
2127 		"dme-peer-set"
2128 	};
2129 	const char *set = action[!!peer];
2130 	int ret;
2131 
2132 	uic_cmd.command = peer ?
2133 		UIC_CMD_DME_PEER_SET : UIC_CMD_DME_SET;
2134 	uic_cmd.argument1 = attr_sel;
2135 	uic_cmd.argument2 = UIC_ARG_ATTR_TYPE(attr_set);
2136 	uic_cmd.argument3 = mib_val;
2137 
2138 	ret = ufshcd_send_uic_cmd(hba, &uic_cmd);
2139 	if (ret)
2140 		dev_err(hba->dev, "%s: attr-id 0x%x val 0x%x error code %d\n",
2141 			set, UIC_GET_ATTR_ID(attr_sel), mib_val, ret);
2142 
2143 	return ret;
2144 }
2145 EXPORT_SYMBOL_GPL(ufshcd_dme_set_attr);
2146 
2147 /**
2148  * ufshcd_dme_get_attr - UIC command for DME_GET, DME_PEER_GET
2149  * @hba: per adapter instance
2150  * @attr_sel: uic command argument1
2151  * @mib_val: the value of the attribute as returned by the UIC command
2152  * @peer: indicate whether peer or local
2153  *
2154  * Returns 0 on success, non-zero value on failure
2155  */
ufshcd_dme_get_attr(struct ufs_hba * hba,u32 attr_sel,u32 * mib_val,u8 peer)2156 int ufshcd_dme_get_attr(struct ufs_hba *hba, u32 attr_sel,
2157 			u32 *mib_val, u8 peer)
2158 {
2159 	struct uic_command uic_cmd = {0};
2160 	static const char *const action[] = {
2161 		"dme-get",
2162 		"dme-peer-get"
2163 	};
2164 	const char *get = action[!!peer];
2165 	int ret;
2166 	struct ufs_pa_layer_attr orig_pwr_info;
2167 	struct ufs_pa_layer_attr temp_pwr_info;
2168 	bool pwr_mode_change = false;
2169 
2170 	if (peer && (hba->quirks & UFSHCD_QUIRK_DME_PEER_ACCESS_AUTO_MODE)) {
2171 		orig_pwr_info = hba->pwr_info;
2172 		temp_pwr_info = orig_pwr_info;
2173 
2174 		if (orig_pwr_info.pwr_tx == FAST_MODE ||
2175 		    orig_pwr_info.pwr_rx == FAST_MODE) {
2176 			temp_pwr_info.pwr_tx = FASTAUTO_MODE;
2177 			temp_pwr_info.pwr_rx = FASTAUTO_MODE;
2178 			pwr_mode_change = true;
2179 		} else if (orig_pwr_info.pwr_tx == SLOW_MODE ||
2180 		    orig_pwr_info.pwr_rx == SLOW_MODE) {
2181 			temp_pwr_info.pwr_tx = SLOWAUTO_MODE;
2182 			temp_pwr_info.pwr_rx = SLOWAUTO_MODE;
2183 			pwr_mode_change = true;
2184 		}
2185 		if (pwr_mode_change) {
2186 			ret = ufshcd_change_power_mode(hba, &temp_pwr_info);
2187 			if (ret)
2188 				goto out;
2189 		}
2190 	}
2191 
2192 	uic_cmd.command = peer ?
2193 		UIC_CMD_DME_PEER_GET : UIC_CMD_DME_GET;
2194 	uic_cmd.argument1 = attr_sel;
2195 
2196 	ret = ufshcd_send_uic_cmd(hba, &uic_cmd);
2197 	if (ret) {
2198 		dev_err(hba->dev, "%s: attr-id 0x%x error code %d\n",
2199 			get, UIC_GET_ATTR_ID(attr_sel), ret);
2200 		goto out;
2201 	}
2202 
2203 	if (mib_val)
2204 		*mib_val = uic_cmd.argument3;
2205 
2206 	if (peer && (hba->quirks & UFSHCD_QUIRK_DME_PEER_ACCESS_AUTO_MODE)
2207 	    && pwr_mode_change)
2208 		ufshcd_change_power_mode(hba, &orig_pwr_info);
2209 out:
2210 	return ret;
2211 }
2212 EXPORT_SYMBOL_GPL(ufshcd_dme_get_attr);
2213 
2214 /**
2215  * ufshcd_uic_pwr_ctrl - executes UIC commands (which affects the link power
2216  * state) and waits for it to take effect.
2217  *
2218  * @hba: per adapter instance
2219  * @cmd: UIC command to execute
2220  *
2221  * DME operations like DME_SET(PA_PWRMODE), DME_HIBERNATE_ENTER &
2222  * DME_HIBERNATE_EXIT commands take some time to take its effect on both host
2223  * and device UniPro link and hence it's final completion would be indicated by
2224  * dedicated status bits in Interrupt Status register (UPMS, UHES, UHXS) in
2225  * addition to normal UIC command completion Status (UCCS). This function only
2226  * returns after the relevant status bits indicate the completion.
2227  *
2228  * Returns 0 on success, non-zero value on failure
2229  */
ufshcd_uic_pwr_ctrl(struct ufs_hba * hba,struct uic_command * cmd)2230 static int ufshcd_uic_pwr_ctrl(struct ufs_hba *hba, struct uic_command *cmd)
2231 {
2232 	struct completion uic_async_done;
2233 	unsigned long flags;
2234 	u8 status;
2235 	int ret;
2236 
2237 	mutex_lock(&hba->uic_cmd_mutex);
2238 	init_completion(&uic_async_done);
2239 	ufshcd_add_delay_before_dme_cmd(hba);
2240 
2241 	spin_lock_irqsave(hba->host->host_lock, flags);
2242 	hba->uic_async_done = &uic_async_done;
2243 	ret = __ufshcd_send_uic_cmd(hba, cmd);
2244 	spin_unlock_irqrestore(hba->host->host_lock, flags);
2245 	if (ret) {
2246 		dev_err(hba->dev,
2247 			"pwr ctrl cmd 0x%x with mode 0x%x uic error %d\n",
2248 			cmd->command, cmd->argument3, ret);
2249 		goto out;
2250 	}
2251 	ret = ufshcd_wait_for_uic_cmd(hba, cmd);
2252 	if (ret) {
2253 		dev_err(hba->dev,
2254 			"pwr ctrl cmd 0x%x with mode 0x%x uic error %d\n",
2255 			cmd->command, cmd->argument3, ret);
2256 		goto out;
2257 	}
2258 
2259 	if (!wait_for_completion_timeout(hba->uic_async_done,
2260 					 msecs_to_jiffies(UIC_CMD_TIMEOUT))) {
2261 		dev_err(hba->dev,
2262 			"pwr ctrl cmd 0x%x with mode 0x%x completion timeout\n",
2263 			cmd->command, cmd->argument3);
2264 		ret = -ETIMEDOUT;
2265 		goto out;
2266 	}
2267 
2268 	status = ufshcd_get_upmcrs(hba);
2269 	if (status != PWR_LOCAL) {
2270 		dev_err(hba->dev,
2271 			"pwr ctrl cmd 0x%0x failed, host umpcrs:0x%x\n",
2272 			cmd->command, status);
2273 		ret = (status != PWR_OK) ? status : -1;
2274 	}
2275 out:
2276 	spin_lock_irqsave(hba->host->host_lock, flags);
2277 	hba->uic_async_done = NULL;
2278 	spin_unlock_irqrestore(hba->host->host_lock, flags);
2279 	mutex_unlock(&hba->uic_cmd_mutex);
2280 
2281 	return ret;
2282 }
2283 
2284 /**
2285  * ufshcd_uic_change_pwr_mode - Perform the UIC power mode chage
2286  *				using DME_SET primitives.
2287  * @hba: per adapter instance
2288  * @mode: powr mode value
2289  *
2290  * Returns 0 on success, non-zero value on failure
2291  */
ufshcd_uic_change_pwr_mode(struct ufs_hba * hba,u8 mode)2292 static int ufshcd_uic_change_pwr_mode(struct ufs_hba *hba, u8 mode)
2293 {
2294 	struct uic_command uic_cmd = {0};
2295 	int ret;
2296 
2297 	if (hba->quirks & UFSHCD_QUIRK_BROKEN_PA_RXHSUNTERMCAP) {
2298 		ret = ufshcd_dme_set(hba,
2299 				UIC_ARG_MIB_SEL(PA_RXHSUNTERMCAP, 0), 1);
2300 		if (ret) {
2301 			dev_err(hba->dev, "%s: failed to enable PA_RXHSUNTERMCAP ret %d\n",
2302 						__func__, ret);
2303 			goto out;
2304 		}
2305 	}
2306 
2307 	uic_cmd.command = UIC_CMD_DME_SET;
2308 	uic_cmd.argument1 = UIC_ARG_MIB(PA_PWRMODE);
2309 	uic_cmd.argument3 = mode;
2310 	ufshcd_hold(hba, false);
2311 	ret = ufshcd_uic_pwr_ctrl(hba, &uic_cmd);
2312 	ufshcd_release(hba);
2313 
2314 out:
2315 	return ret;
2316 }
2317 
ufshcd_uic_hibern8_enter(struct ufs_hba * hba)2318 static int ufshcd_uic_hibern8_enter(struct ufs_hba *hba)
2319 {
2320 	struct uic_command uic_cmd = {0};
2321 
2322 	uic_cmd.command = UIC_CMD_DME_HIBER_ENTER;
2323 
2324 	return ufshcd_uic_pwr_ctrl(hba, &uic_cmd);
2325 }
2326 
ufshcd_uic_hibern8_exit(struct ufs_hba * hba)2327 static int ufshcd_uic_hibern8_exit(struct ufs_hba *hba)
2328 {
2329 	struct uic_command uic_cmd = {0};
2330 	int ret;
2331 
2332 	uic_cmd.command = UIC_CMD_DME_HIBER_EXIT;
2333 	ret = ufshcd_uic_pwr_ctrl(hba, &uic_cmd);
2334 	if (ret) {
2335 		ufshcd_set_link_off(hba);
2336 		ret = ufshcd_host_reset_and_restore(hba);
2337 	}
2338 
2339 	return ret;
2340 }
2341 
2342  /**
2343  * ufshcd_init_pwr_info - setting the POR (power on reset)
2344  * values in hba power info
2345  * @hba: per-adapter instance
2346  */
ufshcd_init_pwr_info(struct ufs_hba * hba)2347 static void ufshcd_init_pwr_info(struct ufs_hba *hba)
2348 {
2349 	hba->pwr_info.gear_rx = UFS_PWM_G1;
2350 	hba->pwr_info.gear_tx = UFS_PWM_G1;
2351 	hba->pwr_info.lane_rx = 1;
2352 	hba->pwr_info.lane_tx = 1;
2353 	hba->pwr_info.pwr_rx = SLOWAUTO_MODE;
2354 	hba->pwr_info.pwr_tx = SLOWAUTO_MODE;
2355 	hba->pwr_info.hs_rate = 0;
2356 }
2357 
2358 /**
2359  * ufshcd_get_max_pwr_mode - reads the max power mode negotiated with device
2360  * @hba: per-adapter instance
2361  */
ufshcd_get_max_pwr_mode(struct ufs_hba * hba)2362 static int ufshcd_get_max_pwr_mode(struct ufs_hba *hba)
2363 {
2364 	struct ufs_pa_layer_attr *pwr_info = &hba->max_pwr_info.info;
2365 
2366 	if (hba->max_pwr_info.is_valid)
2367 		return 0;
2368 
2369 	pwr_info->pwr_tx = FASTAUTO_MODE;
2370 	pwr_info->pwr_rx = FASTAUTO_MODE;
2371 	pwr_info->hs_rate = PA_HS_MODE_B;
2372 
2373 	/* Get the connected lane count */
2374 	ufshcd_dme_get(hba, UIC_ARG_MIB(PA_CONNECTEDRXDATALANES),
2375 			&pwr_info->lane_rx);
2376 	ufshcd_dme_get(hba, UIC_ARG_MIB(PA_CONNECTEDTXDATALANES),
2377 			&pwr_info->lane_tx);
2378 
2379 	if (!pwr_info->lane_rx || !pwr_info->lane_tx) {
2380 		dev_err(hba->dev, "%s: invalid connected lanes value. rx=%d, tx=%d\n",
2381 				__func__,
2382 				pwr_info->lane_rx,
2383 				pwr_info->lane_tx);
2384 		return -EINVAL;
2385 	}
2386 
2387 	/*
2388 	 * First, get the maximum gears of HS speed.
2389 	 * If a zero value, it means there is no HSGEAR capability.
2390 	 * Then, get the maximum gears of PWM speed.
2391 	 */
2392 	ufshcd_dme_get(hba, UIC_ARG_MIB(PA_MAXRXHSGEAR), &pwr_info->gear_rx);
2393 	if (!pwr_info->gear_rx) {
2394 		ufshcd_dme_get(hba, UIC_ARG_MIB(PA_MAXRXPWMGEAR),
2395 				&pwr_info->gear_rx);
2396 		if (!pwr_info->gear_rx) {
2397 			dev_err(hba->dev, "%s: invalid max pwm rx gear read = %d\n",
2398 				__func__, pwr_info->gear_rx);
2399 			return -EINVAL;
2400 		}
2401 		pwr_info->pwr_rx = SLOWAUTO_MODE;
2402 	}
2403 
2404 	ufshcd_dme_peer_get(hba, UIC_ARG_MIB(PA_MAXRXHSGEAR),
2405 			&pwr_info->gear_tx);
2406 	if (!pwr_info->gear_tx) {
2407 		ufshcd_dme_peer_get(hba, UIC_ARG_MIB(PA_MAXRXPWMGEAR),
2408 				&pwr_info->gear_tx);
2409 		if (!pwr_info->gear_tx) {
2410 			dev_err(hba->dev, "%s: invalid max pwm tx gear read = %d\n",
2411 				__func__, pwr_info->gear_tx);
2412 			return -EINVAL;
2413 		}
2414 		pwr_info->pwr_tx = SLOWAUTO_MODE;
2415 	}
2416 
2417 	hba->max_pwr_info.is_valid = true;
2418 	return 0;
2419 }
2420 
ufshcd_change_power_mode(struct ufs_hba * hba,struct ufs_pa_layer_attr * pwr_mode)2421 static int ufshcd_change_power_mode(struct ufs_hba *hba,
2422 			     struct ufs_pa_layer_attr *pwr_mode)
2423 {
2424 	int ret;
2425 
2426 	/* if already configured to the requested pwr_mode */
2427 	if (pwr_mode->gear_rx == hba->pwr_info.gear_rx &&
2428 	    pwr_mode->gear_tx == hba->pwr_info.gear_tx &&
2429 	    pwr_mode->lane_rx == hba->pwr_info.lane_rx &&
2430 	    pwr_mode->lane_tx == hba->pwr_info.lane_tx &&
2431 	    pwr_mode->pwr_rx == hba->pwr_info.pwr_rx &&
2432 	    pwr_mode->pwr_tx == hba->pwr_info.pwr_tx &&
2433 	    pwr_mode->hs_rate == hba->pwr_info.hs_rate) {
2434 		dev_dbg(hba->dev, "%s: power already configured\n", __func__);
2435 		return 0;
2436 	}
2437 
2438 	/*
2439 	 * Configure attributes for power mode change with below.
2440 	 * - PA_RXGEAR, PA_ACTIVERXDATALANES, PA_RXTERMINATION,
2441 	 * - PA_TXGEAR, PA_ACTIVETXDATALANES, PA_TXTERMINATION,
2442 	 * - PA_HSSERIES
2443 	 */
2444 	ufshcd_dme_set(hba, UIC_ARG_MIB(PA_RXGEAR), pwr_mode->gear_rx);
2445 	ufshcd_dme_set(hba, UIC_ARG_MIB(PA_ACTIVERXDATALANES),
2446 			pwr_mode->lane_rx);
2447 	if (pwr_mode->pwr_rx == FASTAUTO_MODE ||
2448 			pwr_mode->pwr_rx == FAST_MODE)
2449 		ufshcd_dme_set(hba, UIC_ARG_MIB(PA_RXTERMINATION), TRUE);
2450 	else
2451 		ufshcd_dme_set(hba, UIC_ARG_MIB(PA_RXTERMINATION), FALSE);
2452 
2453 	ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TXGEAR), pwr_mode->gear_tx);
2454 	ufshcd_dme_set(hba, UIC_ARG_MIB(PA_ACTIVETXDATALANES),
2455 			pwr_mode->lane_tx);
2456 	if (pwr_mode->pwr_tx == FASTAUTO_MODE ||
2457 			pwr_mode->pwr_tx == FAST_MODE)
2458 		ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TXTERMINATION), TRUE);
2459 	else
2460 		ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TXTERMINATION), FALSE);
2461 
2462 	if (pwr_mode->pwr_rx == FASTAUTO_MODE ||
2463 	    pwr_mode->pwr_tx == FASTAUTO_MODE ||
2464 	    pwr_mode->pwr_rx == FAST_MODE ||
2465 	    pwr_mode->pwr_tx == FAST_MODE)
2466 		ufshcd_dme_set(hba, UIC_ARG_MIB(PA_HSSERIES),
2467 						pwr_mode->hs_rate);
2468 
2469 	ret = ufshcd_uic_change_pwr_mode(hba, pwr_mode->pwr_rx << 4
2470 			| pwr_mode->pwr_tx);
2471 
2472 	if (ret) {
2473 		dev_err(hba->dev,
2474 			"%s: power mode change failed %d\n", __func__, ret);
2475 	} else {
2476 		ufshcd_vops_pwr_change_notify(hba, POST_CHANGE, NULL,
2477 								pwr_mode);
2478 
2479 		memcpy(&hba->pwr_info, pwr_mode,
2480 			sizeof(struct ufs_pa_layer_attr));
2481 	}
2482 
2483 	return ret;
2484 }
2485 
2486 /**
2487  * ufshcd_config_pwr_mode - configure a new power mode
2488  * @hba: per-adapter instance
2489  * @desired_pwr_mode: desired power configuration
2490  */
ufshcd_config_pwr_mode(struct ufs_hba * hba,struct ufs_pa_layer_attr * desired_pwr_mode)2491 static int ufshcd_config_pwr_mode(struct ufs_hba *hba,
2492 		struct ufs_pa_layer_attr *desired_pwr_mode)
2493 {
2494 	struct ufs_pa_layer_attr final_params = { 0 };
2495 	int ret;
2496 
2497 	ret = ufshcd_vops_pwr_change_notify(hba, PRE_CHANGE,
2498 					desired_pwr_mode, &final_params);
2499 
2500 	if (ret)
2501 		memcpy(&final_params, desired_pwr_mode, sizeof(final_params));
2502 
2503 	ret = ufshcd_change_power_mode(hba, &final_params);
2504 
2505 	return ret;
2506 }
2507 
2508 /**
2509  * ufshcd_complete_dev_init() - checks device readiness
2510  * hba: per-adapter instance
2511  *
2512  * Set fDeviceInit flag and poll until device toggles it.
2513  */
ufshcd_complete_dev_init(struct ufs_hba * hba)2514 static int ufshcd_complete_dev_init(struct ufs_hba *hba)
2515 {
2516 	int i, retries, err = 0;
2517 	bool flag_res = 1;
2518 
2519 	for (retries = QUERY_REQ_RETRIES; retries > 0; retries--) {
2520 		/* Set the fDeviceInit flag */
2521 		err = ufshcd_query_flag(hba, UPIU_QUERY_OPCODE_SET_FLAG,
2522 					QUERY_FLAG_IDN_FDEVICEINIT, NULL);
2523 		if (!err || err == -ETIMEDOUT)
2524 			break;
2525 		dev_dbg(hba->dev, "%s: error %d retrying\n", __func__, err);
2526 	}
2527 	if (err) {
2528 		dev_err(hba->dev,
2529 			"%s setting fDeviceInit flag failed with error %d\n",
2530 			__func__, err);
2531 		goto out;
2532 	}
2533 
2534 	/* poll for max. 100 iterations for fDeviceInit flag to clear */
2535 	for (i = 0; i < 100 && !err && flag_res; i++) {
2536 		for (retries = QUERY_REQ_RETRIES; retries > 0; retries--) {
2537 			err = ufshcd_query_flag(hba,
2538 					UPIU_QUERY_OPCODE_READ_FLAG,
2539 					QUERY_FLAG_IDN_FDEVICEINIT, &flag_res);
2540 			if (!err || err == -ETIMEDOUT)
2541 				break;
2542 			dev_dbg(hba->dev, "%s: error %d retrying\n", __func__,
2543 					err);
2544 		}
2545 	}
2546 	if (err)
2547 		dev_err(hba->dev,
2548 			"%s reading fDeviceInit flag failed with error %d\n",
2549 			__func__, err);
2550 	else if (flag_res)
2551 		dev_err(hba->dev,
2552 			"%s fDeviceInit was not cleared by the device\n",
2553 			__func__);
2554 
2555 out:
2556 	return err;
2557 }
2558 
2559 /**
2560  * ufshcd_make_hba_operational - Make UFS controller operational
2561  * @hba: per adapter instance
2562  *
2563  * To bring UFS host controller to operational state,
2564  * 1. Enable required interrupts
2565  * 2. Configure interrupt aggregation
2566  * 3. Program UTRL and UTMRL base addres
2567  * 4. Configure run-stop-registers
2568  *
2569  * Returns 0 on success, non-zero value on failure
2570  */
ufshcd_make_hba_operational(struct ufs_hba * hba)2571 static int ufshcd_make_hba_operational(struct ufs_hba *hba)
2572 {
2573 	int err = 0;
2574 	u32 reg;
2575 
2576 	/* Enable required interrupts */
2577 	ufshcd_enable_intr(hba, UFSHCD_ENABLE_INTRS);
2578 
2579 	/* Configure interrupt aggregation */
2580 	if (ufshcd_is_intr_aggr_allowed(hba))
2581 		ufshcd_config_intr_aggr(hba, hba->nutrs - 1, INT_AGGR_DEF_TO);
2582 	else
2583 		ufshcd_disable_intr_aggr(hba);
2584 
2585 	/* Configure UTRL and UTMRL base address registers */
2586 	ufshcd_writel(hba, lower_32_bits(hba->utrdl_dma_addr),
2587 			REG_UTP_TRANSFER_REQ_LIST_BASE_L);
2588 	ufshcd_writel(hba, upper_32_bits(hba->utrdl_dma_addr),
2589 			REG_UTP_TRANSFER_REQ_LIST_BASE_H);
2590 	ufshcd_writel(hba, lower_32_bits(hba->utmrdl_dma_addr),
2591 			REG_UTP_TASK_REQ_LIST_BASE_L);
2592 	ufshcd_writel(hba, upper_32_bits(hba->utmrdl_dma_addr),
2593 			REG_UTP_TASK_REQ_LIST_BASE_H);
2594 
2595 	/*
2596 	 * UCRDY, UTMRLDY and UTRLRDY bits must be 1
2597 	 * DEI, HEI bits must be 0
2598 	 */
2599 	reg = ufshcd_readl(hba, REG_CONTROLLER_STATUS);
2600 	if (!(ufshcd_get_lists_status(reg))) {
2601 		ufshcd_enable_run_stop_reg(hba);
2602 	} else {
2603 		dev_err(hba->dev,
2604 			"Host controller not ready to process requests");
2605 		err = -EIO;
2606 		goto out;
2607 	}
2608 
2609 out:
2610 	return err;
2611 }
2612 
2613 /**
2614  * ufshcd_hba_enable - initialize the controller
2615  * @hba: per adapter instance
2616  *
2617  * The controller resets itself and controller firmware initialization
2618  * sequence kicks off. When controller is ready it will set
2619  * the Host Controller Enable bit to 1.
2620  *
2621  * Returns 0 on success, non-zero value on failure
2622  */
ufshcd_hba_enable(struct ufs_hba * hba)2623 static int ufshcd_hba_enable(struct ufs_hba *hba)
2624 {
2625 	int retry;
2626 
2627 	/*
2628 	 * msleep of 1 and 5 used in this function might result in msleep(20),
2629 	 * but it was necessary to send the UFS FPGA to reset mode during
2630 	 * development and testing of this driver. msleep can be changed to
2631 	 * mdelay and retry count can be reduced based on the controller.
2632 	 */
2633 	if (!ufshcd_is_hba_active(hba)) {
2634 
2635 		/* change controller state to "reset state" */
2636 		ufshcd_hba_stop(hba);
2637 
2638 		/*
2639 		 * This delay is based on the testing done with UFS host
2640 		 * controller FPGA. The delay can be changed based on the
2641 		 * host controller used.
2642 		 */
2643 		msleep(5);
2644 	}
2645 
2646 	/* UniPro link is disabled at this point */
2647 	ufshcd_set_link_off(hba);
2648 
2649 	ufshcd_vops_hce_enable_notify(hba, PRE_CHANGE);
2650 
2651 	/* start controller initialization sequence */
2652 	ufshcd_hba_start(hba);
2653 
2654 	/*
2655 	 * To initialize a UFS host controller HCE bit must be set to 1.
2656 	 * During initialization the HCE bit value changes from 1->0->1.
2657 	 * When the host controller completes initialization sequence
2658 	 * it sets the value of HCE bit to 1. The same HCE bit is read back
2659 	 * to check if the controller has completed initialization sequence.
2660 	 * So without this delay the value HCE = 1, set in the previous
2661 	 * instruction might be read back.
2662 	 * This delay can be changed based on the controller.
2663 	 */
2664 	msleep(1);
2665 
2666 	/* wait for the host controller to complete initialization */
2667 	retry = 10;
2668 	while (ufshcd_is_hba_active(hba)) {
2669 		if (retry) {
2670 			retry--;
2671 		} else {
2672 			dev_err(hba->dev,
2673 				"Controller enable failed\n");
2674 			return -EIO;
2675 		}
2676 		msleep(5);
2677 	}
2678 
2679 	/* enable UIC related interrupts */
2680 	ufshcd_enable_intr(hba, UFSHCD_UIC_MASK);
2681 
2682 	ufshcd_vops_hce_enable_notify(hba, POST_CHANGE);
2683 
2684 	return 0;
2685 }
2686 
ufshcd_disable_tx_lcc(struct ufs_hba * hba,bool peer)2687 static int ufshcd_disable_tx_lcc(struct ufs_hba *hba, bool peer)
2688 {
2689 	int tx_lanes, i, err = 0;
2690 
2691 	if (!peer)
2692 		ufshcd_dme_get(hba, UIC_ARG_MIB(PA_CONNECTEDTXDATALANES),
2693 			       &tx_lanes);
2694 	else
2695 		ufshcd_dme_peer_get(hba, UIC_ARG_MIB(PA_CONNECTEDTXDATALANES),
2696 				    &tx_lanes);
2697 	for (i = 0; i < tx_lanes; i++) {
2698 		if (!peer)
2699 			err = ufshcd_dme_set(hba,
2700 				UIC_ARG_MIB_SEL(TX_LCC_ENABLE,
2701 					UIC_ARG_MPHY_TX_GEN_SEL_INDEX(i)),
2702 					0);
2703 		else
2704 			err = ufshcd_dme_peer_set(hba,
2705 				UIC_ARG_MIB_SEL(TX_LCC_ENABLE,
2706 					UIC_ARG_MPHY_TX_GEN_SEL_INDEX(i)),
2707 					0);
2708 		if (err) {
2709 			dev_err(hba->dev, "%s: TX LCC Disable failed, peer = %d, lane = %d, err = %d",
2710 				__func__, peer, i, err);
2711 			break;
2712 		}
2713 	}
2714 
2715 	return err;
2716 }
2717 
ufshcd_disable_device_tx_lcc(struct ufs_hba * hba)2718 static inline int ufshcd_disable_device_tx_lcc(struct ufs_hba *hba)
2719 {
2720 	return ufshcd_disable_tx_lcc(hba, true);
2721 }
2722 
2723 /**
2724  * ufshcd_link_startup - Initialize unipro link startup
2725  * @hba: per adapter instance
2726  *
2727  * Returns 0 for success, non-zero in case of failure
2728  */
ufshcd_link_startup(struct ufs_hba * hba)2729 static int ufshcd_link_startup(struct ufs_hba *hba)
2730 {
2731 	int ret;
2732 	int retries = DME_LINKSTARTUP_RETRIES;
2733 
2734 	do {
2735 		ufshcd_vops_link_startup_notify(hba, PRE_CHANGE);
2736 
2737 		ret = ufshcd_dme_link_startup(hba);
2738 
2739 		/* check if device is detected by inter-connect layer */
2740 		if (!ret && !ufshcd_is_device_present(hba)) {
2741 			dev_err(hba->dev, "%s: Device not present\n", __func__);
2742 			ret = -ENXIO;
2743 			goto out;
2744 		}
2745 
2746 		/*
2747 		 * DME link lost indication is only received when link is up,
2748 		 * but we can't be sure if the link is up until link startup
2749 		 * succeeds. So reset the local Uni-Pro and try again.
2750 		 */
2751 		if (ret && ufshcd_hba_enable(hba))
2752 			goto out;
2753 	} while (ret && retries--);
2754 
2755 	if (ret)
2756 		/* failed to get the link up... retire */
2757 		goto out;
2758 
2759 	if (hba->quirks & UFSHCD_QUIRK_BROKEN_LCC) {
2760 		ret = ufshcd_disable_device_tx_lcc(hba);
2761 		if (ret)
2762 			goto out;
2763 	}
2764 
2765 	/* Include any host controller configuration via UIC commands */
2766 	ret = ufshcd_vops_link_startup_notify(hba, POST_CHANGE);
2767 	if (ret)
2768 		goto out;
2769 
2770 	ret = ufshcd_make_hba_operational(hba);
2771 out:
2772 	if (ret)
2773 		dev_err(hba->dev, "link startup failed %d\n", ret);
2774 	return ret;
2775 }
2776 
2777 /**
2778  * ufshcd_verify_dev_init() - Verify device initialization
2779  * @hba: per-adapter instance
2780  *
2781  * Send NOP OUT UPIU and wait for NOP IN response to check whether the
2782  * device Transport Protocol (UTP) layer is ready after a reset.
2783  * If the UTP layer at the device side is not initialized, it may
2784  * not respond with NOP IN UPIU within timeout of %NOP_OUT_TIMEOUT
2785  * and we retry sending NOP OUT for %NOP_OUT_RETRIES iterations.
2786  */
ufshcd_verify_dev_init(struct ufs_hba * hba)2787 static int ufshcd_verify_dev_init(struct ufs_hba *hba)
2788 {
2789 	int err = 0;
2790 	int retries;
2791 
2792 	ufshcd_hold(hba, false);
2793 	mutex_lock(&hba->dev_cmd.lock);
2794 	for (retries = NOP_OUT_RETRIES; retries > 0; retries--) {
2795 		err = ufshcd_exec_dev_cmd(hba, DEV_CMD_TYPE_NOP,
2796 					       NOP_OUT_TIMEOUT);
2797 
2798 		if (!err || err == -ETIMEDOUT)
2799 			break;
2800 
2801 		dev_dbg(hba->dev, "%s: error %d retrying\n", __func__, err);
2802 	}
2803 	mutex_unlock(&hba->dev_cmd.lock);
2804 	ufshcd_release(hba);
2805 
2806 	if (err)
2807 		dev_err(hba->dev, "%s: NOP OUT failed %d\n", __func__, err);
2808 	return err;
2809 }
2810 
2811 /**
2812  * ufshcd_set_queue_depth - set lun queue depth
2813  * @sdev: pointer to SCSI device
2814  *
2815  * Read bLUQueueDepth value and activate scsi tagged command
2816  * queueing. For WLUN, queue depth is set to 1. For best-effort
2817  * cases (bLUQueueDepth = 0) the queue depth is set to a maximum
2818  * value that host can queue.
2819  */
ufshcd_set_queue_depth(struct scsi_device * sdev)2820 static void ufshcd_set_queue_depth(struct scsi_device *sdev)
2821 {
2822 	int ret = 0;
2823 	u8 lun_qdepth;
2824 	struct ufs_hba *hba;
2825 
2826 	hba = shost_priv(sdev->host);
2827 
2828 	lun_qdepth = hba->nutrs;
2829 	ret = ufshcd_read_unit_desc_param(hba,
2830 					  ufshcd_scsi_to_upiu_lun(sdev->lun),
2831 					  UNIT_DESC_PARAM_LU_Q_DEPTH,
2832 					  &lun_qdepth,
2833 					  sizeof(lun_qdepth));
2834 
2835 	/* Some WLUN doesn't support unit descriptor */
2836 	if (ret == -EOPNOTSUPP)
2837 		lun_qdepth = 1;
2838 	else if (!lun_qdepth)
2839 		/* eventually, we can figure out the real queue depth */
2840 		lun_qdepth = hba->nutrs;
2841 	else
2842 		lun_qdepth = min_t(int, lun_qdepth, hba->nutrs);
2843 
2844 	dev_dbg(hba->dev, "%s: activate tcq with queue depth %d\n",
2845 			__func__, lun_qdepth);
2846 	scsi_change_queue_depth(sdev, lun_qdepth);
2847 }
2848 
2849 /*
2850  * ufshcd_get_lu_wp - returns the "b_lu_write_protect" from UNIT DESCRIPTOR
2851  * @hba: per-adapter instance
2852  * @lun: UFS device lun id
2853  * @b_lu_write_protect: pointer to buffer to hold the LU's write protect info
2854  *
2855  * Returns 0 in case of success and b_lu_write_protect status would be returned
2856  * @b_lu_write_protect parameter.
2857  * Returns -ENOTSUPP if reading b_lu_write_protect is not supported.
2858  * Returns -EINVAL in case of invalid parameters passed to this function.
2859  */
ufshcd_get_lu_wp(struct ufs_hba * hba,u8 lun,u8 * b_lu_write_protect)2860 static int ufshcd_get_lu_wp(struct ufs_hba *hba,
2861 			    u8 lun,
2862 			    u8 *b_lu_write_protect)
2863 {
2864 	int ret;
2865 
2866 	if (!b_lu_write_protect)
2867 		ret = -EINVAL;
2868 	/*
2869 	 * According to UFS device spec, RPMB LU can't be write
2870 	 * protected so skip reading bLUWriteProtect parameter for
2871 	 * it. For other W-LUs, UNIT DESCRIPTOR is not available.
2872 	 */
2873 	else if (lun >= UFS_UPIU_MAX_GENERAL_LUN)
2874 		ret = -ENOTSUPP;
2875 	else
2876 		ret = ufshcd_read_unit_desc_param(hba,
2877 					  lun,
2878 					  UNIT_DESC_PARAM_LU_WR_PROTECT,
2879 					  b_lu_write_protect,
2880 					  sizeof(*b_lu_write_protect));
2881 	return ret;
2882 }
2883 
2884 /**
2885  * ufshcd_get_lu_power_on_wp_status - get LU's power on write protect
2886  * status
2887  * @hba: per-adapter instance
2888  * @sdev: pointer to SCSI device
2889  *
2890  */
ufshcd_get_lu_power_on_wp_status(struct ufs_hba * hba,struct scsi_device * sdev)2891 static inline void ufshcd_get_lu_power_on_wp_status(struct ufs_hba *hba,
2892 						    struct scsi_device *sdev)
2893 {
2894 	if (hba->dev_info.f_power_on_wp_en &&
2895 	    !hba->dev_info.is_lu_power_on_wp) {
2896 		u8 b_lu_write_protect;
2897 
2898 		if (!ufshcd_get_lu_wp(hba, ufshcd_scsi_to_upiu_lun(sdev->lun),
2899 				      &b_lu_write_protect) &&
2900 		    (b_lu_write_protect == UFS_LU_POWER_ON_WP))
2901 			hba->dev_info.is_lu_power_on_wp = true;
2902 	}
2903 }
2904 
2905 /**
2906  * ufshcd_slave_alloc - handle initial SCSI device configurations
2907  * @sdev: pointer to SCSI device
2908  *
2909  * Returns success
2910  */
ufshcd_slave_alloc(struct scsi_device * sdev)2911 static int ufshcd_slave_alloc(struct scsi_device *sdev)
2912 {
2913 	struct ufs_hba *hba;
2914 
2915 	hba = shost_priv(sdev->host);
2916 
2917 	/* Mode sense(6) is not supported by UFS, so use Mode sense(10) */
2918 	sdev->use_10_for_ms = 1;
2919 
2920 	/* allow SCSI layer to restart the device in case of errors */
2921 	sdev->allow_restart = 1;
2922 
2923 	/* REPORT SUPPORTED OPERATION CODES is not supported */
2924 	sdev->no_report_opcodes = 1;
2925 
2926 
2927 	ufshcd_set_queue_depth(sdev);
2928 
2929 	ufshcd_get_lu_power_on_wp_status(hba, sdev);
2930 
2931 	return 0;
2932 }
2933 
2934 /**
2935  * ufshcd_change_queue_depth - change queue depth
2936  * @sdev: pointer to SCSI device
2937  * @depth: required depth to set
2938  *
2939  * Change queue depth and make sure the max. limits are not crossed.
2940  */
ufshcd_change_queue_depth(struct scsi_device * sdev,int depth)2941 static int ufshcd_change_queue_depth(struct scsi_device *sdev, int depth)
2942 {
2943 	struct ufs_hba *hba = shost_priv(sdev->host);
2944 
2945 	if (depth > hba->nutrs)
2946 		depth = hba->nutrs;
2947 	return scsi_change_queue_depth(sdev, depth);
2948 }
2949 
2950 /**
2951  * ufshcd_slave_configure - adjust SCSI device configurations
2952  * @sdev: pointer to SCSI device
2953  */
ufshcd_slave_configure(struct scsi_device * sdev)2954 static int ufshcd_slave_configure(struct scsi_device *sdev)
2955 {
2956 	struct request_queue *q = sdev->request_queue;
2957 
2958 	blk_queue_update_dma_pad(q, PRDT_DATA_BYTE_COUNT_PAD - 1);
2959 	blk_queue_max_segment_size(q, PRDT_DATA_BYTE_COUNT_MAX);
2960 
2961 	return 0;
2962 }
2963 
2964 /**
2965  * ufshcd_slave_destroy - remove SCSI device configurations
2966  * @sdev: pointer to SCSI device
2967  */
ufshcd_slave_destroy(struct scsi_device * sdev)2968 static void ufshcd_slave_destroy(struct scsi_device *sdev)
2969 {
2970 	struct ufs_hba *hba;
2971 
2972 	hba = shost_priv(sdev->host);
2973 	/* Drop the reference as it won't be needed anymore */
2974 	if (ufshcd_scsi_to_upiu_lun(sdev->lun) == UFS_UPIU_UFS_DEVICE_WLUN) {
2975 		unsigned long flags;
2976 
2977 		spin_lock_irqsave(hba->host->host_lock, flags);
2978 		hba->sdev_ufs_device = NULL;
2979 		spin_unlock_irqrestore(hba->host->host_lock, flags);
2980 	}
2981 }
2982 
2983 /**
2984  * ufshcd_task_req_compl - handle task management request completion
2985  * @hba: per adapter instance
2986  * @index: index of the completed request
2987  * @resp: task management service response
2988  *
2989  * Returns non-zero value on error, zero on success
2990  */
ufshcd_task_req_compl(struct ufs_hba * hba,u32 index,u8 * resp)2991 static int ufshcd_task_req_compl(struct ufs_hba *hba, u32 index, u8 *resp)
2992 {
2993 	struct utp_task_req_desc *task_req_descp;
2994 	struct utp_upiu_task_rsp *task_rsp_upiup;
2995 	unsigned long flags;
2996 	int ocs_value;
2997 	int task_result;
2998 
2999 	spin_lock_irqsave(hba->host->host_lock, flags);
3000 
3001 	/* Clear completed tasks from outstanding_tasks */
3002 	__clear_bit(index, &hba->outstanding_tasks);
3003 
3004 	task_req_descp = hba->utmrdl_base_addr;
3005 	ocs_value = ufshcd_get_tmr_ocs(&task_req_descp[index]);
3006 
3007 	if (ocs_value == OCS_SUCCESS) {
3008 		task_rsp_upiup = (struct utp_upiu_task_rsp *)
3009 				task_req_descp[index].task_rsp_upiu;
3010 		task_result = be32_to_cpu(task_rsp_upiup->header.dword_1);
3011 		task_result = ((task_result & MASK_TASK_RESPONSE) >> 8);
3012 		if (resp)
3013 			*resp = (u8)task_result;
3014 	} else {
3015 		dev_err(hba->dev, "%s: failed, ocs = 0x%x\n",
3016 				__func__, ocs_value);
3017 	}
3018 	spin_unlock_irqrestore(hba->host->host_lock, flags);
3019 
3020 	return ocs_value;
3021 }
3022 
3023 /**
3024  * ufshcd_scsi_cmd_status - Update SCSI command result based on SCSI status
3025  * @lrb: pointer to local reference block of completed command
3026  * @scsi_status: SCSI command status
3027  *
3028  * Returns value base on SCSI command status
3029  */
3030 static inline int
ufshcd_scsi_cmd_status(struct ufshcd_lrb * lrbp,int scsi_status)3031 ufshcd_scsi_cmd_status(struct ufshcd_lrb *lrbp, int scsi_status)
3032 {
3033 	int result = 0;
3034 
3035 	switch (scsi_status) {
3036 	case SAM_STAT_CHECK_CONDITION:
3037 		ufshcd_copy_sense_data(lrbp);
3038 	case SAM_STAT_GOOD:
3039 		result |= DID_OK << 16 |
3040 			  COMMAND_COMPLETE << 8 |
3041 			  scsi_status;
3042 		break;
3043 	case SAM_STAT_TASK_SET_FULL:
3044 	case SAM_STAT_BUSY:
3045 	case SAM_STAT_TASK_ABORTED:
3046 		ufshcd_copy_sense_data(lrbp);
3047 		result |= scsi_status;
3048 		break;
3049 	default:
3050 		result |= DID_ERROR << 16;
3051 		break;
3052 	} /* end of switch */
3053 
3054 	return result;
3055 }
3056 
3057 /**
3058  * ufshcd_transfer_rsp_status - Get overall status of the response
3059  * @hba: per adapter instance
3060  * @lrb: pointer to local reference block of completed command
3061  *
3062  * Returns result of the command to notify SCSI midlayer
3063  */
3064 static inline int
ufshcd_transfer_rsp_status(struct ufs_hba * hba,struct ufshcd_lrb * lrbp)3065 ufshcd_transfer_rsp_status(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
3066 {
3067 	int result = 0;
3068 	int scsi_status;
3069 	int ocs;
3070 
3071 	/* overall command status of utrd */
3072 	ocs = ufshcd_get_tr_ocs(lrbp);
3073 
3074 	switch (ocs) {
3075 	case OCS_SUCCESS:
3076 		result = ufshcd_get_req_rsp(lrbp->ucd_rsp_ptr);
3077 
3078 		switch (result) {
3079 		case UPIU_TRANSACTION_RESPONSE:
3080 			/*
3081 			 * get the response UPIU result to extract
3082 			 * the SCSI command status
3083 			 */
3084 			result = ufshcd_get_rsp_upiu_result(lrbp->ucd_rsp_ptr);
3085 
3086 			/*
3087 			 * get the result based on SCSI status response
3088 			 * to notify the SCSI midlayer of the command status
3089 			 */
3090 			scsi_status = result & MASK_SCSI_STATUS;
3091 			result = ufshcd_scsi_cmd_status(lrbp, scsi_status);
3092 
3093 			if (ufshcd_is_exception_event(lrbp->ucd_rsp_ptr))
3094 				schedule_work(&hba->eeh_work);
3095 			break;
3096 		case UPIU_TRANSACTION_REJECT_UPIU:
3097 			/* TODO: handle Reject UPIU Response */
3098 			result = DID_ERROR << 16;
3099 			dev_err(hba->dev,
3100 				"Reject UPIU not fully implemented\n");
3101 			break;
3102 		default:
3103 			result = DID_ERROR << 16;
3104 			dev_err(hba->dev,
3105 				"Unexpected request response code = %x\n",
3106 				result);
3107 			break;
3108 		}
3109 		break;
3110 	case OCS_ABORTED:
3111 		result |= DID_ABORT << 16;
3112 		break;
3113 	case OCS_INVALID_COMMAND_STATUS:
3114 		result |= DID_REQUEUE << 16;
3115 		break;
3116 	case OCS_INVALID_CMD_TABLE_ATTR:
3117 	case OCS_INVALID_PRDT_ATTR:
3118 	case OCS_MISMATCH_DATA_BUF_SIZE:
3119 	case OCS_MISMATCH_RESP_UPIU_SIZE:
3120 	case OCS_PEER_COMM_FAILURE:
3121 	case OCS_FATAL_ERROR:
3122 	default:
3123 		result |= DID_ERROR << 16;
3124 		dev_err(hba->dev,
3125 		"OCS error from controller = %x\n", ocs);
3126 		break;
3127 	} /* end of switch */
3128 
3129 	return result;
3130 }
3131 
3132 /**
3133  * ufshcd_uic_cmd_compl - handle completion of uic command
3134  * @hba: per adapter instance
3135  * @intr_status: interrupt status generated by the controller
3136  */
ufshcd_uic_cmd_compl(struct ufs_hba * hba,u32 intr_status)3137 static void ufshcd_uic_cmd_compl(struct ufs_hba *hba, u32 intr_status)
3138 {
3139 	if ((intr_status & UIC_COMMAND_COMPL) && hba->active_uic_cmd) {
3140 		hba->active_uic_cmd->argument2 |=
3141 			ufshcd_get_uic_cmd_result(hba);
3142 		hba->active_uic_cmd->argument3 =
3143 			ufshcd_get_dme_attr_val(hba);
3144 		complete(&hba->active_uic_cmd->done);
3145 	}
3146 
3147 	if ((intr_status & UFSHCD_UIC_PWR_MASK) && hba->uic_async_done)
3148 		complete(hba->uic_async_done);
3149 }
3150 
3151 /**
3152  * ufshcd_transfer_req_compl - handle SCSI and query command completion
3153  * @hba: per adapter instance
3154  */
ufshcd_transfer_req_compl(struct ufs_hba * hba)3155 static void ufshcd_transfer_req_compl(struct ufs_hba *hba)
3156 {
3157 	struct ufshcd_lrb *lrbp;
3158 	struct scsi_cmnd *cmd;
3159 	unsigned long completed_reqs;
3160 	u32 tr_doorbell;
3161 	int result;
3162 	int index;
3163 
3164 	/* Resetting interrupt aggregation counters first and reading the
3165 	 * DOOR_BELL afterward allows us to handle all the completed requests.
3166 	 * In order to prevent other interrupts starvation the DB is read once
3167 	 * after reset. The down side of this solution is the possibility of
3168 	 * false interrupt if device completes another request after resetting
3169 	 * aggregation and before reading the DB.
3170 	 */
3171 	if (ufshcd_is_intr_aggr_allowed(hba))
3172 		ufshcd_reset_intr_aggr(hba);
3173 
3174 	tr_doorbell = ufshcd_readl(hba, REG_UTP_TRANSFER_REQ_DOOR_BELL);
3175 	completed_reqs = tr_doorbell ^ hba->outstanding_reqs;
3176 
3177 	for_each_set_bit(index, &completed_reqs, hba->nutrs) {
3178 		lrbp = &hba->lrb[index];
3179 		cmd = lrbp->cmd;
3180 		if (cmd) {
3181 			result = ufshcd_transfer_rsp_status(hba, lrbp);
3182 			scsi_dma_unmap(cmd);
3183 			cmd->result = result;
3184 			/* Mark completed command as NULL in LRB */
3185 			lrbp->cmd = NULL;
3186 			clear_bit_unlock(index, &hba->lrb_in_use);
3187 			/* Do not touch lrbp after scsi done */
3188 			cmd->scsi_done(cmd);
3189 			__ufshcd_release(hba);
3190 		} else if (lrbp->command_type == UTP_CMD_TYPE_DEV_MANAGE) {
3191 			if (hba->dev_cmd.complete)
3192 				complete(hba->dev_cmd.complete);
3193 		}
3194 	}
3195 
3196 	/* clear corresponding bits of completed commands */
3197 	hba->outstanding_reqs ^= completed_reqs;
3198 
3199 	ufshcd_clk_scaling_update_busy(hba);
3200 
3201 	/* we might have free'd some tags above */
3202 	wake_up(&hba->dev_cmd.tag_wq);
3203 }
3204 
3205 /**
3206  * ufshcd_disable_ee - disable exception event
3207  * @hba: per-adapter instance
3208  * @mask: exception event to disable
3209  *
3210  * Disables exception event in the device so that the EVENT_ALERT
3211  * bit is not set.
3212  *
3213  * Returns zero on success, non-zero error value on failure.
3214  */
ufshcd_disable_ee(struct ufs_hba * hba,u16 mask)3215 static int ufshcd_disable_ee(struct ufs_hba *hba, u16 mask)
3216 {
3217 	int err = 0;
3218 	u32 val;
3219 
3220 	if (!(hba->ee_ctrl_mask & mask))
3221 		goto out;
3222 
3223 	val = hba->ee_ctrl_mask & ~mask;
3224 	val &= 0xFFFF; /* 2 bytes */
3225 	err = ufshcd_query_attr(hba, UPIU_QUERY_OPCODE_WRITE_ATTR,
3226 			QUERY_ATTR_IDN_EE_CONTROL, 0, 0, &val);
3227 	if (!err)
3228 		hba->ee_ctrl_mask &= ~mask;
3229 out:
3230 	return err;
3231 }
3232 
3233 /**
3234  * ufshcd_enable_ee - enable exception event
3235  * @hba: per-adapter instance
3236  * @mask: exception event to enable
3237  *
3238  * Enable corresponding exception event in the device to allow
3239  * device to alert host in critical scenarios.
3240  *
3241  * Returns zero on success, non-zero error value on failure.
3242  */
ufshcd_enable_ee(struct ufs_hba * hba,u16 mask)3243 static int ufshcd_enable_ee(struct ufs_hba *hba, u16 mask)
3244 {
3245 	int err = 0;
3246 	u32 val;
3247 
3248 	if (hba->ee_ctrl_mask & mask)
3249 		goto out;
3250 
3251 	val = hba->ee_ctrl_mask | mask;
3252 	val &= 0xFFFF; /* 2 bytes */
3253 	err = ufshcd_query_attr(hba, UPIU_QUERY_OPCODE_WRITE_ATTR,
3254 			QUERY_ATTR_IDN_EE_CONTROL, 0, 0, &val);
3255 	if (!err)
3256 		hba->ee_ctrl_mask |= mask;
3257 out:
3258 	return err;
3259 }
3260 
3261 /**
3262  * ufshcd_enable_auto_bkops - Allow device managed BKOPS
3263  * @hba: per-adapter instance
3264  *
3265  * Allow device to manage background operations on its own. Enabling
3266  * this might lead to inconsistent latencies during normal data transfers
3267  * as the device is allowed to manage its own way of handling background
3268  * operations.
3269  *
3270  * Returns zero on success, non-zero on failure.
3271  */
ufshcd_enable_auto_bkops(struct ufs_hba * hba)3272 static int ufshcd_enable_auto_bkops(struct ufs_hba *hba)
3273 {
3274 	int err = 0;
3275 
3276 	if (hba->auto_bkops_enabled)
3277 		goto out;
3278 
3279 	err = ufshcd_query_flag(hba, UPIU_QUERY_OPCODE_SET_FLAG,
3280 			QUERY_FLAG_IDN_BKOPS_EN, NULL);
3281 	if (err) {
3282 		dev_err(hba->dev, "%s: failed to enable bkops %d\n",
3283 				__func__, err);
3284 		goto out;
3285 	}
3286 
3287 	hba->auto_bkops_enabled = true;
3288 
3289 	/* No need of URGENT_BKOPS exception from the device */
3290 	err = ufshcd_disable_ee(hba, MASK_EE_URGENT_BKOPS);
3291 	if (err)
3292 		dev_err(hba->dev, "%s: failed to disable exception event %d\n",
3293 				__func__, err);
3294 out:
3295 	return err;
3296 }
3297 
3298 /**
3299  * ufshcd_disable_auto_bkops - block device in doing background operations
3300  * @hba: per-adapter instance
3301  *
3302  * Disabling background operations improves command response latency but
3303  * has drawback of device moving into critical state where the device is
3304  * not-operable. Make sure to call ufshcd_enable_auto_bkops() whenever the
3305  * host is idle so that BKOPS are managed effectively without any negative
3306  * impacts.
3307  *
3308  * Returns zero on success, non-zero on failure.
3309  */
ufshcd_disable_auto_bkops(struct ufs_hba * hba)3310 static int ufshcd_disable_auto_bkops(struct ufs_hba *hba)
3311 {
3312 	int err = 0;
3313 
3314 	if (!hba->auto_bkops_enabled)
3315 		goto out;
3316 
3317 	/*
3318 	 * If host assisted BKOPs is to be enabled, make sure
3319 	 * urgent bkops exception is allowed.
3320 	 */
3321 	err = ufshcd_enable_ee(hba, MASK_EE_URGENT_BKOPS);
3322 	if (err) {
3323 		dev_err(hba->dev, "%s: failed to enable exception event %d\n",
3324 				__func__, err);
3325 		goto out;
3326 	}
3327 
3328 	err = ufshcd_query_flag(hba, UPIU_QUERY_OPCODE_CLEAR_FLAG,
3329 			QUERY_FLAG_IDN_BKOPS_EN, NULL);
3330 	if (err) {
3331 		dev_err(hba->dev, "%s: failed to disable bkops %d\n",
3332 				__func__, err);
3333 		ufshcd_disable_ee(hba, MASK_EE_URGENT_BKOPS);
3334 		goto out;
3335 	}
3336 
3337 	hba->auto_bkops_enabled = false;
3338 out:
3339 	return err;
3340 }
3341 
3342 /**
3343  * ufshcd_force_reset_auto_bkops - force enable of auto bkops
3344  * @hba: per adapter instance
3345  *
3346  * After a device reset the device may toggle the BKOPS_EN flag
3347  * to default value. The s/w tracking variables should be updated
3348  * as well. Do this by forcing enable of auto bkops.
3349  */
ufshcd_force_reset_auto_bkops(struct ufs_hba * hba)3350 static void  ufshcd_force_reset_auto_bkops(struct ufs_hba *hba)
3351 {
3352 	hba->auto_bkops_enabled = false;
3353 	hba->ee_ctrl_mask |= MASK_EE_URGENT_BKOPS;
3354 	ufshcd_enable_auto_bkops(hba);
3355 }
3356 
ufshcd_get_bkops_status(struct ufs_hba * hba,u32 * status)3357 static inline int ufshcd_get_bkops_status(struct ufs_hba *hba, u32 *status)
3358 {
3359 	return ufshcd_query_attr(hba, UPIU_QUERY_OPCODE_READ_ATTR,
3360 			QUERY_ATTR_IDN_BKOPS_STATUS, 0, 0, status);
3361 }
3362 
3363 /**
3364  * ufshcd_bkops_ctrl - control the auto bkops based on current bkops status
3365  * @hba: per-adapter instance
3366  * @status: bkops_status value
3367  *
3368  * Read the bkops_status from the UFS device and Enable fBackgroundOpsEn
3369  * flag in the device to permit background operations if the device
3370  * bkops_status is greater than or equal to "status" argument passed to
3371  * this function, disable otherwise.
3372  *
3373  * Returns 0 for success, non-zero in case of failure.
3374  *
3375  * NOTE: Caller of this function can check the "hba->auto_bkops_enabled" flag
3376  * to know whether auto bkops is enabled or disabled after this function
3377  * returns control to it.
3378  */
ufshcd_bkops_ctrl(struct ufs_hba * hba,enum bkops_status status)3379 static int ufshcd_bkops_ctrl(struct ufs_hba *hba,
3380 			     enum bkops_status status)
3381 {
3382 	int err;
3383 	u32 curr_status = 0;
3384 
3385 	err = ufshcd_get_bkops_status(hba, &curr_status);
3386 	if (err) {
3387 		dev_err(hba->dev, "%s: failed to get BKOPS status %d\n",
3388 				__func__, err);
3389 		goto out;
3390 	} else if (curr_status > BKOPS_STATUS_MAX) {
3391 		dev_err(hba->dev, "%s: invalid BKOPS status %d\n",
3392 				__func__, curr_status);
3393 		err = -EINVAL;
3394 		goto out;
3395 	}
3396 
3397 	if (curr_status >= status)
3398 		err = ufshcd_enable_auto_bkops(hba);
3399 	else
3400 		err = ufshcd_disable_auto_bkops(hba);
3401 out:
3402 	return err;
3403 }
3404 
3405 /**
3406  * ufshcd_urgent_bkops - handle urgent bkops exception event
3407  * @hba: per-adapter instance
3408  *
3409  * Enable fBackgroundOpsEn flag in the device to permit background
3410  * operations.
3411  *
3412  * If BKOPs is enabled, this function returns 0, 1 if the bkops in not enabled
3413  * and negative error value for any other failure.
3414  */
ufshcd_urgent_bkops(struct ufs_hba * hba)3415 static int ufshcd_urgent_bkops(struct ufs_hba *hba)
3416 {
3417 	return ufshcd_bkops_ctrl(hba, BKOPS_STATUS_PERF_IMPACT);
3418 }
3419 
ufshcd_get_ee_status(struct ufs_hba * hba,u32 * status)3420 static inline int ufshcd_get_ee_status(struct ufs_hba *hba, u32 *status)
3421 {
3422 	return ufshcd_query_attr(hba, UPIU_QUERY_OPCODE_READ_ATTR,
3423 			QUERY_ATTR_IDN_EE_STATUS, 0, 0, status);
3424 }
3425 
3426 /**
3427  * ufshcd_exception_event_handler - handle exceptions raised by device
3428  * @work: pointer to work data
3429  *
3430  * Read bExceptionEventStatus attribute from the device and handle the
3431  * exception event accordingly.
3432  */
ufshcd_exception_event_handler(struct work_struct * work)3433 static void ufshcd_exception_event_handler(struct work_struct *work)
3434 {
3435 	struct ufs_hba *hba;
3436 	int err;
3437 	u32 status = 0;
3438 	hba = container_of(work, struct ufs_hba, eeh_work);
3439 
3440 	pm_runtime_get_sync(hba->dev);
3441 	err = ufshcd_get_ee_status(hba, &status);
3442 	if (err) {
3443 		dev_err(hba->dev, "%s: failed to get exception status %d\n",
3444 				__func__, err);
3445 		goto out;
3446 	}
3447 
3448 	status &= hba->ee_ctrl_mask;
3449 	if (status & MASK_EE_URGENT_BKOPS) {
3450 		err = ufshcd_urgent_bkops(hba);
3451 		if (err < 0)
3452 			dev_err(hba->dev, "%s: failed to handle urgent bkops %d\n",
3453 					__func__, err);
3454 	}
3455 out:
3456 	pm_runtime_put_sync(hba->dev);
3457 	return;
3458 }
3459 
3460 /**
3461  * ufshcd_err_handler - handle UFS errors that require s/w attention
3462  * @work: pointer to work structure
3463  */
ufshcd_err_handler(struct work_struct * work)3464 static void ufshcd_err_handler(struct work_struct *work)
3465 {
3466 	struct ufs_hba *hba;
3467 	unsigned long flags;
3468 	u32 err_xfer = 0;
3469 	u32 err_tm = 0;
3470 	int err = 0;
3471 	int tag;
3472 
3473 	hba = container_of(work, struct ufs_hba, eh_work);
3474 
3475 	pm_runtime_get_sync(hba->dev);
3476 	ufshcd_hold(hba, false);
3477 
3478 	spin_lock_irqsave(hba->host->host_lock, flags);
3479 	if (hba->ufshcd_state == UFSHCD_STATE_RESET) {
3480 		spin_unlock_irqrestore(hba->host->host_lock, flags);
3481 		goto out;
3482 	}
3483 
3484 	hba->ufshcd_state = UFSHCD_STATE_RESET;
3485 	ufshcd_set_eh_in_progress(hba);
3486 
3487 	/* Complete requests that have door-bell cleared by h/w */
3488 	ufshcd_transfer_req_compl(hba);
3489 	ufshcd_tmc_handler(hba);
3490 	spin_unlock_irqrestore(hba->host->host_lock, flags);
3491 
3492 	/* Clear pending transfer requests */
3493 	for_each_set_bit(tag, &hba->outstanding_reqs, hba->nutrs)
3494 		if (ufshcd_clear_cmd(hba, tag))
3495 			err_xfer |= 1 << tag;
3496 
3497 	/* Clear pending task management requests */
3498 	for_each_set_bit(tag, &hba->outstanding_tasks, hba->nutmrs)
3499 		if (ufshcd_clear_tm_cmd(hba, tag))
3500 			err_tm |= 1 << tag;
3501 
3502 	/* Complete the requests that are cleared by s/w */
3503 	spin_lock_irqsave(hba->host->host_lock, flags);
3504 	ufshcd_transfer_req_compl(hba);
3505 	ufshcd_tmc_handler(hba);
3506 	spin_unlock_irqrestore(hba->host->host_lock, flags);
3507 
3508 	/* Fatal errors need reset */
3509 	if (err_xfer || err_tm || (hba->saved_err & INT_FATAL_ERRORS) ||
3510 			((hba->saved_err & UIC_ERROR) &&
3511 			 (hba->saved_uic_err & UFSHCD_UIC_DL_PA_INIT_ERROR))) {
3512 		err = ufshcd_reset_and_restore(hba);
3513 		if (err) {
3514 			dev_err(hba->dev, "%s: reset and restore failed\n",
3515 					__func__);
3516 			hba->ufshcd_state = UFSHCD_STATE_ERROR;
3517 		}
3518 		/*
3519 		 * Inform scsi mid-layer that we did reset and allow to handle
3520 		 * Unit Attention properly.
3521 		 */
3522 		scsi_report_bus_reset(hba->host, 0);
3523 		hba->saved_err = 0;
3524 		hba->saved_uic_err = 0;
3525 	}
3526 	ufshcd_clear_eh_in_progress(hba);
3527 
3528 out:
3529 	scsi_unblock_requests(hba->host);
3530 	ufshcd_release(hba);
3531 	pm_runtime_put_sync(hba->dev);
3532 }
3533 
3534 /**
3535  * ufshcd_update_uic_error - check and set fatal UIC error flags.
3536  * @hba: per-adapter instance
3537  */
ufshcd_update_uic_error(struct ufs_hba * hba)3538 static void ufshcd_update_uic_error(struct ufs_hba *hba)
3539 {
3540 	u32 reg;
3541 
3542 	/* PA_INIT_ERROR is fatal and needs UIC reset */
3543 	reg = ufshcd_readl(hba, REG_UIC_ERROR_CODE_DATA_LINK_LAYER);
3544 	if (reg & UIC_DATA_LINK_LAYER_ERROR_PA_INIT)
3545 		hba->uic_error |= UFSHCD_UIC_DL_PA_INIT_ERROR;
3546 
3547 	/* UIC NL/TL/DME errors needs software retry */
3548 	reg = ufshcd_readl(hba, REG_UIC_ERROR_CODE_NETWORK_LAYER);
3549 	if (reg)
3550 		hba->uic_error |= UFSHCD_UIC_NL_ERROR;
3551 
3552 	reg = ufshcd_readl(hba, REG_UIC_ERROR_CODE_TRANSPORT_LAYER);
3553 	if (reg)
3554 		hba->uic_error |= UFSHCD_UIC_TL_ERROR;
3555 
3556 	reg = ufshcd_readl(hba, REG_UIC_ERROR_CODE_DME);
3557 	if (reg)
3558 		hba->uic_error |= UFSHCD_UIC_DME_ERROR;
3559 
3560 	dev_dbg(hba->dev, "%s: UIC error flags = 0x%08x\n",
3561 			__func__, hba->uic_error);
3562 }
3563 
3564 /**
3565  * ufshcd_check_errors - Check for errors that need s/w attention
3566  * @hba: per-adapter instance
3567  */
ufshcd_check_errors(struct ufs_hba * hba)3568 static void ufshcd_check_errors(struct ufs_hba *hba)
3569 {
3570 	bool queue_eh_work = false;
3571 
3572 	if (hba->errors & INT_FATAL_ERRORS)
3573 		queue_eh_work = true;
3574 
3575 	if (hba->errors & UIC_ERROR) {
3576 		hba->uic_error = 0;
3577 		ufshcd_update_uic_error(hba);
3578 		if (hba->uic_error)
3579 			queue_eh_work = true;
3580 	}
3581 
3582 	if (queue_eh_work) {
3583 		/* handle fatal errors only when link is functional */
3584 		if (hba->ufshcd_state == UFSHCD_STATE_OPERATIONAL) {
3585 			/* block commands from scsi mid-layer */
3586 			scsi_block_requests(hba->host);
3587 
3588 			/* transfer error masks to sticky bits */
3589 			hba->saved_err |= hba->errors;
3590 			hba->saved_uic_err |= hba->uic_error;
3591 
3592 			hba->ufshcd_state = UFSHCD_STATE_ERROR;
3593 			schedule_work(&hba->eh_work);
3594 		}
3595 	}
3596 	/*
3597 	 * if (!queue_eh_work) -
3598 	 * Other errors are either non-fatal where host recovers
3599 	 * itself without s/w intervention or errors that will be
3600 	 * handled by the SCSI core layer.
3601 	 */
3602 }
3603 
3604 /**
3605  * ufshcd_tmc_handler - handle task management function completion
3606  * @hba: per adapter instance
3607  */
ufshcd_tmc_handler(struct ufs_hba * hba)3608 static void ufshcd_tmc_handler(struct ufs_hba *hba)
3609 {
3610 	u32 tm_doorbell;
3611 
3612 	tm_doorbell = ufshcd_readl(hba, REG_UTP_TASK_REQ_DOOR_BELL);
3613 	hba->tm_condition = tm_doorbell ^ hba->outstanding_tasks;
3614 	wake_up(&hba->tm_wq);
3615 }
3616 
3617 /**
3618  * ufshcd_sl_intr - Interrupt service routine
3619  * @hba: per adapter instance
3620  * @intr_status: contains interrupts generated by the controller
3621  */
ufshcd_sl_intr(struct ufs_hba * hba,u32 intr_status)3622 static void ufshcd_sl_intr(struct ufs_hba *hba, u32 intr_status)
3623 {
3624 	hba->errors = UFSHCD_ERROR_MASK & intr_status;
3625 	if (hba->errors)
3626 		ufshcd_check_errors(hba);
3627 
3628 	if (intr_status & UFSHCD_UIC_MASK)
3629 		ufshcd_uic_cmd_compl(hba, intr_status);
3630 
3631 	if (intr_status & UTP_TASK_REQ_COMPL)
3632 		ufshcd_tmc_handler(hba);
3633 
3634 	if (intr_status & UTP_TRANSFER_REQ_COMPL)
3635 		ufshcd_transfer_req_compl(hba);
3636 }
3637 
3638 /**
3639  * ufshcd_intr - Main interrupt service routine
3640  * @irq: irq number
3641  * @__hba: pointer to adapter instance
3642  *
3643  * Returns IRQ_HANDLED - If interrupt is valid
3644  *		IRQ_NONE - If invalid interrupt
3645  */
ufshcd_intr(int irq,void * __hba)3646 static irqreturn_t ufshcd_intr(int irq, void *__hba)
3647 {
3648 	u32 intr_status;
3649 	irqreturn_t retval = IRQ_NONE;
3650 	struct ufs_hba *hba = __hba;
3651 
3652 	spin_lock(hba->host->host_lock);
3653 	intr_status = ufshcd_readl(hba, REG_INTERRUPT_STATUS);
3654 
3655 	if (intr_status) {
3656 		ufshcd_writel(hba, intr_status, REG_INTERRUPT_STATUS);
3657 		ufshcd_sl_intr(hba, intr_status);
3658 		retval = IRQ_HANDLED;
3659 	}
3660 	spin_unlock(hba->host->host_lock);
3661 	return retval;
3662 }
3663 
ufshcd_clear_tm_cmd(struct ufs_hba * hba,int tag)3664 static int ufshcd_clear_tm_cmd(struct ufs_hba *hba, int tag)
3665 {
3666 	int err = 0;
3667 	u32 mask = 1 << tag;
3668 	unsigned long flags;
3669 
3670 	if (!test_bit(tag, &hba->outstanding_tasks))
3671 		goto out;
3672 
3673 	spin_lock_irqsave(hba->host->host_lock, flags);
3674 	ufshcd_writel(hba, ~(1 << tag), REG_UTP_TASK_REQ_LIST_CLEAR);
3675 	spin_unlock_irqrestore(hba->host->host_lock, flags);
3676 
3677 	/* poll for max. 1 sec to clear door bell register by h/w */
3678 	err = ufshcd_wait_for_register(hba,
3679 			REG_UTP_TASK_REQ_DOOR_BELL,
3680 			mask, 0, 1000, 1000);
3681 out:
3682 	return err;
3683 }
3684 
3685 /**
3686  * ufshcd_issue_tm_cmd - issues task management commands to controller
3687  * @hba: per adapter instance
3688  * @lun_id: LUN ID to which TM command is sent
3689  * @task_id: task ID to which the TM command is applicable
3690  * @tm_function: task management function opcode
3691  * @tm_response: task management service response return value
3692  *
3693  * Returns non-zero value on error, zero on success.
3694  */
ufshcd_issue_tm_cmd(struct ufs_hba * hba,int lun_id,int task_id,u8 tm_function,u8 * tm_response)3695 static int ufshcd_issue_tm_cmd(struct ufs_hba *hba, int lun_id, int task_id,
3696 		u8 tm_function, u8 *tm_response)
3697 {
3698 	struct utp_task_req_desc *task_req_descp;
3699 	struct utp_upiu_task_req *task_req_upiup;
3700 	struct Scsi_Host *host;
3701 	unsigned long flags;
3702 	int free_slot;
3703 	int err;
3704 	int task_tag;
3705 
3706 	host = hba->host;
3707 
3708 	/*
3709 	 * Get free slot, sleep if slots are unavailable.
3710 	 * Even though we use wait_event() which sleeps indefinitely,
3711 	 * the maximum wait time is bounded by %TM_CMD_TIMEOUT.
3712 	 */
3713 	wait_event(hba->tm_tag_wq, ufshcd_get_tm_free_slot(hba, &free_slot));
3714 	ufshcd_hold(hba, false);
3715 
3716 	spin_lock_irqsave(host->host_lock, flags);
3717 	task_req_descp = hba->utmrdl_base_addr;
3718 	task_req_descp += free_slot;
3719 
3720 	/* Configure task request descriptor */
3721 	task_req_descp->header.dword_0 = cpu_to_le32(UTP_REQ_DESC_INT_CMD);
3722 	task_req_descp->header.dword_2 =
3723 			cpu_to_le32(OCS_INVALID_COMMAND_STATUS);
3724 
3725 	/* Configure task request UPIU */
3726 	task_req_upiup =
3727 		(struct utp_upiu_task_req *) task_req_descp->task_req_upiu;
3728 	task_tag = hba->nutrs + free_slot;
3729 	task_req_upiup->header.dword_0 =
3730 		UPIU_HEADER_DWORD(UPIU_TRANSACTION_TASK_REQ, 0,
3731 					      lun_id, task_tag);
3732 	task_req_upiup->header.dword_1 =
3733 		UPIU_HEADER_DWORD(0, tm_function, 0, 0);
3734 	/*
3735 	 * The host shall provide the same value for LUN field in the basic
3736 	 * header and for Input Parameter.
3737 	 */
3738 	task_req_upiup->input_param1 = cpu_to_be32(lun_id);
3739 	task_req_upiup->input_param2 = cpu_to_be32(task_id);
3740 
3741 	/* send command to the controller */
3742 	__set_bit(free_slot, &hba->outstanding_tasks);
3743 	ufshcd_writel(hba, 1 << free_slot, REG_UTP_TASK_REQ_DOOR_BELL);
3744 
3745 	spin_unlock_irqrestore(host->host_lock, flags);
3746 
3747 	/* wait until the task management command is completed */
3748 	err = wait_event_timeout(hba->tm_wq,
3749 			test_bit(free_slot, &hba->tm_condition),
3750 			msecs_to_jiffies(TM_CMD_TIMEOUT));
3751 	if (!err) {
3752 		dev_err(hba->dev, "%s: task management cmd 0x%.2x timed-out\n",
3753 				__func__, tm_function);
3754 		if (ufshcd_clear_tm_cmd(hba, free_slot))
3755 			dev_WARN(hba->dev, "%s: unable clear tm cmd (slot %d) after timeout\n",
3756 					__func__, free_slot);
3757 		err = -ETIMEDOUT;
3758 	} else {
3759 		err = ufshcd_task_req_compl(hba, free_slot, tm_response);
3760 	}
3761 
3762 	clear_bit(free_slot, &hba->tm_condition);
3763 	ufshcd_put_tm_slot(hba, free_slot);
3764 	wake_up(&hba->tm_tag_wq);
3765 
3766 	ufshcd_release(hba);
3767 	return err;
3768 }
3769 
3770 /**
3771  * ufshcd_eh_device_reset_handler - device reset handler registered to
3772  *                                    scsi layer.
3773  * @cmd: SCSI command pointer
3774  *
3775  * Returns SUCCESS/FAILED
3776  */
ufshcd_eh_device_reset_handler(struct scsi_cmnd * cmd)3777 static int ufshcd_eh_device_reset_handler(struct scsi_cmnd *cmd)
3778 {
3779 	struct Scsi_Host *host;
3780 	struct ufs_hba *hba;
3781 	unsigned int tag;
3782 	u32 pos;
3783 	int err;
3784 	u8 resp = 0xF;
3785 	struct ufshcd_lrb *lrbp;
3786 	unsigned long flags;
3787 
3788 	host = cmd->device->host;
3789 	hba = shost_priv(host);
3790 	tag = cmd->request->tag;
3791 
3792 	lrbp = &hba->lrb[tag];
3793 	err = ufshcd_issue_tm_cmd(hba, lrbp->lun, 0, UFS_LOGICAL_RESET, &resp);
3794 	if (err || resp != UPIU_TASK_MANAGEMENT_FUNC_COMPL) {
3795 		if (!err)
3796 			err = resp;
3797 		goto out;
3798 	}
3799 
3800 	/* clear the commands that were pending for corresponding LUN */
3801 	for_each_set_bit(pos, &hba->outstanding_reqs, hba->nutrs) {
3802 		if (hba->lrb[pos].lun == lrbp->lun) {
3803 			err = ufshcd_clear_cmd(hba, pos);
3804 			if (err)
3805 				break;
3806 		}
3807 	}
3808 	spin_lock_irqsave(host->host_lock, flags);
3809 	ufshcd_transfer_req_compl(hba);
3810 	spin_unlock_irqrestore(host->host_lock, flags);
3811 out:
3812 	if (!err) {
3813 		err = SUCCESS;
3814 	} else {
3815 		dev_err(hba->dev, "%s: failed with err %d\n", __func__, err);
3816 		err = FAILED;
3817 	}
3818 	return err;
3819 }
3820 
3821 /**
3822  * ufshcd_abort - abort a specific command
3823  * @cmd: SCSI command pointer
3824  *
3825  * Abort the pending command in device by sending UFS_ABORT_TASK task management
3826  * command, and in host controller by clearing the door-bell register. There can
3827  * be race between controller sending the command to the device while abort is
3828  * issued. To avoid that, first issue UFS_QUERY_TASK to check if the command is
3829  * really issued and then try to abort it.
3830  *
3831  * Returns SUCCESS/FAILED
3832  */
ufshcd_abort(struct scsi_cmnd * cmd)3833 static int ufshcd_abort(struct scsi_cmnd *cmd)
3834 {
3835 	struct Scsi_Host *host;
3836 	struct ufs_hba *hba;
3837 	unsigned long flags;
3838 	unsigned int tag;
3839 	int err = 0;
3840 	int poll_cnt;
3841 	u8 resp = 0xF;
3842 	struct ufshcd_lrb *lrbp;
3843 	u32 reg;
3844 
3845 	host = cmd->device->host;
3846 	hba = shost_priv(host);
3847 	tag = cmd->request->tag;
3848 
3849 	ufshcd_hold(hba, false);
3850 	/* If command is already aborted/completed, return SUCCESS */
3851 	if (!(test_bit(tag, &hba->outstanding_reqs)))
3852 		goto out;
3853 
3854 	reg = ufshcd_readl(hba, REG_UTP_TRANSFER_REQ_DOOR_BELL);
3855 	if (!(reg & (1 << tag))) {
3856 		dev_err(hba->dev,
3857 		"%s: cmd was completed, but without a notifying intr, tag = %d",
3858 		__func__, tag);
3859 	}
3860 
3861 	lrbp = &hba->lrb[tag];
3862 	for (poll_cnt = 100; poll_cnt; poll_cnt--) {
3863 		err = ufshcd_issue_tm_cmd(hba, lrbp->lun, lrbp->task_tag,
3864 				UFS_QUERY_TASK, &resp);
3865 		if (!err && resp == UPIU_TASK_MANAGEMENT_FUNC_SUCCEEDED) {
3866 			/* cmd pending in the device */
3867 			break;
3868 		} else if (!err && resp == UPIU_TASK_MANAGEMENT_FUNC_COMPL) {
3869 			/*
3870 			 * cmd not pending in the device, check if it is
3871 			 * in transition.
3872 			 */
3873 			reg = ufshcd_readl(hba, REG_UTP_TRANSFER_REQ_DOOR_BELL);
3874 			if (reg & (1 << tag)) {
3875 				/* sleep for max. 200us to stabilize */
3876 				usleep_range(100, 200);
3877 				continue;
3878 			}
3879 			/* command completed already */
3880 			goto out;
3881 		} else {
3882 			if (!err)
3883 				err = resp; /* service response error */
3884 			goto out;
3885 		}
3886 	}
3887 
3888 	if (!poll_cnt) {
3889 		err = -EBUSY;
3890 		goto out;
3891 	}
3892 
3893 	err = ufshcd_issue_tm_cmd(hba, lrbp->lun, lrbp->task_tag,
3894 			UFS_ABORT_TASK, &resp);
3895 	if (err || resp != UPIU_TASK_MANAGEMENT_FUNC_COMPL) {
3896 		if (!err)
3897 			err = resp; /* service response error */
3898 		goto out;
3899 	}
3900 
3901 	err = ufshcd_clear_cmd(hba, tag);
3902 	if (err)
3903 		goto out;
3904 
3905 	scsi_dma_unmap(cmd);
3906 
3907 	spin_lock_irqsave(host->host_lock, flags);
3908 	__clear_bit(tag, &hba->outstanding_reqs);
3909 	hba->lrb[tag].cmd = NULL;
3910 	spin_unlock_irqrestore(host->host_lock, flags);
3911 
3912 	clear_bit_unlock(tag, &hba->lrb_in_use);
3913 	wake_up(&hba->dev_cmd.tag_wq);
3914 
3915 out:
3916 	if (!err) {
3917 		err = SUCCESS;
3918 	} else {
3919 		dev_err(hba->dev, "%s: failed with err %d\n", __func__, err);
3920 		err = FAILED;
3921 	}
3922 
3923 	/*
3924 	 * This ufshcd_release() corresponds to the original scsi cmd that got
3925 	 * aborted here (as we won't get any IRQ for it).
3926 	 */
3927 	ufshcd_release(hba);
3928 	return err;
3929 }
3930 
3931 /**
3932  * ufshcd_host_reset_and_restore - reset and restore host controller
3933  * @hba: per-adapter instance
3934  *
3935  * Note that host controller reset may issue DME_RESET to
3936  * local and remote (device) Uni-Pro stack and the attributes
3937  * are reset to default state.
3938  *
3939  * Returns zero on success, non-zero on failure
3940  */
ufshcd_host_reset_and_restore(struct ufs_hba * hba)3941 static int ufshcd_host_reset_and_restore(struct ufs_hba *hba)
3942 {
3943 	int err;
3944 	unsigned long flags;
3945 
3946 	/* Reset the host controller */
3947 	spin_lock_irqsave(hba->host->host_lock, flags);
3948 	ufshcd_hba_stop(hba);
3949 	spin_unlock_irqrestore(hba->host->host_lock, flags);
3950 
3951 	err = ufshcd_hba_enable(hba);
3952 	if (err)
3953 		goto out;
3954 
3955 	/* Establish the link again and restore the device */
3956 	err = ufshcd_probe_hba(hba);
3957 
3958 	if (!err && (hba->ufshcd_state != UFSHCD_STATE_OPERATIONAL))
3959 		err = -EIO;
3960 out:
3961 	if (err)
3962 		dev_err(hba->dev, "%s: Host init failed %d\n", __func__, err);
3963 
3964 	return err;
3965 }
3966 
3967 /**
3968  * ufshcd_reset_and_restore - reset and re-initialize host/device
3969  * @hba: per-adapter instance
3970  *
3971  * Reset and recover device, host and re-establish link. This
3972  * is helpful to recover the communication in fatal error conditions.
3973  *
3974  * Returns zero on success, non-zero on failure
3975  */
ufshcd_reset_and_restore(struct ufs_hba * hba)3976 static int ufshcd_reset_and_restore(struct ufs_hba *hba)
3977 {
3978 	int err = 0;
3979 	unsigned long flags;
3980 	int retries = MAX_HOST_RESET_RETRIES;
3981 
3982 	do {
3983 		err = ufshcd_host_reset_and_restore(hba);
3984 	} while (err && --retries);
3985 
3986 	/*
3987 	 * After reset the door-bell might be cleared, complete
3988 	 * outstanding requests in s/w here.
3989 	 */
3990 	spin_lock_irqsave(hba->host->host_lock, flags);
3991 	ufshcd_transfer_req_compl(hba);
3992 	ufshcd_tmc_handler(hba);
3993 	spin_unlock_irqrestore(hba->host->host_lock, flags);
3994 
3995 	return err;
3996 }
3997 
3998 /**
3999  * ufshcd_eh_host_reset_handler - host reset handler registered to scsi layer
4000  * @cmd - SCSI command pointer
4001  *
4002  * Returns SUCCESS/FAILED
4003  */
ufshcd_eh_host_reset_handler(struct scsi_cmnd * cmd)4004 static int ufshcd_eh_host_reset_handler(struct scsi_cmnd *cmd)
4005 {
4006 	int err;
4007 	unsigned long flags;
4008 	struct ufs_hba *hba;
4009 
4010 	hba = shost_priv(cmd->device->host);
4011 
4012 	ufshcd_hold(hba, false);
4013 	/*
4014 	 * Check if there is any race with fatal error handling.
4015 	 * If so, wait for it to complete. Even though fatal error
4016 	 * handling does reset and restore in some cases, don't assume
4017 	 * anything out of it. We are just avoiding race here.
4018 	 */
4019 	do {
4020 		spin_lock_irqsave(hba->host->host_lock, flags);
4021 		if (!(work_pending(&hba->eh_work) ||
4022 				hba->ufshcd_state == UFSHCD_STATE_RESET))
4023 			break;
4024 		spin_unlock_irqrestore(hba->host->host_lock, flags);
4025 		dev_dbg(hba->dev, "%s: reset in progress\n", __func__);
4026 		flush_work(&hba->eh_work);
4027 	} while (1);
4028 
4029 	hba->ufshcd_state = UFSHCD_STATE_RESET;
4030 	ufshcd_set_eh_in_progress(hba);
4031 	spin_unlock_irqrestore(hba->host->host_lock, flags);
4032 
4033 	err = ufshcd_reset_and_restore(hba);
4034 
4035 	spin_lock_irqsave(hba->host->host_lock, flags);
4036 	if (!err) {
4037 		err = SUCCESS;
4038 		hba->ufshcd_state = UFSHCD_STATE_OPERATIONAL;
4039 	} else {
4040 		err = FAILED;
4041 		hba->ufshcd_state = UFSHCD_STATE_ERROR;
4042 	}
4043 	ufshcd_clear_eh_in_progress(hba);
4044 	spin_unlock_irqrestore(hba->host->host_lock, flags);
4045 
4046 	ufshcd_release(hba);
4047 	return err;
4048 }
4049 
4050 /**
4051  * ufshcd_get_max_icc_level - calculate the ICC level
4052  * @sup_curr_uA: max. current supported by the regulator
4053  * @start_scan: row at the desc table to start scan from
4054  * @buff: power descriptor buffer
4055  *
4056  * Returns calculated max ICC level for specific regulator
4057  */
ufshcd_get_max_icc_level(int sup_curr_uA,u32 start_scan,char * buff)4058 static u32 ufshcd_get_max_icc_level(int sup_curr_uA, u32 start_scan, char *buff)
4059 {
4060 	int i;
4061 	int curr_uA;
4062 	u16 data;
4063 	u16 unit;
4064 
4065 	for (i = start_scan; i >= 0; i--) {
4066 		data = be16_to_cpu(*((u16 *)(buff + 2*i)));
4067 		unit = (data & ATTR_ICC_LVL_UNIT_MASK) >>
4068 						ATTR_ICC_LVL_UNIT_OFFSET;
4069 		curr_uA = data & ATTR_ICC_LVL_VALUE_MASK;
4070 		switch (unit) {
4071 		case UFSHCD_NANO_AMP:
4072 			curr_uA = curr_uA / 1000;
4073 			break;
4074 		case UFSHCD_MILI_AMP:
4075 			curr_uA = curr_uA * 1000;
4076 			break;
4077 		case UFSHCD_AMP:
4078 			curr_uA = curr_uA * 1000 * 1000;
4079 			break;
4080 		case UFSHCD_MICRO_AMP:
4081 		default:
4082 			break;
4083 		}
4084 		if (sup_curr_uA >= curr_uA)
4085 			break;
4086 	}
4087 	if (i < 0) {
4088 		i = 0;
4089 		pr_err("%s: Couldn't find valid icc_level = %d", __func__, i);
4090 	}
4091 
4092 	return (u32)i;
4093 }
4094 
4095 /**
4096  * ufshcd_calc_icc_level - calculate the max ICC level
4097  * In case regulators are not initialized we'll return 0
4098  * @hba: per-adapter instance
4099  * @desc_buf: power descriptor buffer to extract ICC levels from.
4100  * @len: length of desc_buff
4101  *
4102  * Returns calculated ICC level
4103  */
ufshcd_find_max_sup_active_icc_level(struct ufs_hba * hba,u8 * desc_buf,int len)4104 static u32 ufshcd_find_max_sup_active_icc_level(struct ufs_hba *hba,
4105 							u8 *desc_buf, int len)
4106 {
4107 	u32 icc_level = 0;
4108 
4109 	if (!hba->vreg_info.vcc || !hba->vreg_info.vccq ||
4110 						!hba->vreg_info.vccq2) {
4111 		dev_err(hba->dev,
4112 			"%s: Regulator capability was not set, actvIccLevel=%d",
4113 							__func__, icc_level);
4114 		goto out;
4115 	}
4116 
4117 	if (hba->vreg_info.vcc)
4118 		icc_level = ufshcd_get_max_icc_level(
4119 				hba->vreg_info.vcc->max_uA,
4120 				POWER_DESC_MAX_ACTV_ICC_LVLS - 1,
4121 				&desc_buf[PWR_DESC_ACTIVE_LVLS_VCC_0]);
4122 
4123 	if (hba->vreg_info.vccq)
4124 		icc_level = ufshcd_get_max_icc_level(
4125 				hba->vreg_info.vccq->max_uA,
4126 				icc_level,
4127 				&desc_buf[PWR_DESC_ACTIVE_LVLS_VCCQ_0]);
4128 
4129 	if (hba->vreg_info.vccq2)
4130 		icc_level = ufshcd_get_max_icc_level(
4131 				hba->vreg_info.vccq2->max_uA,
4132 				icc_level,
4133 				&desc_buf[PWR_DESC_ACTIVE_LVLS_VCCQ2_0]);
4134 out:
4135 	return icc_level;
4136 }
4137 
ufshcd_init_icc_levels(struct ufs_hba * hba)4138 static void ufshcd_init_icc_levels(struct ufs_hba *hba)
4139 {
4140 	int ret;
4141 	int buff_len = QUERY_DESC_POWER_MAX_SIZE;
4142 	u8 desc_buf[QUERY_DESC_POWER_MAX_SIZE];
4143 
4144 	ret = ufshcd_read_power_desc(hba, desc_buf, buff_len);
4145 	if (ret) {
4146 		dev_err(hba->dev,
4147 			"%s: Failed reading power descriptor.len = %d ret = %d",
4148 			__func__, buff_len, ret);
4149 		return;
4150 	}
4151 
4152 	hba->init_prefetch_data.icc_level =
4153 			ufshcd_find_max_sup_active_icc_level(hba,
4154 			desc_buf, buff_len);
4155 	dev_dbg(hba->dev, "%s: setting icc_level 0x%x",
4156 			__func__, hba->init_prefetch_data.icc_level);
4157 
4158 	ret = ufshcd_query_attr(hba, UPIU_QUERY_OPCODE_WRITE_ATTR,
4159 			QUERY_ATTR_IDN_ACTIVE_ICC_LVL, 0, 0,
4160 			&hba->init_prefetch_data.icc_level);
4161 
4162 	if (ret)
4163 		dev_err(hba->dev,
4164 			"%s: Failed configuring bActiveICCLevel = %d ret = %d",
4165 			__func__, hba->init_prefetch_data.icc_level , ret);
4166 
4167 }
4168 
4169 /**
4170  * ufshcd_scsi_add_wlus - Adds required W-LUs
4171  * @hba: per-adapter instance
4172  *
4173  * UFS device specification requires the UFS devices to support 4 well known
4174  * logical units:
4175  *	"REPORT_LUNS" (address: 01h)
4176  *	"UFS Device" (address: 50h)
4177  *	"RPMB" (address: 44h)
4178  *	"BOOT" (address: 30h)
4179  * UFS device's power management needs to be controlled by "POWER CONDITION"
4180  * field of SSU (START STOP UNIT) command. But this "power condition" field
4181  * will take effect only when its sent to "UFS device" well known logical unit
4182  * hence we require the scsi_device instance to represent this logical unit in
4183  * order for the UFS host driver to send the SSU command for power management.
4184 
4185  * We also require the scsi_device instance for "RPMB" (Replay Protected Memory
4186  * Block) LU so user space process can control this LU. User space may also
4187  * want to have access to BOOT LU.
4188 
4189  * This function adds scsi device instances for each of all well known LUs
4190  * (except "REPORT LUNS" LU).
4191  *
4192  * Returns zero on success (all required W-LUs are added successfully),
4193  * non-zero error value on failure (if failed to add any of the required W-LU).
4194  */
ufshcd_scsi_add_wlus(struct ufs_hba * hba)4195 static int ufshcd_scsi_add_wlus(struct ufs_hba *hba)
4196 {
4197 	int ret = 0;
4198 	struct scsi_device *sdev_rpmb;
4199 	struct scsi_device *sdev_boot;
4200 
4201 	hba->sdev_ufs_device = __scsi_add_device(hba->host, 0, 0,
4202 		ufshcd_upiu_wlun_to_scsi_wlun(UFS_UPIU_UFS_DEVICE_WLUN), NULL);
4203 	if (IS_ERR(hba->sdev_ufs_device)) {
4204 		ret = PTR_ERR(hba->sdev_ufs_device);
4205 		hba->sdev_ufs_device = NULL;
4206 		goto out;
4207 	}
4208 	scsi_device_put(hba->sdev_ufs_device);
4209 
4210 	sdev_boot = __scsi_add_device(hba->host, 0, 0,
4211 		ufshcd_upiu_wlun_to_scsi_wlun(UFS_UPIU_BOOT_WLUN), NULL);
4212 	if (IS_ERR(sdev_boot)) {
4213 		ret = PTR_ERR(sdev_boot);
4214 		goto remove_sdev_ufs_device;
4215 	}
4216 	scsi_device_put(sdev_boot);
4217 
4218 	sdev_rpmb = __scsi_add_device(hba->host, 0, 0,
4219 		ufshcd_upiu_wlun_to_scsi_wlun(UFS_UPIU_RPMB_WLUN), NULL);
4220 	if (IS_ERR(sdev_rpmb)) {
4221 		ret = PTR_ERR(sdev_rpmb);
4222 		goto remove_sdev_boot;
4223 	}
4224 	scsi_device_put(sdev_rpmb);
4225 	goto out;
4226 
4227 remove_sdev_boot:
4228 	scsi_remove_device(sdev_boot);
4229 remove_sdev_ufs_device:
4230 	scsi_remove_device(hba->sdev_ufs_device);
4231 out:
4232 	return ret;
4233 }
4234 
4235 /**
4236  * ufshcd_probe_hba - probe hba to detect device and initialize
4237  * @hba: per-adapter instance
4238  *
4239  * Execute link-startup and verify device initialization
4240  */
ufshcd_probe_hba(struct ufs_hba * hba)4241 static int ufshcd_probe_hba(struct ufs_hba *hba)
4242 {
4243 	int ret;
4244 
4245 	ret = ufshcd_link_startup(hba);
4246 	if (ret)
4247 		goto out;
4248 
4249 	ufshcd_init_pwr_info(hba);
4250 
4251 	/* UniPro link is active now */
4252 	ufshcd_set_link_active(hba);
4253 
4254 	ret = ufshcd_verify_dev_init(hba);
4255 	if (ret)
4256 		goto out;
4257 
4258 	ret = ufshcd_complete_dev_init(hba);
4259 	if (ret)
4260 		goto out;
4261 
4262 	/* UFS device is also active now */
4263 	ufshcd_set_ufs_dev_active(hba);
4264 	ufshcd_force_reset_auto_bkops(hba);
4265 	hba->ufshcd_state = UFSHCD_STATE_OPERATIONAL;
4266 	hba->wlun_dev_clr_ua = true;
4267 
4268 	if (ufshcd_get_max_pwr_mode(hba)) {
4269 		dev_err(hba->dev,
4270 			"%s: Failed getting max supported power mode\n",
4271 			__func__);
4272 	} else {
4273 		ret = ufshcd_config_pwr_mode(hba, &hba->max_pwr_info.info);
4274 		if (ret)
4275 			dev_err(hba->dev, "%s: Failed setting power mode, err = %d\n",
4276 					__func__, ret);
4277 	}
4278 
4279 	/*
4280 	 * If we are in error handling context or in power management callbacks
4281 	 * context, no need to scan the host
4282 	 */
4283 	if (!ufshcd_eh_in_progress(hba) && !hba->pm_op_in_progress) {
4284 		bool flag;
4285 
4286 		/* clear any previous UFS device information */
4287 		memset(&hba->dev_info, 0, sizeof(hba->dev_info));
4288 		if (!ufshcd_query_flag(hba, UPIU_QUERY_OPCODE_READ_FLAG,
4289 				       QUERY_FLAG_IDN_PWR_ON_WPE, &flag))
4290 			hba->dev_info.f_power_on_wp_en = flag;
4291 
4292 		if (!hba->is_init_prefetch)
4293 			ufshcd_init_icc_levels(hba);
4294 
4295 		/* Add required well known logical units to scsi mid layer */
4296 		if (ufshcd_scsi_add_wlus(hba))
4297 			goto out;
4298 
4299 		scsi_scan_host(hba->host);
4300 		pm_runtime_put_sync(hba->dev);
4301 	}
4302 
4303 	if (!hba->is_init_prefetch)
4304 		hba->is_init_prefetch = true;
4305 
4306 	/* Resume devfreq after UFS device is detected */
4307 	if (ufshcd_is_clkscaling_enabled(hba))
4308 		devfreq_resume_device(hba->devfreq);
4309 
4310 out:
4311 	/*
4312 	 * If we failed to initialize the device or the device is not
4313 	 * present, turn off the power/clocks etc.
4314 	 */
4315 	if (ret && !ufshcd_eh_in_progress(hba) && !hba->pm_op_in_progress) {
4316 		pm_runtime_put_sync(hba->dev);
4317 		ufshcd_hba_exit(hba);
4318 	}
4319 
4320 	return ret;
4321 }
4322 
4323 /**
4324  * ufshcd_async_scan - asynchronous execution for probing hba
4325  * @data: data pointer to pass to this function
4326  * @cookie: cookie data
4327  */
ufshcd_async_scan(void * data,async_cookie_t cookie)4328 static void ufshcd_async_scan(void *data, async_cookie_t cookie)
4329 {
4330 	struct ufs_hba *hba = (struct ufs_hba *)data;
4331 
4332 	ufshcd_probe_hba(hba);
4333 }
4334 
4335 static struct scsi_host_template ufshcd_driver_template = {
4336 	.module			= THIS_MODULE,
4337 	.name			= UFSHCD,
4338 	.proc_name		= UFSHCD,
4339 	.queuecommand		= ufshcd_queuecommand,
4340 	.slave_alloc		= ufshcd_slave_alloc,
4341 	.slave_configure	= ufshcd_slave_configure,
4342 	.slave_destroy		= ufshcd_slave_destroy,
4343 	.change_queue_depth	= ufshcd_change_queue_depth,
4344 	.eh_abort_handler	= ufshcd_abort,
4345 	.eh_device_reset_handler = ufshcd_eh_device_reset_handler,
4346 	.eh_host_reset_handler   = ufshcd_eh_host_reset_handler,
4347 	.this_id		= -1,
4348 	.sg_tablesize		= SG_ALL,
4349 	.cmd_per_lun		= UFSHCD_CMD_PER_LUN,
4350 	.can_queue		= UFSHCD_CAN_QUEUE,
4351 	.max_host_blocked	= 1,
4352 	.track_queue_depth	= 1,
4353 };
4354 
ufshcd_config_vreg_load(struct device * dev,struct ufs_vreg * vreg,int ua)4355 static int ufshcd_config_vreg_load(struct device *dev, struct ufs_vreg *vreg,
4356 				   int ua)
4357 {
4358 	int ret;
4359 
4360 	if (!vreg)
4361 		return 0;
4362 
4363 	ret = regulator_set_load(vreg->reg, ua);
4364 	if (ret < 0) {
4365 		dev_err(dev, "%s: %s set load (ua=%d) failed, err=%d\n",
4366 				__func__, vreg->name, ua, ret);
4367 	}
4368 
4369 	return ret;
4370 }
4371 
ufshcd_config_vreg_lpm(struct ufs_hba * hba,struct ufs_vreg * vreg)4372 static inline int ufshcd_config_vreg_lpm(struct ufs_hba *hba,
4373 					 struct ufs_vreg *vreg)
4374 {
4375 	return ufshcd_config_vreg_load(hba->dev, vreg, UFS_VREG_LPM_LOAD_UA);
4376 }
4377 
ufshcd_config_vreg_hpm(struct ufs_hba * hba,struct ufs_vreg * vreg)4378 static inline int ufshcd_config_vreg_hpm(struct ufs_hba *hba,
4379 					 struct ufs_vreg *vreg)
4380 {
4381 	return ufshcd_config_vreg_load(hba->dev, vreg, vreg->max_uA);
4382 }
4383 
ufshcd_config_vreg(struct device * dev,struct ufs_vreg * vreg,bool on)4384 static int ufshcd_config_vreg(struct device *dev,
4385 		struct ufs_vreg *vreg, bool on)
4386 {
4387 	int ret = 0;
4388 	struct regulator *reg = vreg->reg;
4389 	const char *name = vreg->name;
4390 	int min_uV, uA_load;
4391 
4392 	BUG_ON(!vreg);
4393 
4394 	if (regulator_count_voltages(reg) > 0) {
4395 		min_uV = on ? vreg->min_uV : 0;
4396 		ret = regulator_set_voltage(reg, min_uV, vreg->max_uV);
4397 		if (ret) {
4398 			dev_err(dev, "%s: %s set voltage failed, err=%d\n",
4399 					__func__, name, ret);
4400 			goto out;
4401 		}
4402 
4403 		uA_load = on ? vreg->max_uA : 0;
4404 		ret = ufshcd_config_vreg_load(dev, vreg, uA_load);
4405 		if (ret)
4406 			goto out;
4407 	}
4408 out:
4409 	return ret;
4410 }
4411 
ufshcd_enable_vreg(struct device * dev,struct ufs_vreg * vreg)4412 static int ufshcd_enable_vreg(struct device *dev, struct ufs_vreg *vreg)
4413 {
4414 	int ret = 0;
4415 
4416 	if (!vreg || vreg->enabled)
4417 		goto out;
4418 
4419 	ret = ufshcd_config_vreg(dev, vreg, true);
4420 	if (!ret)
4421 		ret = regulator_enable(vreg->reg);
4422 
4423 	if (!ret)
4424 		vreg->enabled = true;
4425 	else
4426 		dev_err(dev, "%s: %s enable failed, err=%d\n",
4427 				__func__, vreg->name, ret);
4428 out:
4429 	return ret;
4430 }
4431 
ufshcd_disable_vreg(struct device * dev,struct ufs_vreg * vreg)4432 static int ufshcd_disable_vreg(struct device *dev, struct ufs_vreg *vreg)
4433 {
4434 	int ret = 0;
4435 
4436 	if (!vreg || !vreg->enabled)
4437 		goto out;
4438 
4439 	ret = regulator_disable(vreg->reg);
4440 
4441 	if (!ret) {
4442 		/* ignore errors on applying disable config */
4443 		ufshcd_config_vreg(dev, vreg, false);
4444 		vreg->enabled = false;
4445 	} else {
4446 		dev_err(dev, "%s: %s disable failed, err=%d\n",
4447 				__func__, vreg->name, ret);
4448 	}
4449 out:
4450 	return ret;
4451 }
4452 
ufshcd_setup_vreg(struct ufs_hba * hba,bool on)4453 static int ufshcd_setup_vreg(struct ufs_hba *hba, bool on)
4454 {
4455 	int ret = 0;
4456 	struct device *dev = hba->dev;
4457 	struct ufs_vreg_info *info = &hba->vreg_info;
4458 
4459 	if (!info)
4460 		goto out;
4461 
4462 	ret = ufshcd_toggle_vreg(dev, info->vcc, on);
4463 	if (ret)
4464 		goto out;
4465 
4466 	ret = ufshcd_toggle_vreg(dev, info->vccq, on);
4467 	if (ret)
4468 		goto out;
4469 
4470 	ret = ufshcd_toggle_vreg(dev, info->vccq2, on);
4471 	if (ret)
4472 		goto out;
4473 
4474 out:
4475 	if (ret) {
4476 		ufshcd_toggle_vreg(dev, info->vccq2, false);
4477 		ufshcd_toggle_vreg(dev, info->vccq, false);
4478 		ufshcd_toggle_vreg(dev, info->vcc, false);
4479 	}
4480 	return ret;
4481 }
4482 
ufshcd_setup_hba_vreg(struct ufs_hba * hba,bool on)4483 static int ufshcd_setup_hba_vreg(struct ufs_hba *hba, bool on)
4484 {
4485 	struct ufs_vreg_info *info = &hba->vreg_info;
4486 
4487 	if (info)
4488 		return ufshcd_toggle_vreg(hba->dev, info->vdd_hba, on);
4489 
4490 	return 0;
4491 }
4492 
ufshcd_get_vreg(struct device * dev,struct ufs_vreg * vreg)4493 static int ufshcd_get_vreg(struct device *dev, struct ufs_vreg *vreg)
4494 {
4495 	int ret = 0;
4496 
4497 	if (!vreg)
4498 		goto out;
4499 
4500 	vreg->reg = devm_regulator_get(dev, vreg->name);
4501 	if (IS_ERR(vreg->reg)) {
4502 		ret = PTR_ERR(vreg->reg);
4503 		dev_err(dev, "%s: %s get failed, err=%d\n",
4504 				__func__, vreg->name, ret);
4505 	}
4506 out:
4507 	return ret;
4508 }
4509 
ufshcd_init_vreg(struct ufs_hba * hba)4510 static int ufshcd_init_vreg(struct ufs_hba *hba)
4511 {
4512 	int ret = 0;
4513 	struct device *dev = hba->dev;
4514 	struct ufs_vreg_info *info = &hba->vreg_info;
4515 
4516 	if (!info)
4517 		goto out;
4518 
4519 	ret = ufshcd_get_vreg(dev, info->vcc);
4520 	if (ret)
4521 		goto out;
4522 
4523 	ret = ufshcd_get_vreg(dev, info->vccq);
4524 	if (ret)
4525 		goto out;
4526 
4527 	ret = ufshcd_get_vreg(dev, info->vccq2);
4528 out:
4529 	return ret;
4530 }
4531 
ufshcd_init_hba_vreg(struct ufs_hba * hba)4532 static int ufshcd_init_hba_vreg(struct ufs_hba *hba)
4533 {
4534 	struct ufs_vreg_info *info = &hba->vreg_info;
4535 
4536 	if (info)
4537 		return ufshcd_get_vreg(hba->dev, info->vdd_hba);
4538 
4539 	return 0;
4540 }
4541 
__ufshcd_setup_clocks(struct ufs_hba * hba,bool on,bool skip_ref_clk)4542 static int __ufshcd_setup_clocks(struct ufs_hba *hba, bool on,
4543 					bool skip_ref_clk)
4544 {
4545 	int ret = 0;
4546 	struct ufs_clk_info *clki;
4547 	struct list_head *head = &hba->clk_list_head;
4548 	unsigned long flags;
4549 
4550 	if (!head || list_empty(head))
4551 		goto out;
4552 
4553 	list_for_each_entry(clki, head, list) {
4554 		if (!IS_ERR_OR_NULL(clki->clk)) {
4555 			if (skip_ref_clk && !strcmp(clki->name, "ref_clk"))
4556 				continue;
4557 
4558 			if (on && !clki->enabled) {
4559 				ret = clk_prepare_enable(clki->clk);
4560 				if (ret) {
4561 					dev_err(hba->dev, "%s: %s prepare enable failed, %d\n",
4562 						__func__, clki->name, ret);
4563 					goto out;
4564 				}
4565 			} else if (!on && clki->enabled) {
4566 				clk_disable_unprepare(clki->clk);
4567 			}
4568 			clki->enabled = on;
4569 			dev_dbg(hba->dev, "%s: clk: %s %sabled\n", __func__,
4570 					clki->name, on ? "en" : "dis");
4571 		}
4572 	}
4573 
4574 	ret = ufshcd_vops_setup_clocks(hba, on);
4575 out:
4576 	if (ret) {
4577 		list_for_each_entry(clki, head, list) {
4578 			if (!IS_ERR_OR_NULL(clki->clk) && clki->enabled)
4579 				clk_disable_unprepare(clki->clk);
4580 		}
4581 	} else if (on) {
4582 		spin_lock_irqsave(hba->host->host_lock, flags);
4583 		hba->clk_gating.state = CLKS_ON;
4584 		spin_unlock_irqrestore(hba->host->host_lock, flags);
4585 	}
4586 	return ret;
4587 }
4588 
ufshcd_setup_clocks(struct ufs_hba * hba,bool on)4589 static int ufshcd_setup_clocks(struct ufs_hba *hba, bool on)
4590 {
4591 	return  __ufshcd_setup_clocks(hba, on, false);
4592 }
4593 
ufshcd_init_clocks(struct ufs_hba * hba)4594 static int ufshcd_init_clocks(struct ufs_hba *hba)
4595 {
4596 	int ret = 0;
4597 	struct ufs_clk_info *clki;
4598 	struct device *dev = hba->dev;
4599 	struct list_head *head = &hba->clk_list_head;
4600 
4601 	if (!head || list_empty(head))
4602 		goto out;
4603 
4604 	list_for_each_entry(clki, head, list) {
4605 		if (!clki->name)
4606 			continue;
4607 
4608 		clki->clk = devm_clk_get(dev, clki->name);
4609 		if (IS_ERR(clki->clk)) {
4610 			ret = PTR_ERR(clki->clk);
4611 			dev_err(dev, "%s: %s clk get failed, %d\n",
4612 					__func__, clki->name, ret);
4613 			goto out;
4614 		}
4615 
4616 		if (clki->max_freq) {
4617 			ret = clk_set_rate(clki->clk, clki->max_freq);
4618 			if (ret) {
4619 				dev_err(hba->dev, "%s: %s clk set rate(%dHz) failed, %d\n",
4620 					__func__, clki->name,
4621 					clki->max_freq, ret);
4622 				goto out;
4623 			}
4624 			clki->curr_freq = clki->max_freq;
4625 		}
4626 		dev_dbg(dev, "%s: clk: %s, rate: %lu\n", __func__,
4627 				clki->name, clk_get_rate(clki->clk));
4628 	}
4629 out:
4630 	return ret;
4631 }
4632 
ufshcd_variant_hba_init(struct ufs_hba * hba)4633 static int ufshcd_variant_hba_init(struct ufs_hba *hba)
4634 {
4635 	int err = 0;
4636 
4637 	if (!hba->vops)
4638 		goto out;
4639 
4640 	err = ufshcd_vops_init(hba);
4641 	if (err)
4642 		goto out;
4643 
4644 	err = ufshcd_vops_setup_regulators(hba, true);
4645 	if (err)
4646 		goto out_exit;
4647 
4648 	goto out;
4649 
4650 out_exit:
4651 	ufshcd_vops_exit(hba);
4652 out:
4653 	if (err)
4654 		dev_err(hba->dev, "%s: variant %s init failed err %d\n",
4655 			__func__, ufshcd_get_var_name(hba), err);
4656 	return err;
4657 }
4658 
ufshcd_variant_hba_exit(struct ufs_hba * hba)4659 static void ufshcd_variant_hba_exit(struct ufs_hba *hba)
4660 {
4661 	if (!hba->vops)
4662 		return;
4663 
4664 	ufshcd_vops_setup_clocks(hba, false);
4665 
4666 	ufshcd_vops_setup_regulators(hba, false);
4667 
4668 	ufshcd_vops_exit(hba);
4669 }
4670 
ufshcd_hba_init(struct ufs_hba * hba)4671 static int ufshcd_hba_init(struct ufs_hba *hba)
4672 {
4673 	int err;
4674 
4675 	/*
4676 	 * Handle host controller power separately from the UFS device power
4677 	 * rails as it will help controlling the UFS host controller power
4678 	 * collapse easily which is different than UFS device power collapse.
4679 	 * Also, enable the host controller power before we go ahead with rest
4680 	 * of the initialization here.
4681 	 */
4682 	err = ufshcd_init_hba_vreg(hba);
4683 	if (err)
4684 		goto out;
4685 
4686 	err = ufshcd_setup_hba_vreg(hba, true);
4687 	if (err)
4688 		goto out;
4689 
4690 	err = ufshcd_init_clocks(hba);
4691 	if (err)
4692 		goto out_disable_hba_vreg;
4693 
4694 	err = ufshcd_setup_clocks(hba, true);
4695 	if (err)
4696 		goto out_disable_hba_vreg;
4697 
4698 	err = ufshcd_init_vreg(hba);
4699 	if (err)
4700 		goto out_disable_clks;
4701 
4702 	err = ufshcd_setup_vreg(hba, true);
4703 	if (err)
4704 		goto out_disable_clks;
4705 
4706 	err = ufshcd_variant_hba_init(hba);
4707 	if (err)
4708 		goto out_disable_vreg;
4709 
4710 	hba->is_powered = true;
4711 	goto out;
4712 
4713 out_disable_vreg:
4714 	ufshcd_setup_vreg(hba, false);
4715 out_disable_clks:
4716 	ufshcd_setup_clocks(hba, false);
4717 out_disable_hba_vreg:
4718 	ufshcd_setup_hba_vreg(hba, false);
4719 out:
4720 	return err;
4721 }
4722 
ufshcd_hba_exit(struct ufs_hba * hba)4723 static void ufshcd_hba_exit(struct ufs_hba *hba)
4724 {
4725 	if (hba->is_powered) {
4726 		ufshcd_variant_hba_exit(hba);
4727 		ufshcd_setup_vreg(hba, false);
4728 		ufshcd_setup_clocks(hba, false);
4729 		ufshcd_setup_hba_vreg(hba, false);
4730 		hba->is_powered = false;
4731 	}
4732 }
4733 
4734 static int
ufshcd_send_request_sense(struct ufs_hba * hba,struct scsi_device * sdp)4735 ufshcd_send_request_sense(struct ufs_hba *hba, struct scsi_device *sdp)
4736 {
4737 	unsigned char cmd[6] = {REQUEST_SENSE,
4738 				0,
4739 				0,
4740 				0,
4741 				SCSI_SENSE_BUFFERSIZE,
4742 				0};
4743 	char *buffer;
4744 	int ret;
4745 
4746 	buffer = kzalloc(SCSI_SENSE_BUFFERSIZE, GFP_KERNEL);
4747 	if (!buffer) {
4748 		ret = -ENOMEM;
4749 		goto out;
4750 	}
4751 
4752 	ret = scsi_execute_req_flags(sdp, cmd, DMA_FROM_DEVICE, buffer,
4753 				SCSI_SENSE_BUFFERSIZE, NULL,
4754 				msecs_to_jiffies(1000), 3, NULL, REQ_PM);
4755 	if (ret)
4756 		pr_err("%s: failed with err %d\n", __func__, ret);
4757 
4758 	kfree(buffer);
4759 out:
4760 	return ret;
4761 }
4762 
4763 /**
4764  * ufshcd_set_dev_pwr_mode - sends START STOP UNIT command to set device
4765  *			     power mode
4766  * @hba: per adapter instance
4767  * @pwr_mode: device power mode to set
4768  *
4769  * Returns 0 if requested power mode is set successfully
4770  * Returns non-zero if failed to set the requested power mode
4771  */
ufshcd_set_dev_pwr_mode(struct ufs_hba * hba,enum ufs_dev_pwr_mode pwr_mode)4772 static int ufshcd_set_dev_pwr_mode(struct ufs_hba *hba,
4773 				     enum ufs_dev_pwr_mode pwr_mode)
4774 {
4775 	unsigned char cmd[6] = { START_STOP };
4776 	struct scsi_sense_hdr sshdr;
4777 	struct scsi_device *sdp;
4778 	unsigned long flags;
4779 	int ret;
4780 
4781 	spin_lock_irqsave(hba->host->host_lock, flags);
4782 	sdp = hba->sdev_ufs_device;
4783 	if (sdp) {
4784 		ret = scsi_device_get(sdp);
4785 		if (!ret && !scsi_device_online(sdp)) {
4786 			ret = -ENODEV;
4787 			scsi_device_put(sdp);
4788 		}
4789 	} else {
4790 		ret = -ENODEV;
4791 	}
4792 	spin_unlock_irqrestore(hba->host->host_lock, flags);
4793 
4794 	if (ret)
4795 		return ret;
4796 
4797 	/*
4798 	 * If scsi commands fail, the scsi mid-layer schedules scsi error-
4799 	 * handling, which would wait for host to be resumed. Since we know
4800 	 * we are functional while we are here, skip host resume in error
4801 	 * handling context.
4802 	 */
4803 	hba->host->eh_noresume = 1;
4804 	if (hba->wlun_dev_clr_ua) {
4805 		ret = ufshcd_send_request_sense(hba, sdp);
4806 		if (ret)
4807 			goto out;
4808 		/* Unit attention condition is cleared now */
4809 		hba->wlun_dev_clr_ua = false;
4810 	}
4811 
4812 	cmd[4] = pwr_mode << 4;
4813 
4814 	/*
4815 	 * Current function would be generally called from the power management
4816 	 * callbacks hence set the REQ_PM flag so that it doesn't resume the
4817 	 * already suspended childs.
4818 	 */
4819 	ret = scsi_execute_req_flags(sdp, cmd, DMA_NONE, NULL, 0, &sshdr,
4820 				     START_STOP_TIMEOUT, 0, NULL, REQ_PM);
4821 	if (ret) {
4822 		sdev_printk(KERN_WARNING, sdp,
4823 			    "START_STOP failed for power mode: %d, result %x\n",
4824 			    pwr_mode, ret);
4825 		if (driver_byte(ret) & DRIVER_SENSE)
4826 			scsi_print_sense_hdr(sdp, NULL, &sshdr);
4827 	}
4828 
4829 	if (!ret)
4830 		hba->curr_dev_pwr_mode = pwr_mode;
4831 out:
4832 	scsi_device_put(sdp);
4833 	hba->host->eh_noresume = 0;
4834 	return ret;
4835 }
4836 
ufshcd_link_state_transition(struct ufs_hba * hba,enum uic_link_state req_link_state,int check_for_bkops)4837 static int ufshcd_link_state_transition(struct ufs_hba *hba,
4838 					enum uic_link_state req_link_state,
4839 					int check_for_bkops)
4840 {
4841 	int ret = 0;
4842 
4843 	if (req_link_state == hba->uic_link_state)
4844 		return 0;
4845 
4846 	if (req_link_state == UIC_LINK_HIBERN8_STATE) {
4847 		ret = ufshcd_uic_hibern8_enter(hba);
4848 		if (!ret)
4849 			ufshcd_set_link_hibern8(hba);
4850 		else
4851 			goto out;
4852 	}
4853 	/*
4854 	 * If autobkops is enabled, link can't be turned off because
4855 	 * turning off the link would also turn off the device.
4856 	 */
4857 	else if ((req_link_state == UIC_LINK_OFF_STATE) &&
4858 		   (!check_for_bkops || (check_for_bkops &&
4859 		    !hba->auto_bkops_enabled))) {
4860 		/*
4861 		 * Change controller state to "reset state" which
4862 		 * should also put the link in off/reset state
4863 		 */
4864 		ufshcd_hba_stop(hba);
4865 		/*
4866 		 * TODO: Check if we need any delay to make sure that
4867 		 * controller is reset
4868 		 */
4869 		ufshcd_set_link_off(hba);
4870 	}
4871 
4872 out:
4873 	return ret;
4874 }
4875 
ufshcd_vreg_set_lpm(struct ufs_hba * hba)4876 static void ufshcd_vreg_set_lpm(struct ufs_hba *hba)
4877 {
4878 	/*
4879 	 * If UFS device is either in UFS_Sleep turn off VCC rail to save some
4880 	 * power.
4881 	 *
4882 	 * If UFS device and link is in OFF state, all power supplies (VCC,
4883 	 * VCCQ, VCCQ2) can be turned off if power on write protect is not
4884 	 * required. If UFS link is inactive (Hibern8 or OFF state) and device
4885 	 * is in sleep state, put VCCQ & VCCQ2 rails in LPM mode.
4886 	 *
4887 	 * Ignore the error returned by ufshcd_toggle_vreg() as device is anyway
4888 	 * in low power state which would save some power.
4889 	 */
4890 	if (ufshcd_is_ufs_dev_poweroff(hba) && ufshcd_is_link_off(hba) &&
4891 	    !hba->dev_info.is_lu_power_on_wp) {
4892 		ufshcd_setup_vreg(hba, false);
4893 	} else if (!ufshcd_is_ufs_dev_active(hba)) {
4894 		ufshcd_toggle_vreg(hba->dev, hba->vreg_info.vcc, false);
4895 		if (!ufshcd_is_link_active(hba)) {
4896 			ufshcd_config_vreg_lpm(hba, hba->vreg_info.vccq);
4897 			ufshcd_config_vreg_lpm(hba, hba->vreg_info.vccq2);
4898 		}
4899 	}
4900 }
4901 
ufshcd_vreg_set_hpm(struct ufs_hba * hba)4902 static int ufshcd_vreg_set_hpm(struct ufs_hba *hba)
4903 {
4904 	int ret = 0;
4905 
4906 	if (ufshcd_is_ufs_dev_poweroff(hba) && ufshcd_is_link_off(hba) &&
4907 	    !hba->dev_info.is_lu_power_on_wp) {
4908 		ret = ufshcd_setup_vreg(hba, true);
4909 	} else if (!ufshcd_is_ufs_dev_active(hba)) {
4910 		ret = ufshcd_toggle_vreg(hba->dev, hba->vreg_info.vcc, true);
4911 		if (!ret && !ufshcd_is_link_active(hba)) {
4912 			ret = ufshcd_config_vreg_hpm(hba, hba->vreg_info.vccq);
4913 			if (ret)
4914 				goto vcc_disable;
4915 			ret = ufshcd_config_vreg_hpm(hba, hba->vreg_info.vccq2);
4916 			if (ret)
4917 				goto vccq_lpm;
4918 		}
4919 	}
4920 	goto out;
4921 
4922 vccq_lpm:
4923 	ufshcd_config_vreg_lpm(hba, hba->vreg_info.vccq);
4924 vcc_disable:
4925 	ufshcd_toggle_vreg(hba->dev, hba->vreg_info.vcc, false);
4926 out:
4927 	return ret;
4928 }
4929 
ufshcd_hba_vreg_set_lpm(struct ufs_hba * hba)4930 static void ufshcd_hba_vreg_set_lpm(struct ufs_hba *hba)
4931 {
4932 	if (ufshcd_is_link_off(hba))
4933 		ufshcd_setup_hba_vreg(hba, false);
4934 }
4935 
ufshcd_hba_vreg_set_hpm(struct ufs_hba * hba)4936 static void ufshcd_hba_vreg_set_hpm(struct ufs_hba *hba)
4937 {
4938 	if (ufshcd_is_link_off(hba))
4939 		ufshcd_setup_hba_vreg(hba, true);
4940 }
4941 
4942 /**
4943  * ufshcd_suspend - helper function for suspend operations
4944  * @hba: per adapter instance
4945  * @pm_op: desired low power operation type
4946  *
4947  * This function will try to put the UFS device and link into low power
4948  * mode based on the "rpm_lvl" (Runtime PM level) or "spm_lvl"
4949  * (System PM level).
4950  *
4951  * If this function is called during shutdown, it will make sure that
4952  * both UFS device and UFS link is powered off.
4953  *
4954  * NOTE: UFS device & link must be active before we enter in this function.
4955  *
4956  * Returns 0 for success and non-zero for failure
4957  */
ufshcd_suspend(struct ufs_hba * hba,enum ufs_pm_op pm_op)4958 static int ufshcd_suspend(struct ufs_hba *hba, enum ufs_pm_op pm_op)
4959 {
4960 	int ret = 0;
4961 	enum ufs_pm_level pm_lvl;
4962 	enum ufs_dev_pwr_mode req_dev_pwr_mode;
4963 	enum uic_link_state req_link_state;
4964 
4965 	hba->pm_op_in_progress = 1;
4966 	if (!ufshcd_is_shutdown_pm(pm_op)) {
4967 		pm_lvl = ufshcd_is_runtime_pm(pm_op) ?
4968 			 hba->rpm_lvl : hba->spm_lvl;
4969 		req_dev_pwr_mode = ufs_get_pm_lvl_to_dev_pwr_mode(pm_lvl);
4970 		req_link_state = ufs_get_pm_lvl_to_link_pwr_state(pm_lvl);
4971 	} else {
4972 		req_dev_pwr_mode = UFS_POWERDOWN_PWR_MODE;
4973 		req_link_state = UIC_LINK_OFF_STATE;
4974 	}
4975 
4976 	/*
4977 	 * If we can't transition into any of the low power modes
4978 	 * just gate the clocks.
4979 	 */
4980 	ufshcd_hold(hba, false);
4981 	hba->clk_gating.is_suspended = true;
4982 
4983 	if (req_dev_pwr_mode == UFS_ACTIVE_PWR_MODE &&
4984 			req_link_state == UIC_LINK_ACTIVE_STATE) {
4985 		goto disable_clks;
4986 	}
4987 
4988 	if ((req_dev_pwr_mode == hba->curr_dev_pwr_mode) &&
4989 	    (req_link_state == hba->uic_link_state))
4990 		goto out;
4991 
4992 	/* UFS device & link must be active before we enter in this function */
4993 	if (!ufshcd_is_ufs_dev_active(hba) || !ufshcd_is_link_active(hba)) {
4994 		ret = -EINVAL;
4995 		goto out;
4996 	}
4997 
4998 	if (ufshcd_is_runtime_pm(pm_op)) {
4999 		if (ufshcd_can_autobkops_during_suspend(hba)) {
5000 			/*
5001 			 * The device is idle with no requests in the queue,
5002 			 * allow background operations if bkops status shows
5003 			 * that performance might be impacted.
5004 			 */
5005 			ret = ufshcd_urgent_bkops(hba);
5006 			if (ret)
5007 				goto enable_gating;
5008 		} else {
5009 			/* make sure that auto bkops is disabled */
5010 			ufshcd_disable_auto_bkops(hba);
5011 		}
5012 	}
5013 
5014 	if ((req_dev_pwr_mode != hba->curr_dev_pwr_mode) &&
5015 	     ((ufshcd_is_runtime_pm(pm_op) && !hba->auto_bkops_enabled) ||
5016 	       !ufshcd_is_runtime_pm(pm_op))) {
5017 		/* ensure that bkops is disabled */
5018 		ufshcd_disable_auto_bkops(hba);
5019 		ret = ufshcd_set_dev_pwr_mode(hba, req_dev_pwr_mode);
5020 		if (ret)
5021 			goto enable_gating;
5022 	}
5023 
5024 	ret = ufshcd_link_state_transition(hba, req_link_state, 1);
5025 	if (ret)
5026 		goto set_dev_active;
5027 
5028 	ufshcd_vreg_set_lpm(hba);
5029 
5030 disable_clks:
5031 	/*
5032 	 * The clock scaling needs access to controller registers. Hence, Wait
5033 	 * for pending clock scaling work to be done before clocks are
5034 	 * turned off.
5035 	 */
5036 	if (ufshcd_is_clkscaling_enabled(hba)) {
5037 		devfreq_suspend_device(hba->devfreq);
5038 		hba->clk_scaling.window_start_t = 0;
5039 	}
5040 	/*
5041 	 * Call vendor specific suspend callback. As these callbacks may access
5042 	 * vendor specific host controller register space call them before the
5043 	 * host clocks are ON.
5044 	 */
5045 	ret = ufshcd_vops_suspend(hba, pm_op);
5046 	if (ret)
5047 		goto set_link_active;
5048 
5049 	ret = ufshcd_vops_setup_clocks(hba, false);
5050 	if (ret)
5051 		goto vops_resume;
5052 
5053 	if (!ufshcd_is_link_active(hba))
5054 		ufshcd_setup_clocks(hba, false);
5055 	else
5056 		/* If link is active, device ref_clk can't be switched off */
5057 		__ufshcd_setup_clocks(hba, false, true);
5058 
5059 	hba->clk_gating.state = CLKS_OFF;
5060 	/*
5061 	 * Disable the host irq as host controller as there won't be any
5062 	 * host controller transaction expected till resume.
5063 	 */
5064 	ufshcd_disable_irq(hba);
5065 	/* Put the host controller in low power mode if possible */
5066 	ufshcd_hba_vreg_set_lpm(hba);
5067 	goto out;
5068 
5069 vops_resume:
5070 	ufshcd_vops_resume(hba, pm_op);
5071 set_link_active:
5072 	ufshcd_vreg_set_hpm(hba);
5073 	if (ufshcd_is_link_hibern8(hba) && !ufshcd_uic_hibern8_exit(hba))
5074 		ufshcd_set_link_active(hba);
5075 	else if (ufshcd_is_link_off(hba))
5076 		ufshcd_host_reset_and_restore(hba);
5077 set_dev_active:
5078 	if (!ufshcd_set_dev_pwr_mode(hba, UFS_ACTIVE_PWR_MODE))
5079 		ufshcd_disable_auto_bkops(hba);
5080 enable_gating:
5081 	hba->clk_gating.is_suspended = false;
5082 	ufshcd_release(hba);
5083 out:
5084 	hba->pm_op_in_progress = 0;
5085 	return ret;
5086 }
5087 
5088 /**
5089  * ufshcd_resume - helper function for resume operations
5090  * @hba: per adapter instance
5091  * @pm_op: runtime PM or system PM
5092  *
5093  * This function basically brings the UFS device, UniPro link and controller
5094  * to active state.
5095  *
5096  * Returns 0 for success and non-zero for failure
5097  */
ufshcd_resume(struct ufs_hba * hba,enum ufs_pm_op pm_op)5098 static int ufshcd_resume(struct ufs_hba *hba, enum ufs_pm_op pm_op)
5099 {
5100 	int ret;
5101 	enum uic_link_state old_link_state;
5102 
5103 	hba->pm_op_in_progress = 1;
5104 	old_link_state = hba->uic_link_state;
5105 
5106 	ufshcd_hba_vreg_set_hpm(hba);
5107 	/* Make sure clocks are enabled before accessing controller */
5108 	ret = ufshcd_setup_clocks(hba, true);
5109 	if (ret)
5110 		goto out;
5111 
5112 	/* enable the host irq as host controller would be active soon */
5113 	ret = ufshcd_enable_irq(hba);
5114 	if (ret)
5115 		goto disable_irq_and_vops_clks;
5116 
5117 	ret = ufshcd_vreg_set_hpm(hba);
5118 	if (ret)
5119 		goto disable_irq_and_vops_clks;
5120 
5121 	/*
5122 	 * Call vendor specific resume callback. As these callbacks may access
5123 	 * vendor specific host controller register space call them when the
5124 	 * host clocks are ON.
5125 	 */
5126 	ret = ufshcd_vops_resume(hba, pm_op);
5127 	if (ret)
5128 		goto disable_vreg;
5129 
5130 	if (ufshcd_is_link_hibern8(hba)) {
5131 		ret = ufshcd_uic_hibern8_exit(hba);
5132 		if (!ret)
5133 			ufshcd_set_link_active(hba);
5134 		else
5135 			goto vendor_suspend;
5136 	} else if (ufshcd_is_link_off(hba)) {
5137 		ret = ufshcd_host_reset_and_restore(hba);
5138 		/*
5139 		 * ufshcd_host_reset_and_restore() should have already
5140 		 * set the link state as active
5141 		 */
5142 		if (ret || !ufshcd_is_link_active(hba))
5143 			goto vendor_suspend;
5144 	}
5145 
5146 	if (!ufshcd_is_ufs_dev_active(hba)) {
5147 		ret = ufshcd_set_dev_pwr_mode(hba, UFS_ACTIVE_PWR_MODE);
5148 		if (ret)
5149 			goto set_old_link_state;
5150 	}
5151 
5152 	/*
5153 	 * If BKOPs operations are urgently needed at this moment then
5154 	 * keep auto-bkops enabled or else disable it.
5155 	 */
5156 	ufshcd_urgent_bkops(hba);
5157 	hba->clk_gating.is_suspended = false;
5158 
5159 	if (ufshcd_is_clkscaling_enabled(hba))
5160 		devfreq_resume_device(hba->devfreq);
5161 
5162 	/* Schedule clock gating in case of no access to UFS device yet */
5163 	ufshcd_release(hba);
5164 	goto out;
5165 
5166 set_old_link_state:
5167 	ufshcd_link_state_transition(hba, old_link_state, 0);
5168 vendor_suspend:
5169 	ufshcd_vops_suspend(hba, pm_op);
5170 disable_vreg:
5171 	ufshcd_vreg_set_lpm(hba);
5172 disable_irq_and_vops_clks:
5173 	ufshcd_disable_irq(hba);
5174 	ufshcd_setup_clocks(hba, false);
5175 out:
5176 	hba->pm_op_in_progress = 0;
5177 	return ret;
5178 }
5179 
5180 /**
5181  * ufshcd_system_suspend - system suspend routine
5182  * @hba: per adapter instance
5183  * @pm_op: runtime PM or system PM
5184  *
5185  * Check the description of ufshcd_suspend() function for more details.
5186  *
5187  * Returns 0 for success and non-zero for failure
5188  */
ufshcd_system_suspend(struct ufs_hba * hba)5189 int ufshcd_system_suspend(struct ufs_hba *hba)
5190 {
5191 	int ret = 0;
5192 
5193 	if (!hba || !hba->is_powered)
5194 		return 0;
5195 
5196 	if (pm_runtime_suspended(hba->dev)) {
5197 		if (hba->rpm_lvl == hba->spm_lvl)
5198 			/*
5199 			 * There is possibility that device may still be in
5200 			 * active state during the runtime suspend.
5201 			 */
5202 			if ((ufs_get_pm_lvl_to_dev_pwr_mode(hba->spm_lvl) ==
5203 			    hba->curr_dev_pwr_mode) && !hba->auto_bkops_enabled)
5204 				goto out;
5205 
5206 		/*
5207 		 * UFS device and/or UFS link low power states during runtime
5208 		 * suspend seems to be different than what is expected during
5209 		 * system suspend. Hence runtime resume the devic & link and
5210 		 * let the system suspend low power states to take effect.
5211 		 * TODO: If resume takes longer time, we might have optimize
5212 		 * it in future by not resuming everything if possible.
5213 		 */
5214 		ret = ufshcd_runtime_resume(hba);
5215 		if (ret)
5216 			goto out;
5217 	}
5218 
5219 	ret = ufshcd_suspend(hba, UFS_SYSTEM_PM);
5220 out:
5221 	if (!ret)
5222 		hba->is_sys_suspended = true;
5223 	return ret;
5224 }
5225 EXPORT_SYMBOL(ufshcd_system_suspend);
5226 
5227 /**
5228  * ufshcd_system_resume - system resume routine
5229  * @hba: per adapter instance
5230  *
5231  * Returns 0 for success and non-zero for failure
5232  */
5233 
ufshcd_system_resume(struct ufs_hba * hba)5234 int ufshcd_system_resume(struct ufs_hba *hba)
5235 {
5236 	if (!hba || !hba->is_powered || pm_runtime_suspended(hba->dev))
5237 		/*
5238 		 * Let the runtime resume take care of resuming
5239 		 * if runtime suspended.
5240 		 */
5241 		return 0;
5242 
5243 	return ufshcd_resume(hba, UFS_SYSTEM_PM);
5244 }
5245 EXPORT_SYMBOL(ufshcd_system_resume);
5246 
5247 /**
5248  * ufshcd_runtime_suspend - runtime suspend routine
5249  * @hba: per adapter instance
5250  *
5251  * Check the description of ufshcd_suspend() function for more details.
5252  *
5253  * Returns 0 for success and non-zero for failure
5254  */
ufshcd_runtime_suspend(struct ufs_hba * hba)5255 int ufshcd_runtime_suspend(struct ufs_hba *hba)
5256 {
5257 	if (!hba || !hba->is_powered)
5258 		return 0;
5259 
5260 	return ufshcd_suspend(hba, UFS_RUNTIME_PM);
5261 }
5262 EXPORT_SYMBOL(ufshcd_runtime_suspend);
5263 
5264 /**
5265  * ufshcd_runtime_resume - runtime resume routine
5266  * @hba: per adapter instance
5267  *
5268  * This function basically brings the UFS device, UniPro link and controller
5269  * to active state. Following operations are done in this function:
5270  *
5271  * 1. Turn on all the controller related clocks
5272  * 2. Bring the UniPro link out of Hibernate state
5273  * 3. If UFS device is in sleep state, turn ON VCC rail and bring the UFS device
5274  *    to active state.
5275  * 4. If auto-bkops is enabled on the device, disable it.
5276  *
5277  * So following would be the possible power state after this function return
5278  * successfully:
5279  *	S1: UFS device in Active state with VCC rail ON
5280  *	    UniPro link in Active state
5281  *	    All the UFS/UniPro controller clocks are ON
5282  *
5283  * Returns 0 for success and non-zero for failure
5284  */
ufshcd_runtime_resume(struct ufs_hba * hba)5285 int ufshcd_runtime_resume(struct ufs_hba *hba)
5286 {
5287 	if (!hba || !hba->is_powered)
5288 		return 0;
5289 	else
5290 		return ufshcd_resume(hba, UFS_RUNTIME_PM);
5291 }
5292 EXPORT_SYMBOL(ufshcd_runtime_resume);
5293 
ufshcd_runtime_idle(struct ufs_hba * hba)5294 int ufshcd_runtime_idle(struct ufs_hba *hba)
5295 {
5296 	return 0;
5297 }
5298 EXPORT_SYMBOL(ufshcd_runtime_idle);
5299 
5300 /**
5301  * ufshcd_shutdown - shutdown routine
5302  * @hba: per adapter instance
5303  *
5304  * This function would power off both UFS device and UFS link.
5305  *
5306  * Returns 0 always to allow force shutdown even in case of errors.
5307  */
ufshcd_shutdown(struct ufs_hba * hba)5308 int ufshcd_shutdown(struct ufs_hba *hba)
5309 {
5310 	int ret = 0;
5311 
5312 	if (ufshcd_is_ufs_dev_poweroff(hba) && ufshcd_is_link_off(hba))
5313 		goto out;
5314 
5315 	if (pm_runtime_suspended(hba->dev)) {
5316 		ret = ufshcd_runtime_resume(hba);
5317 		if (ret)
5318 			goto out;
5319 	}
5320 
5321 	ret = ufshcd_suspend(hba, UFS_SHUTDOWN_PM);
5322 out:
5323 	if (ret)
5324 		dev_err(hba->dev, "%s failed, err %d\n", __func__, ret);
5325 	/* allow force shutdown even in case of errors */
5326 	return 0;
5327 }
5328 EXPORT_SYMBOL(ufshcd_shutdown);
5329 
5330 /**
5331  * ufshcd_remove - de-allocate SCSI host and host memory space
5332  *		data structure memory
5333  * @hba - per adapter instance
5334  */
ufshcd_remove(struct ufs_hba * hba)5335 void ufshcd_remove(struct ufs_hba *hba)
5336 {
5337 	scsi_remove_host(hba->host);
5338 	/* disable interrupts */
5339 	ufshcd_disable_intr(hba, hba->intr_mask);
5340 	ufshcd_hba_stop(hba);
5341 
5342 	scsi_host_put(hba->host);
5343 
5344 	ufshcd_exit_clk_gating(hba);
5345 	if (ufshcd_is_clkscaling_enabled(hba))
5346 		devfreq_remove_device(hba->devfreq);
5347 	ufshcd_hba_exit(hba);
5348 }
5349 EXPORT_SYMBOL_GPL(ufshcd_remove);
5350 
5351 /**
5352  * ufshcd_dealloc_host - deallocate Host Bus Adapter (HBA)
5353  * @hba: pointer to Host Bus Adapter (HBA)
5354  */
ufshcd_dealloc_host(struct ufs_hba * hba)5355 void ufshcd_dealloc_host(struct ufs_hba *hba)
5356 {
5357 	scsi_host_put(hba->host);
5358 }
5359 EXPORT_SYMBOL_GPL(ufshcd_dealloc_host);
5360 
5361 /**
5362  * ufshcd_set_dma_mask - Set dma mask based on the controller
5363  *			 addressing capability
5364  * @hba: per adapter instance
5365  *
5366  * Returns 0 for success, non-zero for failure
5367  */
ufshcd_set_dma_mask(struct ufs_hba * hba)5368 static int ufshcd_set_dma_mask(struct ufs_hba *hba)
5369 {
5370 	if (hba->capabilities & MASK_64_ADDRESSING_SUPPORT) {
5371 		if (!dma_set_mask_and_coherent(hba->dev, DMA_BIT_MASK(64)))
5372 			return 0;
5373 	}
5374 	return dma_set_mask_and_coherent(hba->dev, DMA_BIT_MASK(32));
5375 }
5376 
5377 /**
5378  * ufshcd_alloc_host - allocate Host Bus Adapter (HBA)
5379  * @dev: pointer to device handle
5380  * @hba_handle: driver private handle
5381  * Returns 0 on success, non-zero value on failure
5382  */
ufshcd_alloc_host(struct device * dev,struct ufs_hba ** hba_handle)5383 int ufshcd_alloc_host(struct device *dev, struct ufs_hba **hba_handle)
5384 {
5385 	struct Scsi_Host *host;
5386 	struct ufs_hba *hba;
5387 	int err = 0;
5388 
5389 	if (!dev) {
5390 		dev_err(dev,
5391 		"Invalid memory reference for dev is NULL\n");
5392 		err = -ENODEV;
5393 		goto out_error;
5394 	}
5395 
5396 	host = scsi_host_alloc(&ufshcd_driver_template,
5397 				sizeof(struct ufs_hba));
5398 	if (!host) {
5399 		dev_err(dev, "scsi_host_alloc failed\n");
5400 		err = -ENOMEM;
5401 		goto out_error;
5402 	}
5403 	hba = shost_priv(host);
5404 	hba->host = host;
5405 	hba->dev = dev;
5406 	*hba_handle = hba;
5407 
5408 out_error:
5409 	return err;
5410 }
5411 EXPORT_SYMBOL(ufshcd_alloc_host);
5412 
ufshcd_scale_clks(struct ufs_hba * hba,bool scale_up)5413 static int ufshcd_scale_clks(struct ufs_hba *hba, bool scale_up)
5414 {
5415 	int ret = 0;
5416 	struct ufs_clk_info *clki;
5417 	struct list_head *head = &hba->clk_list_head;
5418 
5419 	if (!head || list_empty(head))
5420 		goto out;
5421 
5422 	ret = ufshcd_vops_clk_scale_notify(hba, scale_up, PRE_CHANGE);
5423 	if (ret)
5424 		return ret;
5425 
5426 	list_for_each_entry(clki, head, list) {
5427 		if (!IS_ERR_OR_NULL(clki->clk)) {
5428 			if (scale_up && clki->max_freq) {
5429 				if (clki->curr_freq == clki->max_freq)
5430 					continue;
5431 				ret = clk_set_rate(clki->clk, clki->max_freq);
5432 				if (ret) {
5433 					dev_err(hba->dev, "%s: %s clk set rate(%dHz) failed, %d\n",
5434 						__func__, clki->name,
5435 						clki->max_freq, ret);
5436 					break;
5437 				}
5438 				clki->curr_freq = clki->max_freq;
5439 
5440 			} else if (!scale_up && clki->min_freq) {
5441 				if (clki->curr_freq == clki->min_freq)
5442 					continue;
5443 				ret = clk_set_rate(clki->clk, clki->min_freq);
5444 				if (ret) {
5445 					dev_err(hba->dev, "%s: %s clk set rate(%dHz) failed, %d\n",
5446 						__func__, clki->name,
5447 						clki->min_freq, ret);
5448 					break;
5449 				}
5450 				clki->curr_freq = clki->min_freq;
5451 			}
5452 		}
5453 		dev_dbg(hba->dev, "%s: clk: %s, rate: %lu\n", __func__,
5454 				clki->name, clk_get_rate(clki->clk));
5455 	}
5456 
5457 	ret = ufshcd_vops_clk_scale_notify(hba, scale_up, POST_CHANGE);
5458 
5459 out:
5460 	return ret;
5461 }
5462 
ufshcd_devfreq_target(struct device * dev,unsigned long * freq,u32 flags)5463 static int ufshcd_devfreq_target(struct device *dev,
5464 				unsigned long *freq, u32 flags)
5465 {
5466 	int err = 0;
5467 	struct ufs_hba *hba = dev_get_drvdata(dev);
5468 
5469 	if (!ufshcd_is_clkscaling_enabled(hba))
5470 		return -EINVAL;
5471 
5472 	if (*freq == UINT_MAX)
5473 		err = ufshcd_scale_clks(hba, true);
5474 	else if (*freq == 0)
5475 		err = ufshcd_scale_clks(hba, false);
5476 
5477 	return err;
5478 }
5479 
ufshcd_devfreq_get_dev_status(struct device * dev,struct devfreq_dev_status * stat)5480 static int ufshcd_devfreq_get_dev_status(struct device *dev,
5481 		struct devfreq_dev_status *stat)
5482 {
5483 	struct ufs_hba *hba = dev_get_drvdata(dev);
5484 	struct ufs_clk_scaling *scaling = &hba->clk_scaling;
5485 	unsigned long flags;
5486 
5487 	if (!ufshcd_is_clkscaling_enabled(hba))
5488 		return -EINVAL;
5489 
5490 	memset(stat, 0, sizeof(*stat));
5491 
5492 	spin_lock_irqsave(hba->host->host_lock, flags);
5493 	if (!scaling->window_start_t)
5494 		goto start_window;
5495 
5496 	if (scaling->is_busy_started)
5497 		scaling->tot_busy_t += ktime_to_us(ktime_sub(ktime_get(),
5498 					scaling->busy_start_t));
5499 
5500 	stat->total_time = jiffies_to_usecs((long)jiffies -
5501 				(long)scaling->window_start_t);
5502 	stat->busy_time = scaling->tot_busy_t;
5503 start_window:
5504 	scaling->window_start_t = jiffies;
5505 	scaling->tot_busy_t = 0;
5506 
5507 	if (hba->outstanding_reqs) {
5508 		scaling->busy_start_t = ktime_get();
5509 		scaling->is_busy_started = true;
5510 	} else {
5511 		scaling->busy_start_t = ktime_set(0, 0);
5512 		scaling->is_busy_started = false;
5513 	}
5514 	spin_unlock_irqrestore(hba->host->host_lock, flags);
5515 	return 0;
5516 }
5517 
5518 static struct devfreq_dev_profile ufs_devfreq_profile = {
5519 	.polling_ms	= 100,
5520 	.target		= ufshcd_devfreq_target,
5521 	.get_dev_status	= ufshcd_devfreq_get_dev_status,
5522 };
5523 
5524 /**
5525  * ufshcd_init - Driver initialization routine
5526  * @hba: per-adapter instance
5527  * @mmio_base: base register address
5528  * @irq: Interrupt line of device
5529  * Returns 0 on success, non-zero value on failure
5530  */
ufshcd_init(struct ufs_hba * hba,void __iomem * mmio_base,unsigned int irq)5531 int ufshcd_init(struct ufs_hba *hba, void __iomem *mmio_base, unsigned int irq)
5532 {
5533 	int err;
5534 	struct Scsi_Host *host = hba->host;
5535 	struct device *dev = hba->dev;
5536 
5537 	if (!mmio_base) {
5538 		dev_err(hba->dev,
5539 		"Invalid memory reference for mmio_base is NULL\n");
5540 		err = -ENODEV;
5541 		goto out_error;
5542 	}
5543 
5544 	hba->mmio_base = mmio_base;
5545 	hba->irq = irq;
5546 
5547 	err = ufshcd_hba_init(hba);
5548 	if (err)
5549 		goto out_error;
5550 
5551 	/* Read capabilities registers */
5552 	ufshcd_hba_capabilities(hba);
5553 
5554 	/* Get UFS version supported by the controller */
5555 	hba->ufs_version = ufshcd_get_ufs_version(hba);
5556 
5557 	/* Get Interrupt bit mask per version */
5558 	hba->intr_mask = ufshcd_get_intr_mask(hba);
5559 
5560 	err = ufshcd_set_dma_mask(hba);
5561 	if (err) {
5562 		dev_err(hba->dev, "set dma mask failed\n");
5563 		goto out_disable;
5564 	}
5565 
5566 	/* Allocate memory for host memory space */
5567 	err = ufshcd_memory_alloc(hba);
5568 	if (err) {
5569 		dev_err(hba->dev, "Memory allocation failed\n");
5570 		goto out_disable;
5571 	}
5572 
5573 	/* Configure LRB */
5574 	ufshcd_host_memory_configure(hba);
5575 
5576 	host->can_queue = hba->nutrs;
5577 	host->cmd_per_lun = hba->nutrs;
5578 	host->max_id = UFSHCD_MAX_ID;
5579 	host->max_lun = UFS_MAX_LUNS;
5580 	host->max_channel = UFSHCD_MAX_CHANNEL;
5581 	host->unique_id = host->host_no;
5582 	host->max_cmd_len = MAX_CDB_SIZE;
5583 
5584 	hba->max_pwr_info.is_valid = false;
5585 
5586 	/* Initailize wait queue for task management */
5587 	init_waitqueue_head(&hba->tm_wq);
5588 	init_waitqueue_head(&hba->tm_tag_wq);
5589 
5590 	/* Initialize work queues */
5591 	INIT_WORK(&hba->eh_work, ufshcd_err_handler);
5592 	INIT_WORK(&hba->eeh_work, ufshcd_exception_event_handler);
5593 
5594 	/* Initialize UIC command mutex */
5595 	mutex_init(&hba->uic_cmd_mutex);
5596 
5597 	/* Initialize mutex for device management commands */
5598 	mutex_init(&hba->dev_cmd.lock);
5599 
5600 	/* Initialize device management tag acquire wait queue */
5601 	init_waitqueue_head(&hba->dev_cmd.tag_wq);
5602 
5603 	ufshcd_init_clk_gating(hba);
5604 	/* IRQ registration */
5605 	err = devm_request_irq(dev, irq, ufshcd_intr, IRQF_SHARED, UFSHCD, hba);
5606 	if (err) {
5607 		dev_err(hba->dev, "request irq failed\n");
5608 		goto exit_gating;
5609 	} else {
5610 		hba->is_irq_enabled = true;
5611 	}
5612 
5613 	err = scsi_add_host(host, hba->dev);
5614 	if (err) {
5615 		dev_err(hba->dev, "scsi_add_host failed\n");
5616 		goto exit_gating;
5617 	}
5618 
5619 	/* Host controller enable */
5620 	err = ufshcd_hba_enable(hba);
5621 	if (err) {
5622 		dev_err(hba->dev, "Host controller enable failed\n");
5623 		goto out_remove_scsi_host;
5624 	}
5625 
5626 	if (ufshcd_is_clkscaling_enabled(hba)) {
5627 		hba->devfreq = devfreq_add_device(dev, &ufs_devfreq_profile,
5628 						   "simple_ondemand", NULL);
5629 		if (IS_ERR(hba->devfreq)) {
5630 			dev_err(hba->dev, "Unable to register with devfreq %ld\n",
5631 					PTR_ERR(hba->devfreq));
5632 			goto out_remove_scsi_host;
5633 		}
5634 		/* Suspend devfreq until the UFS device is detected */
5635 		devfreq_suspend_device(hba->devfreq);
5636 		hba->clk_scaling.window_start_t = 0;
5637 	}
5638 
5639 	/* Hold auto suspend until async scan completes */
5640 	pm_runtime_get_sync(dev);
5641 
5642 	/*
5643 	 * The device-initialize-sequence hasn't been invoked yet.
5644 	 * Set the device to power-off state
5645 	 */
5646 	ufshcd_set_ufs_dev_poweroff(hba);
5647 
5648 	async_schedule(ufshcd_async_scan, hba);
5649 
5650 	return 0;
5651 
5652 out_remove_scsi_host:
5653 	scsi_remove_host(hba->host);
5654 exit_gating:
5655 	ufshcd_exit_clk_gating(hba);
5656 out_disable:
5657 	hba->is_irq_enabled = false;
5658 	scsi_host_put(host);
5659 	ufshcd_hba_exit(hba);
5660 out_error:
5661 	return err;
5662 }
5663 EXPORT_SYMBOL_GPL(ufshcd_init);
5664 
5665 MODULE_AUTHOR("Santosh Yaragnavi <santosh.sy@samsung.com>");
5666 MODULE_AUTHOR("Vinayak Holikatti <h.vinayak@samsung.com>");
5667 MODULE_DESCRIPTION("Generic UFS host controller driver Core");
5668 MODULE_LICENSE("GPL");
5669 MODULE_VERSION(UFSHCD_DRIVER_VERSION);
5670