1 /*
2  * dim2_hal.h - DIM2 HAL interface
3  * (MediaLB, Device Interface Macro IP, OS62420)
4  *
5  * Copyright (C) 2015, Microchip Technology Germany II GmbH & Co. KG
6  *
7  * This program is distributed in the hope that it will be useful,
8  * but WITHOUT ANY WARRANTY; without even the implied warranty of
9  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
10  * GNU General Public License for more details.
11  *
12  * This file is licensed under GPLv2.
13  */
14 
15 #ifndef _DIM2_HAL_H
16 #define _DIM2_HAL_H
17 
18 #include <linux/types.h>
19 
20 
21 #ifdef __cplusplus
22 extern "C" {
23 #endif
24 
25 /*
26  * The values below are specified in the hardware specification.
27  * So, they should not be changed until the hardware specification changes.
28  */
29 enum mlb_clk_speed {
30 	CLK_256FS = 0,
31 	CLK_512FS = 1,
32 	CLK_1024FS = 2,
33 	CLK_2048FS = 3,
34 	CLK_3072FS = 4,
35 	CLK_4096FS = 5,
36 	CLK_6144FS = 6,
37 	CLK_8192FS = 7,
38 };
39 
40 struct dim_ch_state_t {
41 	bool ready; /* Shows readiness to enqueue next buffer */
42 	u16 done_buffers; /* Number of completed buffers */
43 };
44 
45 typedef int atomic_counter_t;
46 
47 struct int_ch_state {
48 	/* changed only in interrupt context */
49 	volatile atomic_counter_t request_counter;
50 
51 	/* changed only in task context */
52 	volatile atomic_counter_t service_counter;
53 
54 	u8 idx1;
55 	u8 idx2;
56 	u8 level; /* [0..2], buffering level */
57 };
58 
59 struct dim_channel {
60 	struct int_ch_state state;
61 	u8 addr;
62 	u16 dbr_addr;
63 	u16 dbr_size;
64 	u16 packet_length; /*< Isochronous packet length in bytes. */
65 	u16 bytes_per_frame; /*< Synchronous bytes per frame. */
66 	u16 done_sw_buffers_number; /*< Done software buffers number. */
67 };
68 
69 
70 u8 DIM_Startup(void *dim_base_address, u32 mlb_clock);
71 
72 void DIM_Shutdown(void);
73 
74 bool DIM_GetLockState(void);
75 
76 u16 DIM_NormCtrlAsyncBufferSize(u16 buf_size);
77 
78 u16 DIM_NormIsocBufferSize(u16 buf_size, u16 packet_length);
79 
80 u16 DIM_NormSyncBufferSize(u16 buf_size, u16 bytes_per_frame);
81 
82 u8 DIM_InitControl(struct dim_channel *ch, u8 is_tx, u16 ch_address,
83 		   u16 max_buffer_size);
84 
85 u8 DIM_InitAsync(struct dim_channel *ch, u8 is_tx, u16 ch_address,
86 		 u16 max_buffer_size);
87 
88 u8 DIM_InitIsoc(struct dim_channel *ch, u8 is_tx, u16 ch_address,
89 		u16 packet_length);
90 
91 u8 DIM_InitSync(struct dim_channel *ch, u8 is_tx, u16 ch_address,
92 		u16 bytes_per_frame);
93 
94 u8 DIM_DestroyChannel(struct dim_channel *ch);
95 
96 void DIM_ServiceIrq(struct dim_channel *const *channels);
97 
98 u8 DIM_ServiceChannel(struct dim_channel *ch);
99 
100 struct dim_ch_state_t *DIM_GetChannelState(struct dim_channel *ch,
101 		struct dim_ch_state_t *dim_ch_state_ptr);
102 
103 bool DIM_EnqueueBuffer(struct dim_channel *ch, u32 buffer_addr,
104 		       u16 buffer_size);
105 
106 bool DIM_DetachBuffers(struct dim_channel *ch, u16 buffers_number);
107 
108 u32 DIMCB_IoRead(u32 *ptr32);
109 
110 void DIMCB_IoWrite(u32 *ptr32, u32 value);
111 
112 void DIMCB_OnError(u8 error_id, const char *error_message);
113 
114 
115 #ifdef __cplusplus
116 }
117 #endif
118 
119 #endif /* _DIM2_HAL_H */
120