1 /*
2 * Copyright © 2007 David Airlie
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
21 * DEALINGS IN THE SOFTWARE.
22 *
23 * Authors:
24 * David Airlie
25 */
26 #include <linux/module.h>
27 #include <linux/slab.h>
28 #include <linux/fb.h>
29
30 #include <drm/drmP.h>
31 #include <drm/drm_crtc.h>
32 #include <drm/drm_crtc_helper.h>
33 #include <drm/radeon_drm.h>
34 #include "radeon.h"
35
36 #include <drm/drm_fb_helper.h>
37
38 #include <linux/vga_switcheroo.h>
39
40 /* object hierarchy -
41 this contains a helper + a radeon fb
42 the helper contains a pointer to radeon framebuffer baseclass.
43 */
44 struct radeon_fbdev {
45 struct drm_fb_helper helper;
46 struct radeon_framebuffer rfb;
47 struct list_head fbdev_list;
48 struct radeon_device *rdev;
49 };
50
51 /**
52 * radeon_fb_helper_set_par - Hide cursor on CRTCs used by fbdev.
53 *
54 * @info: fbdev info
55 *
56 * This function hides the cursor on all CRTCs used by fbdev.
57 */
radeon_fb_helper_set_par(struct fb_info * info)58 static int radeon_fb_helper_set_par(struct fb_info *info)
59 {
60 int ret;
61
62 ret = drm_fb_helper_set_par(info);
63
64 /* XXX: with universal plane support fbdev will automatically disable
65 * all non-primary planes (including the cursor)
66 */
67 if (ret == 0) {
68 struct drm_fb_helper *fb_helper = info->par;
69 int i;
70
71 for (i = 0; i < fb_helper->crtc_count; i++) {
72 struct drm_crtc *crtc = fb_helper->crtc_info[i].mode_set.crtc;
73
74 radeon_crtc_cursor_set2(crtc, NULL, 0, 0, 0, 0, 0);
75 }
76 }
77
78 return ret;
79 }
80
81 static struct fb_ops radeonfb_ops = {
82 .owner = THIS_MODULE,
83 .fb_check_var = drm_fb_helper_check_var,
84 .fb_set_par = radeon_fb_helper_set_par,
85 .fb_fillrect = cfb_fillrect,
86 .fb_copyarea = cfb_copyarea,
87 .fb_imageblit = cfb_imageblit,
88 .fb_pan_display = drm_fb_helper_pan_display,
89 .fb_blank = drm_fb_helper_blank,
90 .fb_setcmap = drm_fb_helper_setcmap,
91 .fb_debug_enter = drm_fb_helper_debug_enter,
92 .fb_debug_leave = drm_fb_helper_debug_leave,
93 };
94
95
radeon_align_pitch(struct radeon_device * rdev,int width,int bpp,bool tiled)96 int radeon_align_pitch(struct radeon_device *rdev, int width, int bpp, bool tiled)
97 {
98 int aligned = width;
99 int align_large = (ASIC_IS_AVIVO(rdev)) || tiled;
100 int pitch_mask = 0;
101
102 switch (bpp / 8) {
103 case 1:
104 pitch_mask = align_large ? 255 : 127;
105 break;
106 case 2:
107 pitch_mask = align_large ? 127 : 31;
108 break;
109 case 3:
110 case 4:
111 pitch_mask = align_large ? 63 : 15;
112 break;
113 }
114
115 aligned += pitch_mask;
116 aligned &= ~pitch_mask;
117 return aligned;
118 }
119
radeonfb_destroy_pinned_object(struct drm_gem_object * gobj)120 static void radeonfb_destroy_pinned_object(struct drm_gem_object *gobj)
121 {
122 struct radeon_bo *rbo = gem_to_radeon_bo(gobj);
123 int ret;
124
125 ret = radeon_bo_reserve(rbo, false);
126 if (likely(ret == 0)) {
127 radeon_bo_kunmap(rbo);
128 radeon_bo_unpin(rbo);
129 radeon_bo_unreserve(rbo);
130 }
131 drm_gem_object_unreference_unlocked(gobj);
132 }
133
radeonfb_create_pinned_object(struct radeon_fbdev * rfbdev,struct drm_mode_fb_cmd2 * mode_cmd,struct drm_gem_object ** gobj_p)134 static int radeonfb_create_pinned_object(struct radeon_fbdev *rfbdev,
135 struct drm_mode_fb_cmd2 *mode_cmd,
136 struct drm_gem_object **gobj_p)
137 {
138 struct radeon_device *rdev = rfbdev->rdev;
139 struct drm_gem_object *gobj = NULL;
140 struct radeon_bo *rbo = NULL;
141 bool fb_tiled = false; /* useful for testing */
142 u32 tiling_flags = 0;
143 int ret;
144 int aligned_size, size;
145 int height = mode_cmd->height;
146 u32 bpp, depth;
147
148 drm_fb_get_bpp_depth(mode_cmd->pixel_format, &depth, &bpp);
149
150 /* need to align pitch with crtc limits */
151 mode_cmd->pitches[0] = radeon_align_pitch(rdev, mode_cmd->width, bpp,
152 fb_tiled) * ((bpp + 1) / 8);
153
154 if (rdev->family >= CHIP_R600)
155 height = ALIGN(mode_cmd->height, 8);
156 size = mode_cmd->pitches[0] * height;
157 aligned_size = ALIGN(size, PAGE_SIZE);
158 ret = radeon_gem_object_create(rdev, aligned_size, 0,
159 RADEON_GEM_DOMAIN_VRAM,
160 0, true, &gobj);
161 if (ret) {
162 printk(KERN_ERR "failed to allocate framebuffer (%d)\n",
163 aligned_size);
164 return -ENOMEM;
165 }
166 rbo = gem_to_radeon_bo(gobj);
167
168 if (fb_tiled)
169 tiling_flags = RADEON_TILING_MACRO;
170
171 #ifdef __BIG_ENDIAN
172 switch (bpp) {
173 case 32:
174 tiling_flags |= RADEON_TILING_SWAP_32BIT;
175 break;
176 case 16:
177 tiling_flags |= RADEON_TILING_SWAP_16BIT;
178 default:
179 break;
180 }
181 #endif
182
183 if (tiling_flags) {
184 ret = radeon_bo_set_tiling_flags(rbo,
185 tiling_flags | RADEON_TILING_SURFACE,
186 mode_cmd->pitches[0]);
187 if (ret)
188 dev_err(rdev->dev, "FB failed to set tiling flags\n");
189 }
190
191
192 ret = radeon_bo_reserve(rbo, false);
193 if (unlikely(ret != 0))
194 goto out_unref;
195 /* Only 27 bit offset for legacy CRTC */
196 ret = radeon_bo_pin_restricted(rbo, RADEON_GEM_DOMAIN_VRAM,
197 ASIC_IS_AVIVO(rdev) ? 0 : 1 << 27,
198 NULL);
199 if (ret) {
200 radeon_bo_unreserve(rbo);
201 goto out_unref;
202 }
203 if (fb_tiled)
204 radeon_bo_check_tiling(rbo, 0, 0);
205 ret = radeon_bo_kmap(rbo, NULL);
206 radeon_bo_unreserve(rbo);
207 if (ret) {
208 goto out_unref;
209 }
210
211 *gobj_p = gobj;
212 return 0;
213 out_unref:
214 radeonfb_destroy_pinned_object(gobj);
215 *gobj_p = NULL;
216 return ret;
217 }
218
radeonfb_create(struct drm_fb_helper * helper,struct drm_fb_helper_surface_size * sizes)219 static int radeonfb_create(struct drm_fb_helper *helper,
220 struct drm_fb_helper_surface_size *sizes)
221 {
222 struct radeon_fbdev *rfbdev =
223 container_of(helper, struct radeon_fbdev, helper);
224 struct radeon_device *rdev = rfbdev->rdev;
225 struct fb_info *info;
226 struct drm_framebuffer *fb = NULL;
227 struct drm_mode_fb_cmd2 mode_cmd;
228 struct drm_gem_object *gobj = NULL;
229 struct radeon_bo *rbo = NULL;
230 struct device *device = &rdev->pdev->dev;
231 int ret;
232 unsigned long tmp;
233
234 mode_cmd.width = sizes->surface_width;
235 mode_cmd.height = sizes->surface_height;
236
237 /* avivo can't scanout real 24bpp */
238 if ((sizes->surface_bpp == 24) && ASIC_IS_AVIVO(rdev))
239 sizes->surface_bpp = 32;
240
241 mode_cmd.pixel_format = drm_mode_legacy_fb_format(sizes->surface_bpp,
242 sizes->surface_depth);
243
244 ret = radeonfb_create_pinned_object(rfbdev, &mode_cmd, &gobj);
245 if (ret) {
246 DRM_ERROR("failed to create fbcon object %d\n", ret);
247 return ret;
248 }
249
250 rbo = gem_to_radeon_bo(gobj);
251
252 /* okay we have an object now allocate the framebuffer */
253 info = framebuffer_alloc(0, device);
254 if (info == NULL) {
255 ret = -ENOMEM;
256 goto out_unref;
257 }
258
259 info->par = rfbdev;
260
261 ret = radeon_framebuffer_init(rdev->ddev, &rfbdev->rfb, &mode_cmd, gobj);
262 if (ret) {
263 DRM_ERROR("failed to initialize framebuffer %d\n", ret);
264 goto out_unref;
265 }
266
267 fb = &rfbdev->rfb.base;
268
269 /* setup helper */
270 rfbdev->helper.fb = fb;
271 rfbdev->helper.fbdev = info;
272
273 memset_io(rbo->kptr, 0x0, radeon_bo_size(rbo));
274
275 strcpy(info->fix.id, "radeondrmfb");
276
277 drm_fb_helper_fill_fix(info, fb->pitches[0], fb->depth);
278
279 info->flags = FBINFO_DEFAULT | FBINFO_CAN_FORCE_OUTPUT;
280 info->fbops = &radeonfb_ops;
281
282 tmp = radeon_bo_gpu_offset(rbo) - rdev->mc.vram_start;
283 info->fix.smem_start = rdev->mc.aper_base + tmp;
284 info->fix.smem_len = radeon_bo_size(rbo);
285 info->screen_base = rbo->kptr;
286 info->screen_size = radeon_bo_size(rbo);
287
288 drm_fb_helper_fill_var(info, &rfbdev->helper, sizes->fb_width, sizes->fb_height);
289
290 /* setup aperture base/size for vesafb takeover */
291 info->apertures = alloc_apertures(1);
292 if (!info->apertures) {
293 ret = -ENOMEM;
294 goto out_unref;
295 }
296 info->apertures->ranges[0].base = rdev->ddev->mode_config.fb_base;
297 info->apertures->ranges[0].size = rdev->mc.aper_size;
298
299 /* Use default scratch pixmap (info->pixmap.flags = FB_PIXMAP_SYSTEM) */
300
301 if (info->screen_base == NULL) {
302 ret = -ENOSPC;
303 goto out_unref;
304 }
305
306 ret = fb_alloc_cmap(&info->cmap, 256, 0);
307 if (ret) {
308 ret = -ENOMEM;
309 goto out_unref;
310 }
311
312 DRM_INFO("fb mappable at 0x%lX\n", info->fix.smem_start);
313 DRM_INFO("vram apper at 0x%lX\n", (unsigned long)rdev->mc.aper_base);
314 DRM_INFO("size %lu\n", (unsigned long)radeon_bo_size(rbo));
315 DRM_INFO("fb depth is %d\n", fb->depth);
316 DRM_INFO(" pitch is %d\n", fb->pitches[0]);
317
318 vga_switcheroo_client_fb_set(rdev->ddev->pdev, info);
319 return 0;
320
321 out_unref:
322 if (rbo) {
323
324 }
325 if (fb && ret) {
326 drm_gem_object_unreference(gobj);
327 drm_framebuffer_unregister_private(fb);
328 drm_framebuffer_cleanup(fb);
329 kfree(fb);
330 }
331 return ret;
332 }
333
radeon_fb_output_poll_changed(struct radeon_device * rdev)334 void radeon_fb_output_poll_changed(struct radeon_device *rdev)
335 {
336 if (rdev->mode_info.rfbdev)
337 drm_fb_helper_hotplug_event(&rdev->mode_info.rfbdev->helper);
338 }
339
radeon_fbdev_destroy(struct drm_device * dev,struct radeon_fbdev * rfbdev)340 static int radeon_fbdev_destroy(struct drm_device *dev, struct radeon_fbdev *rfbdev)
341 {
342 struct fb_info *info;
343 struct radeon_framebuffer *rfb = &rfbdev->rfb;
344
345 if (rfbdev->helper.fbdev) {
346 info = rfbdev->helper.fbdev;
347
348 unregister_framebuffer(info);
349 if (info->cmap.len)
350 fb_dealloc_cmap(&info->cmap);
351 framebuffer_release(info);
352 }
353
354 if (rfb->obj) {
355 radeonfb_destroy_pinned_object(rfb->obj);
356 rfb->obj = NULL;
357 }
358 drm_fb_helper_fini(&rfbdev->helper);
359 drm_framebuffer_unregister_private(&rfb->base);
360 drm_framebuffer_cleanup(&rfb->base);
361
362 return 0;
363 }
364
365 static const struct drm_fb_helper_funcs radeon_fb_helper_funcs = {
366 .gamma_set = radeon_crtc_fb_gamma_set,
367 .gamma_get = radeon_crtc_fb_gamma_get,
368 .fb_probe = radeonfb_create,
369 };
370
radeon_fbdev_init(struct radeon_device * rdev)371 int radeon_fbdev_init(struct radeon_device *rdev)
372 {
373 struct radeon_fbdev *rfbdev;
374 int bpp_sel = 32;
375 int ret;
376
377 /* don't enable fbdev if no connectors */
378 if (list_empty(&rdev->ddev->mode_config.connector_list))
379 return 0;
380
381 /* select 8 bpp console on RN50 or 16MB cards */
382 if (ASIC_IS_RN50(rdev) || rdev->mc.real_vram_size <= (32*1024*1024))
383 bpp_sel = 8;
384
385 rfbdev = kzalloc(sizeof(struct radeon_fbdev), GFP_KERNEL);
386 if (!rfbdev)
387 return -ENOMEM;
388
389 rfbdev->rdev = rdev;
390 rdev->mode_info.rfbdev = rfbdev;
391
392 drm_fb_helper_prepare(rdev->ddev, &rfbdev->helper,
393 &radeon_fb_helper_funcs);
394
395 ret = drm_fb_helper_init(rdev->ddev, &rfbdev->helper,
396 rdev->num_crtc,
397 RADEONFB_CONN_LIMIT);
398 if (ret)
399 goto free;
400
401 ret = drm_fb_helper_single_add_all_connectors(&rfbdev->helper);
402 if (ret)
403 goto fini;
404
405 /* disable all the possible outputs/crtcs before entering KMS mode */
406 drm_helper_disable_unused_functions(rdev->ddev);
407
408 ret = drm_fb_helper_initial_config(&rfbdev->helper, bpp_sel);
409 if (ret)
410 goto fini;
411
412 return 0;
413
414 fini:
415 drm_fb_helper_fini(&rfbdev->helper);
416 free:
417 kfree(rfbdev);
418 return ret;
419 }
420
radeon_fbdev_fini(struct radeon_device * rdev)421 void radeon_fbdev_fini(struct radeon_device *rdev)
422 {
423 if (!rdev->mode_info.rfbdev)
424 return;
425
426 radeon_fbdev_destroy(rdev->ddev, rdev->mode_info.rfbdev);
427 kfree(rdev->mode_info.rfbdev);
428 rdev->mode_info.rfbdev = NULL;
429 }
430
radeon_fbdev_set_suspend(struct radeon_device * rdev,int state)431 void radeon_fbdev_set_suspend(struct radeon_device *rdev, int state)
432 {
433 if (rdev->mode_info.rfbdev)
434 fb_set_suspend(rdev->mode_info.rfbdev->helper.fbdev, state);
435 }
436
radeon_fbdev_robj_is_fb(struct radeon_device * rdev,struct radeon_bo * robj)437 bool radeon_fbdev_robj_is_fb(struct radeon_device *rdev, struct radeon_bo *robj)
438 {
439 if (!rdev->mode_info.rfbdev)
440 return false;
441
442 if (robj == gem_to_radeon_bo(rdev->mode_info.rfbdev->rfb.obj))
443 return true;
444 return false;
445 }
446
radeon_fb_add_connector(struct radeon_device * rdev,struct drm_connector * connector)447 void radeon_fb_add_connector(struct radeon_device *rdev, struct drm_connector *connector)
448 {
449 if (rdev->mode_info.rfbdev)
450 drm_fb_helper_add_one_connector(&rdev->mode_info.rfbdev->helper, connector);
451 }
452
radeon_fb_remove_connector(struct radeon_device * rdev,struct drm_connector * connector)453 void radeon_fb_remove_connector(struct radeon_device *rdev, struct drm_connector *connector)
454 {
455 if (rdev->mode_info.rfbdev)
456 drm_fb_helper_remove_one_connector(&rdev->mode_info.rfbdev->helper, connector);
457 }
458