Searched defs:pll_rate (Results 1 – 14 of 14) sorted by relevance
36 struct pll_rate { struct45 static const struct pll_rate freqtbl[] = { argument72 const struct pll_rate *pll_rate = find_rate(lvds_pll->pixclk); in mpd4_lvds_pll_enable() local115 const struct pll_rate *pll_rate = find_rate(rate); in mpd4_lvds_pll_round_rate() local
46 struct pll_rate { struct55 static const struct pll_rate freqtbl[] = { argument376 const struct pll_rate *pll_rate = find_rate(rate); in hdmi_pll_round_rate() local385 const struct pll_rate *pll_rate = find_rate(rate); in hdmi_pll_set_rate() local
72 int pll_rate; in bfin_eval_adau1373_hw_params() local109 unsigned int pll_rate = 48000 * 1024; in bfin_eval_adau1373_codec_init() local
56 int pll_rate; in bfin_eval_adau1x61_hw_params() local
44 int pll_rate; in bfin_eval_adau1x81_hw_params() local
21 unsigned long pll_rate; member
121 const int pll_rate = 73728000; in tegra_asoc_utils_set_ac97_rate() local
329 mt7620_get_cpu_rate(unsigned long pll_rate) in mt7620_get_cpu_rate()353 mt7620_get_dram_rate(unsigned long pll_rate) in mt7620_get_dram_rate()387 unsigned long pll_rate; in ralink_clk_init() local
182 u32 pll_rate, divstatus = readl(PM_DIVSTATUS); in clk_set_rate() local
694 unsigned long pll_rate) in pcm512x_find_pll_coeff()838 unsigned long pll_rate; in pcm512x_set_dividers() local
70 unsigned long prate, int index, unsigned long *pll_rate) in pll_calc_rate()
82 unsigned int pll_rate; /* current rate of Phase Lock Loop */ member
378 long pll_rate = clk_round_rate(pll, target_rate); in cdce925_clk_best_parent_rate() local
1492 static unsigned long pll_rate(void __iomem *reg, unsigned long src_rate, in pll_rate() function