1 /*
2 *
3 * This file is provided under a dual BSD/GPLv2 license. When using or
4 * redistributing this file, you may do so under either license.
5 *
6 * GPL LICENSE SUMMARY
7 *
8 * Copyright(c) 2015 Intel Corporation.
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of version 2 of the GNU General Public License as
12 * published by the Free Software Foundation.
13 *
14 * This program is distributed in the hope that it will be useful, but
15 * WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
17 * General Public License for more details.
18 *
19 * BSD LICENSE
20 *
21 * Copyright(c) 2015 Intel Corporation.
22 *
23 * Redistribution and use in source and binary forms, with or without
24 * modification, are permitted provided that the following conditions
25 * are met:
26 *
27 * - Redistributions of source code must retain the above copyright
28 * notice, this list of conditions and the following disclaimer.
29 * - Redistributions in binary form must reproduce the above copyright
30 * notice, this list of conditions and the following disclaimer in
31 * the documentation and/or other materials provided with the
32 * distribution.
33 * - Neither the name of Intel Corporation nor the names of its
34 * contributors may be used to endorse or promote products derived
35 * from this software without specific prior written permission.
36 *
37 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
38 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
39 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
40 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
41 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
42 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
43 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
44 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
45 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
46 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
47 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
48 *
49 */
50 #define CREATE_TRACE_POINTS
51 #include "trace.h"
52
ibhdr_exhdr_len(struct hfi1_ib_header * hdr)53 u8 ibhdr_exhdr_len(struct hfi1_ib_header *hdr)
54 {
55 struct hfi1_other_headers *ohdr;
56 u8 opcode;
57 u8 lnh = (u8)(be16_to_cpu(hdr->lrh[0]) & 3);
58
59 if (lnh == HFI1_LRH_BTH)
60 ohdr = &hdr->u.oth;
61 else
62 ohdr = &hdr->u.l.oth;
63 opcode = be32_to_cpu(ohdr->bth[0]) >> 24;
64 return hdr_len_by_opcode[opcode] == 0 ?
65 0 : hdr_len_by_opcode[opcode] - (12 + 8);
66 }
67
68 #define IMM_PRN "imm %d"
69 #define RETH_PRN "reth vaddr 0x%.16llx rkey 0x%.8x dlen 0x%.8x"
70 #define AETH_PRN "aeth syn 0x%.2x msn 0x%.8x"
71 #define DETH_PRN "deth qkey 0x%.8x sqpn 0x%.6x"
72 #define ATOMICACKETH_PRN "origdata %lld"
73 #define ATOMICETH_PRN "vaddr 0x%llx rkey 0x%.8x sdata %lld cdata %lld"
74
75 #define OP(transport, op) IB_OPCODE_## transport ## _ ## op
76
ib_u64_get(__be32 * p)77 static u64 ib_u64_get(__be32 *p)
78 {
79 return ((u64)be32_to_cpu(p[0]) << 32) | be32_to_cpu(p[1]);
80 }
81
parse_everbs_hdrs(struct trace_seq * p,u8 opcode,void * ehdrs)82 const char *parse_everbs_hdrs(
83 struct trace_seq *p,
84 u8 opcode,
85 void *ehdrs)
86 {
87 union ib_ehdrs *eh = ehdrs;
88 const char *ret = trace_seq_buffer_ptr(p);
89
90 switch (opcode) {
91 /* imm */
92 case OP(RC, SEND_LAST_WITH_IMMEDIATE):
93 case OP(UC, SEND_LAST_WITH_IMMEDIATE):
94 case OP(RC, SEND_ONLY_WITH_IMMEDIATE):
95 case OP(UC, SEND_ONLY_WITH_IMMEDIATE):
96 case OP(RC, RDMA_WRITE_LAST_WITH_IMMEDIATE):
97 case OP(UC, RDMA_WRITE_LAST_WITH_IMMEDIATE):
98 trace_seq_printf(p, IMM_PRN,
99 be32_to_cpu(eh->imm_data));
100 break;
101 /* reth + imm */
102 case OP(RC, RDMA_WRITE_ONLY_WITH_IMMEDIATE):
103 case OP(UC, RDMA_WRITE_ONLY_WITH_IMMEDIATE):
104 trace_seq_printf(p, RETH_PRN " " IMM_PRN,
105 (unsigned long long)ib_u64_get(
106 (__be32 *)&eh->rc.reth.vaddr),
107 be32_to_cpu(eh->rc.reth.rkey),
108 be32_to_cpu(eh->rc.reth.length),
109 be32_to_cpu(eh->rc.imm_data));
110 break;
111 /* reth */
112 case OP(RC, RDMA_READ_REQUEST):
113 case OP(RC, RDMA_WRITE_FIRST):
114 case OP(UC, RDMA_WRITE_FIRST):
115 case OP(RC, RDMA_WRITE_ONLY):
116 case OP(UC, RDMA_WRITE_ONLY):
117 trace_seq_printf(p, RETH_PRN,
118 (unsigned long long)ib_u64_get(
119 (__be32 *)&eh->rc.reth.vaddr),
120 be32_to_cpu(eh->rc.reth.rkey),
121 be32_to_cpu(eh->rc.reth.length));
122 break;
123 case OP(RC, RDMA_READ_RESPONSE_FIRST):
124 case OP(RC, RDMA_READ_RESPONSE_LAST):
125 case OP(RC, RDMA_READ_RESPONSE_ONLY):
126 case OP(RC, ACKNOWLEDGE):
127 trace_seq_printf(p, AETH_PRN,
128 be32_to_cpu(eh->aeth) >> 24,
129 be32_to_cpu(eh->aeth) & HFI1_MSN_MASK);
130 break;
131 /* aeth + atomicacketh */
132 case OP(RC, ATOMIC_ACKNOWLEDGE):
133 trace_seq_printf(p, AETH_PRN " " ATOMICACKETH_PRN,
134 (be32_to_cpu(eh->at.aeth) >> 24) & 0xff,
135 be32_to_cpu(eh->at.aeth) & HFI1_MSN_MASK,
136 (unsigned long long)ib_u64_get(eh->at.atomic_ack_eth));
137 break;
138 /* atomiceth */
139 case OP(RC, COMPARE_SWAP):
140 case OP(RC, FETCH_ADD):
141 trace_seq_printf(p, ATOMICETH_PRN,
142 (unsigned long long)ib_u64_get(eh->atomic_eth.vaddr),
143 eh->atomic_eth.rkey,
144 (unsigned long long)ib_u64_get(
145 (__be32 *)&eh->atomic_eth.swap_data),
146 (unsigned long long) ib_u64_get(
147 (__be32 *)&eh->atomic_eth.compare_data));
148 break;
149 /* deth */
150 case OP(UD, SEND_ONLY):
151 case OP(UD, SEND_ONLY_WITH_IMMEDIATE):
152 trace_seq_printf(p, DETH_PRN,
153 be32_to_cpu(eh->ud.deth[0]),
154 be32_to_cpu(eh->ud.deth[1]) & HFI1_QPN_MASK);
155 break;
156 }
157 trace_seq_putc(p, 0);
158 return ret;
159 }
160
parse_sdma_flags(struct trace_seq * p,u64 desc0,u64 desc1)161 const char *parse_sdma_flags(
162 struct trace_seq *p,
163 u64 desc0, u64 desc1)
164 {
165 const char *ret = trace_seq_buffer_ptr(p);
166 char flags[5] = { 'x', 'x', 'x', 'x', 0 };
167
168 flags[0] = (desc1 & SDMA_DESC1_INT_REQ_FLAG) ? 'I' : '-';
169 flags[1] = (desc1 & SDMA_DESC1_HEAD_TO_HOST_FLAG) ? 'H' : '-';
170 flags[2] = (desc0 & SDMA_DESC0_FIRST_DESC_FLAG) ? 'F' : '-';
171 flags[3] = (desc0 & SDMA_DESC0_LAST_DESC_FLAG) ? 'L' : '-';
172 trace_seq_printf(p, "%s", flags);
173 if (desc0 & SDMA_DESC0_FIRST_DESC_FLAG)
174 trace_seq_printf(p, " amode:%u aidx:%u alen:%u",
175 (u8)((desc1 >> SDMA_DESC1_HEADER_MODE_SHIFT)
176 & SDMA_DESC1_HEADER_MODE_MASK),
177 (u8)((desc1 >> SDMA_DESC1_HEADER_INDEX_SHIFT)
178 & SDMA_DESC1_HEADER_INDEX_MASK),
179 (u8)((desc1 >> SDMA_DESC1_HEADER_DWS_SHIFT)
180 & SDMA_DESC1_HEADER_DWS_MASK));
181 return ret;
182 }
183
print_u32_array(struct trace_seq * p,u32 * arr,int len)184 const char *print_u32_array(
185 struct trace_seq *p,
186 u32 *arr, int len)
187 {
188 int i;
189 const char *ret = trace_seq_buffer_ptr(p);
190
191 for (i = 0; i < len ; i++)
192 trace_seq_printf(p, "%s%#x", i == 0 ? "" : " ", arr[i]);
193 trace_seq_putc(p, 0);
194 return ret;
195 }
196
print_u64_array(struct trace_seq * p,u64 * arr,int len)197 const char *print_u64_array(
198 struct trace_seq *p,
199 u64 *arr, int len)
200 {
201 int i;
202 const char *ret = trace_seq_buffer_ptr(p);
203
204 for (i = 0; i < len; i++)
205 trace_seq_printf(p, "%s0x%016llx", i == 0 ? "" : " ", arr[i]);
206 trace_seq_putc(p, 0);
207 return ret;
208 }
209
210 __hfi1_trace_fn(PKT);
211 __hfi1_trace_fn(PROC);
212 __hfi1_trace_fn(SDMA);
213 __hfi1_trace_fn(LINKVERB);
214 __hfi1_trace_fn(DEBUG);
215 __hfi1_trace_fn(SNOOP);
216 __hfi1_trace_fn(CNTR);
217 __hfi1_trace_fn(PIO);
218 __hfi1_trace_fn(DC8051);
219 __hfi1_trace_fn(FIRMWARE);
220 __hfi1_trace_fn(RCVCTRL);
221 __hfi1_trace_fn(TID);
222