1 #ifndef _ASM_X86_PGTABLE_DEFS_H
2 #define _ASM_X86_PGTABLE_DEFS_H
3
4 #include <linux/const.h>
5 #include <asm/page_types.h>
6
7 #define FIRST_USER_ADDRESS 0UL
8
9 #define _PAGE_BIT_PRESENT 0 /* is present */
10 #define _PAGE_BIT_RW 1 /* writeable */
11 #define _PAGE_BIT_USER 2 /* userspace addressable */
12 #define _PAGE_BIT_PWT 3 /* page write through */
13 #define _PAGE_BIT_PCD 4 /* page cache disabled */
14 #define _PAGE_BIT_ACCESSED 5 /* was accessed (raised by CPU) */
15 #define _PAGE_BIT_DIRTY 6 /* was written to (raised by CPU) */
16 #define _PAGE_BIT_PSE 7 /* 4 MB (or 2MB) page */
17 #define _PAGE_BIT_PAT 7 /* on 4KB pages */
18 #define _PAGE_BIT_GLOBAL 8 /* Global TLB entry PPro+ */
19 #define _PAGE_BIT_SOFTW1 9 /* available for programmer */
20 #define _PAGE_BIT_SOFTW2 10 /* " */
21 #define _PAGE_BIT_SOFTW3 11 /* " */
22 #define _PAGE_BIT_PAT_LARGE 12 /* On 2MB or 1GB pages */
23 #define _PAGE_BIT_SPECIAL _PAGE_BIT_SOFTW1
24 #define _PAGE_BIT_CPA_TEST _PAGE_BIT_SOFTW1
25 #define _PAGE_BIT_SPLITTING _PAGE_BIT_SOFTW2 /* only valid on a PSE pmd */
26 #define _PAGE_BIT_HIDDEN _PAGE_BIT_SOFTW3 /* hidden by kmemcheck */
27 #define _PAGE_BIT_SOFT_DIRTY _PAGE_BIT_SOFTW3 /* software dirty tracking */
28 #define _PAGE_BIT_NX 63 /* No execute: only valid after cpuid check */
29
30 /* If _PAGE_BIT_PRESENT is clear, we use these: */
31 /* - if the user mapped it with PROT_NONE; pte_present gives true */
32 #define _PAGE_BIT_PROTNONE _PAGE_BIT_GLOBAL
33
34 #define _PAGE_PRESENT (_AT(pteval_t, 1) << _PAGE_BIT_PRESENT)
35 #define _PAGE_RW (_AT(pteval_t, 1) << _PAGE_BIT_RW)
36 #define _PAGE_USER (_AT(pteval_t, 1) << _PAGE_BIT_USER)
37 #define _PAGE_PWT (_AT(pteval_t, 1) << _PAGE_BIT_PWT)
38 #define _PAGE_PCD (_AT(pteval_t, 1) << _PAGE_BIT_PCD)
39 #define _PAGE_ACCESSED (_AT(pteval_t, 1) << _PAGE_BIT_ACCESSED)
40 #define _PAGE_DIRTY (_AT(pteval_t, 1) << _PAGE_BIT_DIRTY)
41 #define _PAGE_PSE (_AT(pteval_t, 1) << _PAGE_BIT_PSE)
42 #define _PAGE_GLOBAL (_AT(pteval_t, 1) << _PAGE_BIT_GLOBAL)
43 #define _PAGE_SOFTW1 (_AT(pteval_t, 1) << _PAGE_BIT_SOFTW1)
44 #define _PAGE_SOFTW2 (_AT(pteval_t, 1) << _PAGE_BIT_SOFTW2)
45 #define _PAGE_PAT (_AT(pteval_t, 1) << _PAGE_BIT_PAT)
46 #define _PAGE_PAT_LARGE (_AT(pteval_t, 1) << _PAGE_BIT_PAT_LARGE)
47 #define _PAGE_SPECIAL (_AT(pteval_t, 1) << _PAGE_BIT_SPECIAL)
48 #define _PAGE_CPA_TEST (_AT(pteval_t, 1) << _PAGE_BIT_CPA_TEST)
49 #define _PAGE_SPLITTING (_AT(pteval_t, 1) << _PAGE_BIT_SPLITTING)
50 #define __HAVE_ARCH_PTE_SPECIAL
51
52 #ifdef CONFIG_KMEMCHECK
53 #define _PAGE_HIDDEN (_AT(pteval_t, 1) << _PAGE_BIT_HIDDEN)
54 #else
55 #define _PAGE_HIDDEN (_AT(pteval_t, 0))
56 #endif
57
58 /*
59 * The same hidden bit is used by kmemcheck, but since kmemcheck
60 * works on kernel pages while soft-dirty engine on user space,
61 * they do not conflict with each other.
62 */
63
64 #ifdef CONFIG_MEM_SOFT_DIRTY
65 #define _PAGE_SOFT_DIRTY (_AT(pteval_t, 1) << _PAGE_BIT_SOFT_DIRTY)
66 #else
67 #define _PAGE_SOFT_DIRTY (_AT(pteval_t, 0))
68 #endif
69
70 /*
71 * Tracking soft dirty bit when a page goes to a swap is tricky.
72 * We need a bit which can be stored in pte _and_ not conflict
73 * with swap entry format. On x86 bits 6 and 7 are *not* involved
74 * into swap entry computation, but bit 6 is used for nonlinear
75 * file mapping, so we borrow bit 7 for soft dirty tracking.
76 *
77 * Please note that this bit must be treated as swap dirty page
78 * mark if and only if the PTE has present bit clear!
79 */
80 #ifdef CONFIG_MEM_SOFT_DIRTY
81 #define _PAGE_SWP_SOFT_DIRTY _PAGE_PSE
82 #else
83 #define _PAGE_SWP_SOFT_DIRTY (_AT(pteval_t, 0))
84 #endif
85
86 #if defined(CONFIG_X86_64) || defined(CONFIG_X86_PAE)
87 #define _PAGE_NX (_AT(pteval_t, 1) << _PAGE_BIT_NX)
88 #else
89 #define _PAGE_NX (_AT(pteval_t, 0))
90 #endif
91
92 #define _PAGE_PROTNONE (_AT(pteval_t, 1) << _PAGE_BIT_PROTNONE)
93
94 #define _PAGE_TABLE (_PAGE_PRESENT | _PAGE_RW | _PAGE_USER | \
95 _PAGE_ACCESSED | _PAGE_DIRTY)
96 #define _KERNPG_TABLE (_PAGE_PRESENT | _PAGE_RW | _PAGE_ACCESSED | \
97 _PAGE_DIRTY)
98
99 /* Set of bits not changed in pte_modify */
100 #define _PAGE_CHG_MASK (PTE_PFN_MASK | _PAGE_PCD | _PAGE_PWT | \
101 _PAGE_SPECIAL | _PAGE_ACCESSED | _PAGE_DIRTY | \
102 _PAGE_SOFT_DIRTY)
103 #define _HPAGE_CHG_MASK (_PAGE_CHG_MASK | _PAGE_PSE)
104
105 /*
106 * The cache modes defined here are used to translate between pure SW usage
107 * and the HW defined cache mode bits and/or PAT entries.
108 *
109 * The resulting bits for PWT, PCD and PAT should be chosen in a way
110 * to have the WB mode at index 0 (all bits clear). This is the default
111 * right now and likely would break too much if changed.
112 */
113 #ifndef __ASSEMBLY__
114 enum page_cache_mode {
115 _PAGE_CACHE_MODE_WB = 0,
116 _PAGE_CACHE_MODE_WC = 1,
117 _PAGE_CACHE_MODE_UC_MINUS = 2,
118 _PAGE_CACHE_MODE_UC = 3,
119 _PAGE_CACHE_MODE_WT = 4,
120 _PAGE_CACHE_MODE_WP = 5,
121 _PAGE_CACHE_MODE_NUM = 8
122 };
123 #endif
124
125 #define _PAGE_CACHE_MASK (_PAGE_PAT | _PAGE_PCD | _PAGE_PWT)
126 #define _PAGE_NOCACHE (cachemode2protval(_PAGE_CACHE_MODE_UC))
127
128 #define PAGE_NONE __pgprot(_PAGE_PROTNONE | _PAGE_ACCESSED)
129 #define PAGE_SHARED __pgprot(_PAGE_PRESENT | _PAGE_RW | _PAGE_USER | \
130 _PAGE_ACCESSED | _PAGE_NX)
131
132 #define PAGE_SHARED_EXEC __pgprot(_PAGE_PRESENT | _PAGE_RW | \
133 _PAGE_USER | _PAGE_ACCESSED)
134 #define PAGE_COPY_NOEXEC __pgprot(_PAGE_PRESENT | _PAGE_USER | \
135 _PAGE_ACCESSED | _PAGE_NX)
136 #define PAGE_COPY_EXEC __pgprot(_PAGE_PRESENT | _PAGE_USER | \
137 _PAGE_ACCESSED)
138 #define PAGE_COPY PAGE_COPY_NOEXEC
139 #define PAGE_READONLY __pgprot(_PAGE_PRESENT | _PAGE_USER | \
140 _PAGE_ACCESSED | _PAGE_NX)
141 #define PAGE_READONLY_EXEC __pgprot(_PAGE_PRESENT | _PAGE_USER | \
142 _PAGE_ACCESSED)
143
144 #define __PAGE_KERNEL_EXEC \
145 (_PAGE_PRESENT | _PAGE_RW | _PAGE_DIRTY | _PAGE_ACCESSED | _PAGE_GLOBAL)
146 #define __PAGE_KERNEL (__PAGE_KERNEL_EXEC | _PAGE_NX)
147
148 #define __PAGE_KERNEL_RO (__PAGE_KERNEL & ~_PAGE_RW)
149 #define __PAGE_KERNEL_RX (__PAGE_KERNEL_EXEC & ~_PAGE_RW)
150 #define __PAGE_KERNEL_NOCACHE (__PAGE_KERNEL | _PAGE_NOCACHE)
151 #define __PAGE_KERNEL_VSYSCALL (__PAGE_KERNEL_RX | _PAGE_USER)
152 #define __PAGE_KERNEL_VVAR (__PAGE_KERNEL_RO | _PAGE_USER)
153 #define __PAGE_KERNEL_LARGE (__PAGE_KERNEL | _PAGE_PSE)
154 #define __PAGE_KERNEL_LARGE_EXEC (__PAGE_KERNEL_EXEC | _PAGE_PSE)
155
156 #define __PAGE_KERNEL_IO (__PAGE_KERNEL)
157 #define __PAGE_KERNEL_IO_NOCACHE (__PAGE_KERNEL_NOCACHE)
158
159 #define PAGE_KERNEL __pgprot(__PAGE_KERNEL)
160 #define PAGE_KERNEL_RO __pgprot(__PAGE_KERNEL_RO)
161 #define PAGE_KERNEL_EXEC __pgprot(__PAGE_KERNEL_EXEC)
162 #define PAGE_KERNEL_RX __pgprot(__PAGE_KERNEL_RX)
163 #define PAGE_KERNEL_NOCACHE __pgprot(__PAGE_KERNEL_NOCACHE)
164 #define PAGE_KERNEL_LARGE __pgprot(__PAGE_KERNEL_LARGE)
165 #define PAGE_KERNEL_LARGE_EXEC __pgprot(__PAGE_KERNEL_LARGE_EXEC)
166 #define PAGE_KERNEL_VSYSCALL __pgprot(__PAGE_KERNEL_VSYSCALL)
167 #define PAGE_KERNEL_VVAR __pgprot(__PAGE_KERNEL_VVAR)
168
169 #define PAGE_KERNEL_IO __pgprot(__PAGE_KERNEL_IO)
170 #define PAGE_KERNEL_IO_NOCACHE __pgprot(__PAGE_KERNEL_IO_NOCACHE)
171
172 /* xwr */
173 #define __P000 PAGE_NONE
174 #define __P001 PAGE_READONLY
175 #define __P010 PAGE_COPY
176 #define __P011 PAGE_COPY
177 #define __P100 PAGE_READONLY_EXEC
178 #define __P101 PAGE_READONLY_EXEC
179 #define __P110 PAGE_COPY_EXEC
180 #define __P111 PAGE_COPY_EXEC
181
182 #define __S000 PAGE_NONE
183 #define __S001 PAGE_READONLY
184 #define __S010 PAGE_SHARED
185 #define __S011 PAGE_SHARED
186 #define __S100 PAGE_READONLY_EXEC
187 #define __S101 PAGE_READONLY_EXEC
188 #define __S110 PAGE_SHARED_EXEC
189 #define __S111 PAGE_SHARED_EXEC
190
191 /*
192 * early identity mapping pte attrib macros.
193 */
194 #ifdef CONFIG_X86_64
195 #define __PAGE_KERNEL_IDENT_LARGE_EXEC __PAGE_KERNEL_LARGE_EXEC
196 #else
197 #define PTE_IDENT_ATTR 0x003 /* PRESENT+RW */
198 #define PDE_IDENT_ATTR 0x063 /* PRESENT+RW+DIRTY+ACCESSED */
199 #define PGD_IDENT_ATTR 0x001 /* PRESENT (no other attributes) */
200 #endif
201
202 #ifdef CONFIG_X86_32
203 # include <asm/pgtable_32_types.h>
204 #else
205 # include <asm/pgtable_64_types.h>
206 #endif
207
208 #ifndef __ASSEMBLY__
209
210 #include <linux/types.h>
211
212 /* PTE_PFN_MASK extracts the PFN from a (pte|pmd|pud|pgd)val_t */
213 #define PTE_PFN_MASK ((pteval_t)PHYSICAL_PAGE_MASK)
214
215 /* PTE_FLAGS_MASK extracts the flags from a (pte|pmd|pud|pgd)val_t */
216 #define PTE_FLAGS_MASK (~PTE_PFN_MASK)
217
218 typedef struct pgprot { pgprotval_t pgprot; } pgprot_t;
219
220 typedef struct { pgdval_t pgd; } pgd_t;
221
native_make_pgd(pgdval_t val)222 static inline pgd_t native_make_pgd(pgdval_t val)
223 {
224 return (pgd_t) { val };
225 }
226
native_pgd_val(pgd_t pgd)227 static inline pgdval_t native_pgd_val(pgd_t pgd)
228 {
229 return pgd.pgd;
230 }
231
pgd_flags(pgd_t pgd)232 static inline pgdval_t pgd_flags(pgd_t pgd)
233 {
234 return native_pgd_val(pgd) & PTE_FLAGS_MASK;
235 }
236
237 #if CONFIG_PGTABLE_LEVELS > 3
238 typedef struct { pudval_t pud; } pud_t;
239
native_make_pud(pmdval_t val)240 static inline pud_t native_make_pud(pmdval_t val)
241 {
242 return (pud_t) { val };
243 }
244
native_pud_val(pud_t pud)245 static inline pudval_t native_pud_val(pud_t pud)
246 {
247 return pud.pud;
248 }
249 #else
250 #include <asm-generic/pgtable-nopud.h>
251
native_pud_val(pud_t pud)252 static inline pudval_t native_pud_val(pud_t pud)
253 {
254 return native_pgd_val(pud.pgd);
255 }
256 #endif
257
258 #if CONFIG_PGTABLE_LEVELS > 2
259 typedef struct { pmdval_t pmd; } pmd_t;
260
native_make_pmd(pmdval_t val)261 static inline pmd_t native_make_pmd(pmdval_t val)
262 {
263 return (pmd_t) { val };
264 }
265
native_pmd_val(pmd_t pmd)266 static inline pmdval_t native_pmd_val(pmd_t pmd)
267 {
268 return pmd.pmd;
269 }
270 #else
271 #include <asm-generic/pgtable-nopmd.h>
272
native_pmd_val(pmd_t pmd)273 static inline pmdval_t native_pmd_val(pmd_t pmd)
274 {
275 return native_pgd_val(pmd.pud.pgd);
276 }
277 #endif
278
pud_flags(pud_t pud)279 static inline pudval_t pud_flags(pud_t pud)
280 {
281 return native_pud_val(pud) & PTE_FLAGS_MASK;
282 }
283
pmd_flags(pmd_t pmd)284 static inline pmdval_t pmd_flags(pmd_t pmd)
285 {
286 return native_pmd_val(pmd) & PTE_FLAGS_MASK;
287 }
288
native_make_pte(pteval_t val)289 static inline pte_t native_make_pte(pteval_t val)
290 {
291 return (pte_t) { .pte = val };
292 }
293
native_pte_val(pte_t pte)294 static inline pteval_t native_pte_val(pte_t pte)
295 {
296 return pte.pte;
297 }
298
pte_flags(pte_t pte)299 static inline pteval_t pte_flags(pte_t pte)
300 {
301 return native_pte_val(pte) & PTE_FLAGS_MASK;
302 }
303
304 #define pgprot_val(x) ((x).pgprot)
305 #define __pgprot(x) ((pgprot_t) { (x) } )
306
307 extern uint16_t __cachemode2pte_tbl[_PAGE_CACHE_MODE_NUM];
308 extern uint8_t __pte2cachemode_tbl[8];
309
310 #define __pte2cm_idx(cb) \
311 ((((cb) >> (_PAGE_BIT_PAT - 2)) & 4) | \
312 (((cb) >> (_PAGE_BIT_PCD - 1)) & 2) | \
313 (((cb) >> _PAGE_BIT_PWT) & 1))
314 #define __cm_idx2pte(i) \
315 ((((i) & 4) << (_PAGE_BIT_PAT - 2)) | \
316 (((i) & 2) << (_PAGE_BIT_PCD - 1)) | \
317 (((i) & 1) << _PAGE_BIT_PWT))
318
cachemode2protval(enum page_cache_mode pcm)319 static inline unsigned long cachemode2protval(enum page_cache_mode pcm)
320 {
321 if (likely(pcm == 0))
322 return 0;
323 return __cachemode2pte_tbl[pcm];
324 }
cachemode2pgprot(enum page_cache_mode pcm)325 static inline pgprot_t cachemode2pgprot(enum page_cache_mode pcm)
326 {
327 return __pgprot(cachemode2protval(pcm));
328 }
pgprot2cachemode(pgprot_t pgprot)329 static inline enum page_cache_mode pgprot2cachemode(pgprot_t pgprot)
330 {
331 unsigned long masked;
332
333 masked = pgprot_val(pgprot) & _PAGE_CACHE_MASK;
334 if (likely(masked == 0))
335 return 0;
336 return __pte2cachemode_tbl[__pte2cm_idx(masked)];
337 }
pgprot_4k_2_large(pgprot_t pgprot)338 static inline pgprot_t pgprot_4k_2_large(pgprot_t pgprot)
339 {
340 pgprotval_t val = pgprot_val(pgprot);
341 pgprot_t new;
342
343 pgprot_val(new) = (val & ~(_PAGE_PAT | _PAGE_PAT_LARGE)) |
344 ((val & _PAGE_PAT) << (_PAGE_BIT_PAT_LARGE - _PAGE_BIT_PAT));
345 return new;
346 }
pgprot_large_2_4k(pgprot_t pgprot)347 static inline pgprot_t pgprot_large_2_4k(pgprot_t pgprot)
348 {
349 pgprotval_t val = pgprot_val(pgprot);
350 pgprot_t new;
351
352 pgprot_val(new) = (val & ~(_PAGE_PAT | _PAGE_PAT_LARGE)) |
353 ((val & _PAGE_PAT_LARGE) >>
354 (_PAGE_BIT_PAT_LARGE - _PAGE_BIT_PAT));
355 return new;
356 }
357
358
359 typedef struct page *pgtable_t;
360
361 extern pteval_t __supported_pte_mask;
362 extern void set_nx(void);
363 extern int nx_enabled;
364
365 #define pgprot_writecombine pgprot_writecombine
366 extern pgprot_t pgprot_writecombine(pgprot_t prot);
367
368 /* Indicate that x86 has its own track and untrack pfn vma functions */
369 #define __HAVE_PFNMAP_TRACKING
370
371 #define __HAVE_PHYS_MEM_ACCESS_PROT
372 struct file;
373 pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn,
374 unsigned long size, pgprot_t vma_prot);
375 int phys_mem_access_prot_allowed(struct file *file, unsigned long pfn,
376 unsigned long size, pgprot_t *vma_prot);
377
378 /* Install a pte for a particular vaddr in kernel space. */
379 void set_pte_vaddr(unsigned long vaddr, pte_t pte);
380
381 #ifdef CONFIG_X86_32
382 extern void native_pagetable_init(void);
383 #else
384 #define native_pagetable_init paging_init
385 #endif
386
387 struct seq_file;
388 extern void arch_report_meminfo(struct seq_file *m);
389
390 enum pg_level {
391 PG_LEVEL_NONE,
392 PG_LEVEL_4K,
393 PG_LEVEL_2M,
394 PG_LEVEL_1G,
395 PG_LEVEL_NUM
396 };
397
398 #ifdef CONFIG_PROC_FS
399 extern void update_page_count(int level, unsigned long pages);
400 #else
update_page_count(int level,unsigned long pages)401 static inline void update_page_count(int level, unsigned long pages) { }
402 #endif
403
404 /*
405 * Helper function that returns the kernel pagetable entry controlling
406 * the virtual address 'address'. NULL means no pagetable entry present.
407 * NOTE: the return type is pte_t but if the pmd is PSE then we return it
408 * as a pte too.
409 */
410 extern pte_t *lookup_address(unsigned long address, unsigned int *level);
411 extern pte_t *lookup_address_in_pgd(pgd_t *pgd, unsigned long address,
412 unsigned int *level);
413 extern pmd_t *lookup_pmd_address(unsigned long address);
414 extern phys_addr_t slow_virt_to_phys(void *__address);
415 extern int kernel_map_pages_in_pgd(pgd_t *pgd, u64 pfn, unsigned long address,
416 unsigned numpages, unsigned long page_flags);
417 void kernel_unmap_pages_in_pgd(pgd_t *root, unsigned long address,
418 unsigned numpages);
419 #endif /* !__ASSEMBLY__ */
420
421 #endif /* _ASM_X86_PGTABLE_DEFS_H */
422