1 /******************************************************************************
2  *
3  * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
4  *
5  * This program is free software; you can redistribute it and/or modify it
6  * under the terms of version 2 of the GNU General Public License as
7  * published by the Free Software Foundation.
8  *
9  * This program is distributed in the hope that it will be useful, but WITHOUT
10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12  * more details.
13  *
14  ******************************************************************************/
15 
16 #include "odm_precomp.h"
17 #include "usb_ops_linux.h"
18 
19 void
odm_ConfigRFReg_8723A(struct dm_odm_t * pDM_Odm,u32 Addr,u32 Data,enum RF_RADIO_PATH RF_PATH,u32 RegAddr)20 odm_ConfigRFReg_8723A(
21 	struct dm_odm_t *pDM_Odm,
22 	u32					Addr,
23 	u32					Data,
24 	enum RF_RADIO_PATH     RF_PATH,
25 	u32				    RegAddr
26 	)
27 {
28 	if (Addr == 0xfe) {
29 		msleep(50);
30 	} else if (Addr == 0xfd) {
31 		mdelay(5);
32 	} else if (Addr == 0xfc) {
33 		mdelay(1);
34 	} else if (Addr == 0xfb) {
35 		udelay(50);
36 	} else if (Addr == 0xfa) {
37 		udelay(5);
38 	} else if (Addr == 0xf9) {
39 		udelay(1);
40 	} else {
41 		ODM_SetRFReg(pDM_Odm, RF_PATH, RegAddr, bRFRegOffsetMask, Data);
42 		/*  Add 1us delay between BB/RF register setting. */
43 		udelay(1);
44 	}
45 }
46 
odm_ConfigMAC_8723A(struct dm_odm_t * pDM_Odm,u32 addr,u8 data)47 void odm_ConfigMAC_8723A(struct dm_odm_t *pDM_Odm, u32 addr, u8	data)
48 {
49 	rtl8723au_write8(pDM_Odm->Adapter, addr, data);
50 	ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD,
51 		     ("===> %s: [MAC_REG] %08X %08X\n", __func__, addr, data));
52 }
53 
odm_ConfigBB_AGC_8723A(struct dm_odm_t * pDM_Odm,u32 addr,u32 data)54 void odm_ConfigBB_AGC_8723A(struct dm_odm_t *pDM_Odm, u32 addr, u32 data)
55 {
56 	rtl8723au_write32(pDM_Odm->Adapter, addr, data);
57 	/*  Add 1us delay between BB/RF register setting. */
58 	udelay(1);
59 
60 	ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD,
61 		     ("===> %s: [AGC_TAB] %08X %08X\n", __func__, addr, data));
62 }
63 
64 void
odm_ConfigBB_PHY_8723A(struct dm_odm_t * pDM_Odm,u32 addr,u32 data)65 odm_ConfigBB_PHY_8723A(struct dm_odm_t *pDM_Odm, u32 addr, u32 data)
66 {
67 	if (addr == 0xfe)
68 		msleep(50);
69 	else if (addr == 0xfd)
70 		mdelay(5);
71 	else if (addr == 0xfc)
72 		mdelay(1);
73 	else if (addr == 0xfb)
74 		udelay(50);
75 	else if (addr == 0xfa)
76 		udelay(5);
77 	else if (addr == 0xf9)
78 		udelay(1);
79 	else if (addr == 0xa24)
80 		pDM_Odm->RFCalibrateInfo.RegA24 = data;
81 	rtl8723au_write32(pDM_Odm->Adapter, addr, data);
82 
83 	/*  Add 1us delay between BB/RF register setting. */
84 	udelay(1);
85 
86 	ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD,
87 		     ("===> %s: [PHY_REG] %08X %08X\n", __func__, addr, data));
88 }
89