1 /*
2 * Copyright 2015 Red Hat Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 * Authors: Ben Skeggs <bskeggs@redhat.com>
23 */
24 #include "priv.h"
25 #include "agp.h"
26
27 #include <core/option.h>
28 #include <core/pci.h>
29 #include <subdev/mc.h>
30
31 u32
nvkm_pci_rd32(struct nvkm_pci * pci,u16 addr)32 nvkm_pci_rd32(struct nvkm_pci *pci, u16 addr)
33 {
34 return pci->func->rd32(pci, addr);
35 }
36
37 void
nvkm_pci_wr08(struct nvkm_pci * pci,u16 addr,u8 data)38 nvkm_pci_wr08(struct nvkm_pci *pci, u16 addr, u8 data)
39 {
40 pci->func->wr08(pci, addr, data);
41 }
42
43 void
nvkm_pci_wr32(struct nvkm_pci * pci,u16 addr,u32 data)44 nvkm_pci_wr32(struct nvkm_pci *pci, u16 addr, u32 data)
45 {
46 pci->func->wr32(pci, addr, data);
47 }
48
49 u32
nvkm_pci_mask(struct nvkm_pci * pci,u16 addr,u32 mask,u32 value)50 nvkm_pci_mask(struct nvkm_pci *pci, u16 addr, u32 mask, u32 value)
51 {
52 u32 data = pci->func->rd32(pci, addr);
53 pci->func->wr32(pci, addr, (data & ~mask) | value);
54 return data;
55 }
56
57 void
nvkm_pci_rom_shadow(struct nvkm_pci * pci,bool shadow)58 nvkm_pci_rom_shadow(struct nvkm_pci *pci, bool shadow)
59 {
60 u32 data = nvkm_pci_rd32(pci, 0x0050);
61 if (shadow)
62 data |= 0x00000001;
63 else
64 data &= ~0x00000001;
65 nvkm_pci_wr32(pci, 0x0050, data);
66 }
67
68 static irqreturn_t
nvkm_pci_intr(int irq,void * arg)69 nvkm_pci_intr(int irq, void *arg)
70 {
71 struct nvkm_pci *pci = arg;
72 struct nvkm_mc *mc = pci->subdev.device->mc;
73 bool handled = false;
74 if (likely(mc)) {
75 nvkm_mc_intr_unarm(mc);
76 if (pci->msi)
77 pci->func->msi_rearm(pci);
78 nvkm_mc_intr(mc, &handled);
79 nvkm_mc_intr_rearm(mc);
80 }
81 return handled ? IRQ_HANDLED : IRQ_NONE;
82 }
83
84 static int
nvkm_pci_fini(struct nvkm_subdev * subdev,bool suspend)85 nvkm_pci_fini(struct nvkm_subdev *subdev, bool suspend)
86 {
87 struct nvkm_pci *pci = nvkm_pci(subdev);
88
89 if (pci->irq >= 0) {
90 free_irq(pci->irq, pci);
91 pci->irq = -1;
92 };
93
94 if (pci->agp.bridge)
95 nvkm_agp_fini(pci);
96
97 return 0;
98 }
99
100 static int
nvkm_pci_preinit(struct nvkm_subdev * subdev)101 nvkm_pci_preinit(struct nvkm_subdev *subdev)
102 {
103 struct nvkm_pci *pci = nvkm_pci(subdev);
104 if (pci->agp.bridge)
105 nvkm_agp_preinit(pci);
106 return 0;
107 }
108
109 static int
nvkm_pci_init(struct nvkm_subdev * subdev)110 nvkm_pci_init(struct nvkm_subdev *subdev)
111 {
112 struct nvkm_pci *pci = nvkm_pci(subdev);
113 struct pci_dev *pdev = pci->pdev;
114 int ret;
115
116 if (pci->agp.bridge) {
117 ret = nvkm_agp_init(pci);
118 if (ret)
119 return ret;
120 }
121
122 if (pci->func->init)
123 pci->func->init(pci);
124
125 ret = request_irq(pdev->irq, nvkm_pci_intr, IRQF_SHARED, "nvkm", pci);
126 if (ret)
127 return ret;
128
129 pci->irq = pdev->irq;
130 return ret;
131 }
132
133 static void *
nvkm_pci_dtor(struct nvkm_subdev * subdev)134 nvkm_pci_dtor(struct nvkm_subdev *subdev)
135 {
136 struct nvkm_pci *pci = nvkm_pci(subdev);
137 nvkm_agp_dtor(pci);
138 if (pci->msi)
139 pci_disable_msi(pci->pdev);
140 return nvkm_pci(subdev);
141 }
142
143 static const struct nvkm_subdev_func
144 nvkm_pci_func = {
145 .dtor = nvkm_pci_dtor,
146 .preinit = nvkm_pci_preinit,
147 .init = nvkm_pci_init,
148 .fini = nvkm_pci_fini,
149 };
150
151 int
nvkm_pci_new_(const struct nvkm_pci_func * func,struct nvkm_device * device,int index,struct nvkm_pci ** ppci)152 nvkm_pci_new_(const struct nvkm_pci_func *func, struct nvkm_device *device,
153 int index, struct nvkm_pci **ppci)
154 {
155 struct nvkm_pci *pci;
156
157 if (!(pci = *ppci = kzalloc(sizeof(**ppci), GFP_KERNEL)))
158 return -ENOMEM;
159 nvkm_subdev_ctor(&nvkm_pci_func, device, index, 0, &pci->subdev);
160 pci->func = func;
161 pci->pdev = device->func->pci(device)->pdev;
162 pci->irq = -1;
163
164 if (device->type == NVKM_DEVICE_AGP)
165 nvkm_agp_ctor(pci);
166
167 switch (pci->pdev->device & 0x0ff0) {
168 case 0x00f0:
169 case 0x02e0:
170 /* BR02? NFI how these would be handled yet exactly */
171 break;
172 default:
173 switch (device->chipset) {
174 case 0xaa:
175 /* reported broken, nv also disable it */
176 break;
177 default:
178 pci->msi = true;
179 break;
180 }
181 }
182
183 pci->msi = nvkm_boolopt(device->cfgopt, "NvMSI", pci->msi);
184 if (pci->msi && func->msi_rearm) {
185 pci->msi = pci_enable_msi(pci->pdev) == 0;
186 if (pci->msi)
187 nvkm_debug(&pci->subdev, "MSI enabled\n");
188 } else {
189 pci->msi = false;
190 }
191
192 return 0;
193 }
194