1 /*
2 * Copyright 2012 Red Hat Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 * Authors: Ben Skeggs
23 */
24 #include <subdev/vga.h>
25
26 #include <core/device.h>
27
28 u8
nv_rdport(void * obj,int head,u16 port)29 nv_rdport(void *obj, int head, u16 port)
30 {
31 struct nvkm_device *device = nv_device(obj);
32
33 if (device->card_type >= NV_50)
34 return nv_rd08(obj, 0x601000 + port);
35
36 if (port == 0x03c0 || port == 0x03c1 || /* AR */
37 port == 0x03c2 || port == 0x03da || /* INP0 */
38 port == 0x03d4 || port == 0x03d5) /* CR */
39 return nv_rd08(obj, 0x601000 + (head * 0x2000) + port);
40
41 if (port == 0x03c2 || port == 0x03cc || /* MISC */
42 port == 0x03c4 || port == 0x03c5 || /* SR */
43 port == 0x03ce || port == 0x03cf) { /* GR */
44 if (device->card_type < NV_40)
45 head = 0; /* CR44 selects head */
46 return nv_rd08(obj, 0x0c0000 + (head * 0x2000) + port);
47 }
48
49 nv_error(obj, "unknown vga port 0x%04x\n", port);
50 return 0x00;
51 }
52
53 void
nv_wrport(void * obj,int head,u16 port,u8 data)54 nv_wrport(void *obj, int head, u16 port, u8 data)
55 {
56 struct nvkm_device *device = nv_device(obj);
57
58 if (device->card_type >= NV_50)
59 nv_wr08(obj, 0x601000 + port, data);
60 else
61 if (port == 0x03c0 || port == 0x03c1 || /* AR */
62 port == 0x03c2 || port == 0x03da || /* INP0 */
63 port == 0x03d4 || port == 0x03d5) /* CR */
64 nv_wr08(obj, 0x601000 + (head * 0x2000) + port, data);
65 else
66 if (port == 0x03c2 || port == 0x03cc || /* MISC */
67 port == 0x03c4 || port == 0x03c5 || /* SR */
68 port == 0x03ce || port == 0x03cf) { /* GR */
69 if (device->card_type < NV_40)
70 head = 0; /* CR44 selects head */
71 nv_wr08(obj, 0x0c0000 + (head * 0x2000) + port, data);
72 } else
73 nv_error(obj, "unknown vga port 0x%04x\n", port);
74 }
75
76 u8
nv_rdvgas(void * obj,int head,u8 index)77 nv_rdvgas(void *obj, int head, u8 index)
78 {
79 nv_wrport(obj, head, 0x03c4, index);
80 return nv_rdport(obj, head, 0x03c5);
81 }
82
83 void
nv_wrvgas(void * obj,int head,u8 index,u8 value)84 nv_wrvgas(void *obj, int head, u8 index, u8 value)
85 {
86 nv_wrport(obj, head, 0x03c4, index);
87 nv_wrport(obj, head, 0x03c5, value);
88 }
89
90 u8
nv_rdvgag(void * obj,int head,u8 index)91 nv_rdvgag(void *obj, int head, u8 index)
92 {
93 nv_wrport(obj, head, 0x03ce, index);
94 return nv_rdport(obj, head, 0x03cf);
95 }
96
97 void
nv_wrvgag(void * obj,int head,u8 index,u8 value)98 nv_wrvgag(void *obj, int head, u8 index, u8 value)
99 {
100 nv_wrport(obj, head, 0x03ce, index);
101 nv_wrport(obj, head, 0x03cf, value);
102 }
103
104 u8
nv_rdvgac(void * obj,int head,u8 index)105 nv_rdvgac(void *obj, int head, u8 index)
106 {
107 nv_wrport(obj, head, 0x03d4, index);
108 return nv_rdport(obj, head, 0x03d5);
109 }
110
111 void
nv_wrvgac(void * obj,int head,u8 index,u8 value)112 nv_wrvgac(void *obj, int head, u8 index, u8 value)
113 {
114 nv_wrport(obj, head, 0x03d4, index);
115 nv_wrport(obj, head, 0x03d5, value);
116 }
117
118 u8
nv_rdvgai(void * obj,int head,u16 port,u8 index)119 nv_rdvgai(void *obj, int head, u16 port, u8 index)
120 {
121 if (port == 0x03c4) return nv_rdvgas(obj, head, index);
122 if (port == 0x03ce) return nv_rdvgag(obj, head, index);
123 if (port == 0x03d4) return nv_rdvgac(obj, head, index);
124 nv_error(obj, "unknown indexed vga port 0x%04x\n", port);
125 return 0x00;
126 }
127
128 void
nv_wrvgai(void * obj,int head,u16 port,u8 index,u8 value)129 nv_wrvgai(void *obj, int head, u16 port, u8 index, u8 value)
130 {
131 if (port == 0x03c4) nv_wrvgas(obj, head, index, value);
132 else if (port == 0x03ce) nv_wrvgag(obj, head, index, value);
133 else if (port == 0x03d4) nv_wrvgac(obj, head, index, value);
134 else nv_error(obj, "unknown indexed vga port 0x%04x\n", port);
135 }
136
137 bool
nv_lockvgac(void * obj,bool lock)138 nv_lockvgac(void *obj, bool lock)
139 {
140 struct nvkm_device *dev = nv_device(obj);
141
142 bool locked = !nv_rdvgac(obj, 0, 0x1f);
143 u8 data = lock ? 0x99 : 0x57;
144 if (dev->card_type < NV_50)
145 nv_wrvgac(obj, 0, 0x1f, data);
146 else
147 nv_wrvgac(obj, 0, 0x3f, data);
148 if (dev->chipset == 0x11) {
149 if (!(nv_rd32(obj, 0x001084) & 0x10000000))
150 nv_wrvgac(obj, 1, 0x1f, data);
151 }
152 return locked;
153 }
154
155 /* CR44 takes values 0 (head A), 3 (head B) and 4 (heads tied)
156 * it affects only the 8 bit vga io regs, which we access using mmio at
157 * 0xc{0,2}3c*, 0x60{1,3}3*, and 0x68{1,3}3d*
158 * in general, the set value of cr44 does not matter: reg access works as
159 * expected and values can be set for the appropriate head by using a 0x2000
160 * offset as required
161 * however:
162 * a) pre nv40, the head B range of PRMVIO regs at 0xc23c* was not exposed and
163 * cr44 must be set to 0 or 3 for accessing values on the correct head
164 * through the common 0xc03c* addresses
165 * b) in tied mode (4) head B is programmed to the values set on head A, and
166 * access using the head B addresses can have strange results, ergo we leave
167 * tied mode in init once we know to what cr44 should be restored on exit
168 *
169 * the owner parameter is slightly abused:
170 * 0 and 1 are treated as head values and so the set value is (owner * 3)
171 * other values are treated as literal values to set
172 */
173 u8
nv_rdvgaowner(void * obj)174 nv_rdvgaowner(void *obj)
175 {
176 if (nv_device(obj)->card_type < NV_50) {
177 if (nv_device(obj)->chipset == 0x11) {
178 u32 tied = nv_rd32(obj, 0x001084) & 0x10000000;
179 if (tied == 0) {
180 u8 slA = nv_rdvgac(obj, 0, 0x28) & 0x80;
181 u8 tvA = nv_rdvgac(obj, 0, 0x33) & 0x01;
182 u8 slB = nv_rdvgac(obj, 1, 0x28) & 0x80;
183 u8 tvB = nv_rdvgac(obj, 1, 0x33) & 0x01;
184 if (slA && !tvA) return 0x00;
185 if (slB && !tvB) return 0x03;
186 if (slA) return 0x00;
187 if (slB) return 0x03;
188 return 0x00;
189 }
190 return 0x04;
191 }
192
193 return nv_rdvgac(obj, 0, 0x44);
194 }
195
196 nv_error(obj, "rdvgaowner after nv4x\n");
197 return 0x00;
198 }
199
200 void
nv_wrvgaowner(void * obj,u8 select)201 nv_wrvgaowner(void *obj, u8 select)
202 {
203 if (nv_device(obj)->card_type < NV_50) {
204 u8 owner = (select == 1) ? 3 : select;
205 if (nv_device(obj)->chipset == 0x11) {
206 /* workaround hw lockup bug */
207 nv_rdvgac(obj, 0, 0x1f);
208 nv_rdvgac(obj, 1, 0x1f);
209 }
210
211 nv_wrvgac(obj, 0, 0x44, owner);
212
213 if (nv_device(obj)->chipset == 0x11) {
214 nv_wrvgac(obj, 0, 0x2e, owner);
215 nv_wrvgac(obj, 0, 0x2e, owner);
216 }
217 } else
218 nv_error(obj, "wrvgaowner after nv4x\n");
219 }
220