1 /*********************************************************************
2  *
3  * Turtle Beach MultiSound Sound Card Driver for Linux
4  * Linux 2.0/2.2 Version
5  *
6  * msnd_pinnacle.c / msnd_classic.c
7  *
8  * -- If MSND_CLASSIC is defined:
9  *
10  *     -> driver for Turtle Beach Classic/Monterey/Tahiti
11  *
12  * -- Else
13  *
14  *     -> driver for Turtle Beach Pinnacle/Fiji
15  *
16  * Copyright (C) 1998 Andrew Veliath
17  *
18  * This program is free software; you can redistribute it and/or modify
19  * it under the terms of the GNU General Public License as published by
20  * the Free Software Foundation; either version 2 of the License, or
21  * (at your option) any later version.
22  *
23  * This program is distributed in the hope that it will be useful,
24  * but WITHOUT ANY WARRANTY; without even the implied warranty of
25  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
26  * GNU General Public License for more details.
27  *
28  * You should have received a copy of the GNU General Public License
29  * along with this program; if not, write to the Free Software
30  * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
31  *
32  * 12-3-2000  Modified IO port validation  Steve Sycamore
33  *
34  ********************************************************************/
35 
36 #include <linux/kernel.h>
37 #include <linux/module.h>
38 #include <linux/types.h>
39 #include <linux/delay.h>
40 #include <linux/init.h>
41 #include <linux/interrupt.h>
42 #include <linux/mutex.h>
43 #include <linux/gfp.h>
44 #include <asm/irq.h>
45 #include <asm/io.h>
46 #include "sound_config.h"
47 #include "sound_firmware.h"
48 #ifdef MSND_CLASSIC
49 # ifndef __alpha__
50 #  define SLOWIO
51 # endif
52 #endif
53 #include "msnd.h"
54 #ifdef MSND_CLASSIC
55 #  ifdef CONFIG_MSNDCLAS_HAVE_BOOT
56 #    define HAVE_DSPCODEH
57 #  endif
58 #  include "msnd_classic.h"
59 #  define LOGNAME			"msnd_classic"
60 #else
61 #  ifdef CONFIG_MSNDPIN_HAVE_BOOT
62 #    define HAVE_DSPCODEH
63 #  endif
64 #  include "msnd_pinnacle.h"
65 #  define LOGNAME			"msnd_pinnacle"
66 #endif
67 
68 #ifndef CONFIG_MSND_WRITE_NDELAY
69 #  define CONFIG_MSND_WRITE_NDELAY	1
70 #endif
71 
72 #define get_play_delay_jiffies(size)	((size) * HZ *			\
73 					 dev.play_sample_size / 8 /	\
74 					 dev.play_sample_rate /		\
75 					 dev.play_channels)
76 
77 #define get_rec_delay_jiffies(size)	((size) * HZ *			\
78 					 dev.rec_sample_size / 8 /	\
79 					 dev.rec_sample_rate /		\
80 					 dev.rec_channels)
81 
82 static DEFINE_MUTEX(msnd_pinnacle_mutex);
83 static multisound_dev_t			dev;
84 
85 #ifndef HAVE_DSPCODEH
86 static char				*dspini, *permini;
87 static int				sizeof_dspini, sizeof_permini;
88 #endif
89 
90 static int				dsp_full_reset(void);
91 static void				dsp_write_flush(void);
92 
chk_send_dsp_cmd(multisound_dev_t * dev,register BYTE cmd)93 static __inline__ int chk_send_dsp_cmd(multisound_dev_t *dev, register BYTE cmd)
94 {
95 	if (msnd_send_dsp_cmd(dev, cmd) == 0)
96 		return 0;
97 	dsp_full_reset();
98 	return msnd_send_dsp_cmd(dev, cmd);
99 }
100 
reset_play_queue(void)101 static void reset_play_queue(void)
102 {
103 	int n;
104 	LPDAQD lpDAQ;
105 
106 	dev.last_playbank = -1;
107 	writew(PCTODSP_OFFSET(0 * DAQDS__size), dev.DAPQ + JQS_wHead);
108 	writew(PCTODSP_OFFSET(0 * DAQDS__size), dev.DAPQ + JQS_wTail);
109 
110 	for (n = 0, lpDAQ = dev.base + DAPQ_DATA_BUFF; n < 3; ++n, lpDAQ += DAQDS__size) {
111 		writew(PCTODSP_BASED((DWORD)(DAP_BUFF_SIZE * n)), lpDAQ + DAQDS_wStart);
112 		writew(0, lpDAQ + DAQDS_wSize);
113 		writew(1, lpDAQ + DAQDS_wFormat);
114 		writew(dev.play_sample_size, lpDAQ + DAQDS_wSampleSize);
115 		writew(dev.play_channels, lpDAQ + DAQDS_wChannels);
116 		writew(dev.play_sample_rate, lpDAQ + DAQDS_wSampleRate);
117 		writew(HIMT_PLAY_DONE * 0x100 + n, lpDAQ + DAQDS_wIntMsg);
118 		writew(n, lpDAQ + DAQDS_wFlags);
119 	}
120 }
121 
reset_record_queue(void)122 static void reset_record_queue(void)
123 {
124 	int n;
125 	LPDAQD lpDAQ;
126 	unsigned long flags;
127 
128 	dev.last_recbank = 2;
129 	writew(PCTODSP_OFFSET(0 * DAQDS__size), dev.DARQ + JQS_wHead);
130 	writew(PCTODSP_OFFSET(dev.last_recbank * DAQDS__size), dev.DARQ + JQS_wTail);
131 
132 	/* Critical section: bank 1 access */
133 	spin_lock_irqsave(&dev.lock, flags);
134 	msnd_outb(HPBLKSEL_1, dev.io + HP_BLKS);
135 	memset_io(dev.base, 0, DAR_BUFF_SIZE * 3);
136 	msnd_outb(HPBLKSEL_0, dev.io + HP_BLKS);
137 	spin_unlock_irqrestore(&dev.lock, flags);
138 
139 	for (n = 0, lpDAQ = dev.base + DARQ_DATA_BUFF; n < 3; ++n, lpDAQ += DAQDS__size) {
140 		writew(PCTODSP_BASED((DWORD)(DAR_BUFF_SIZE * n)) + 0x4000, lpDAQ + DAQDS_wStart);
141 		writew(DAR_BUFF_SIZE, lpDAQ + DAQDS_wSize);
142 		writew(1, lpDAQ + DAQDS_wFormat);
143 		writew(dev.rec_sample_size, lpDAQ + DAQDS_wSampleSize);
144 		writew(dev.rec_channels, lpDAQ + DAQDS_wChannels);
145 		writew(dev.rec_sample_rate, lpDAQ + DAQDS_wSampleRate);
146 		writew(HIMT_RECORD_DONE * 0x100 + n, lpDAQ + DAQDS_wIntMsg);
147 		writew(n, lpDAQ + DAQDS_wFlags);
148 	}
149 }
150 
reset_queues(void)151 static void reset_queues(void)
152 {
153 	if (dev.mode & FMODE_WRITE) {
154 		msnd_fifo_make_empty(&dev.DAPF);
155 		reset_play_queue();
156 	}
157 	if (dev.mode & FMODE_READ) {
158 		msnd_fifo_make_empty(&dev.DARF);
159 		reset_record_queue();
160 	}
161 }
162 
dsp_set_format(struct file * file,int val)163 static int dsp_set_format(struct file *file, int val)
164 {
165 	int data, i;
166 	LPDAQD lpDAQ, lpDARQ;
167 
168 	lpDAQ = dev.base + DAPQ_DATA_BUFF;
169 	lpDARQ = dev.base + DARQ_DATA_BUFF;
170 
171 	switch (val) {
172 	case AFMT_U8:
173 	case AFMT_S16_LE:
174 		data = val;
175 		break;
176 	default:
177 		data = DEFSAMPLESIZE;
178 		break;
179 	}
180 
181 	for (i = 0; i < 3; ++i, lpDAQ += DAQDS__size, lpDARQ += DAQDS__size) {
182 		if (file->f_mode & FMODE_WRITE)
183 			writew(data, lpDAQ + DAQDS_wSampleSize);
184 		if (file->f_mode & FMODE_READ)
185 			writew(data, lpDARQ + DAQDS_wSampleSize);
186 	}
187 	if (file->f_mode & FMODE_WRITE)
188 		dev.play_sample_size = data;
189 	if (file->f_mode & FMODE_READ)
190 		dev.rec_sample_size = data;
191 
192 	return data;
193 }
194 
dsp_get_frag_size(void)195 static int dsp_get_frag_size(void)
196 {
197 	int size;
198 	size = dev.fifosize / 4;
199 	if (size > 32 * 1024)
200 		size = 32 * 1024;
201 	return size;
202 }
203 
dsp_ioctl(struct file * file,unsigned int cmd,unsigned long arg)204 static int dsp_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
205 {
206 	int val, i, data, tmp;
207 	LPDAQD lpDAQ, lpDARQ;
208         audio_buf_info abinfo;
209 	unsigned long flags;
210 	int __user *p = (int __user *)arg;
211 
212 	lpDAQ = dev.base + DAPQ_DATA_BUFF;
213 	lpDARQ = dev.base + DARQ_DATA_BUFF;
214 
215 	switch (cmd) {
216 	case SNDCTL_DSP_SUBDIVIDE:
217 	case SNDCTL_DSP_SETFRAGMENT:
218 	case SNDCTL_DSP_SETDUPLEX:
219 	case SNDCTL_DSP_POST:
220 		return 0;
221 
222 	case SNDCTL_DSP_GETIPTR:
223 	case SNDCTL_DSP_GETOPTR:
224 	case SNDCTL_DSP_MAPINBUF:
225 	case SNDCTL_DSP_MAPOUTBUF:
226 		return -EINVAL;
227 
228 	case SNDCTL_DSP_GETOSPACE:
229 		if (!(file->f_mode & FMODE_WRITE))
230 			return -EINVAL;
231 		spin_lock_irqsave(&dev.lock, flags);
232 		abinfo.fragsize = dsp_get_frag_size();
233                 abinfo.bytes = dev.DAPF.n - dev.DAPF.len;
234                 abinfo.fragstotal = dev.DAPF.n / abinfo.fragsize;
235                 abinfo.fragments = abinfo.bytes / abinfo.fragsize;
236 		spin_unlock_irqrestore(&dev.lock, flags);
237 		return copy_to_user((void __user *)arg, &abinfo, sizeof(abinfo)) ? -EFAULT : 0;
238 
239 	case SNDCTL_DSP_GETISPACE:
240 		if (!(file->f_mode & FMODE_READ))
241 			return -EINVAL;
242 		spin_lock_irqsave(&dev.lock, flags);
243 		abinfo.fragsize = dsp_get_frag_size();
244                 abinfo.bytes = dev.DARF.n - dev.DARF.len;
245                 abinfo.fragstotal = dev.DARF.n / abinfo.fragsize;
246                 abinfo.fragments = abinfo.bytes / abinfo.fragsize;
247 		spin_unlock_irqrestore(&dev.lock, flags);
248 		return copy_to_user((void __user *)arg, &abinfo, sizeof(abinfo)) ? -EFAULT : 0;
249 
250 	case SNDCTL_DSP_RESET:
251 		dev.nresets = 0;
252 		reset_queues();
253 		return 0;
254 
255 	case SNDCTL_DSP_SYNC:
256 		dsp_write_flush();
257 		return 0;
258 
259 	case SNDCTL_DSP_GETBLKSIZE:
260 		tmp = dsp_get_frag_size();
261 		if (put_user(tmp, p))
262                         return -EFAULT;
263 		return 0;
264 
265 	case SNDCTL_DSP_GETFMTS:
266 		val = AFMT_S16_LE | AFMT_U8;
267 		if (put_user(val, p))
268 			return -EFAULT;
269 		return 0;
270 
271 	case SNDCTL_DSP_SETFMT:
272 		if (get_user(val, p))
273 			return -EFAULT;
274 
275 		if (file->f_mode & FMODE_WRITE)
276 			data = val == AFMT_QUERY
277 				? dev.play_sample_size
278 				: dsp_set_format(file, val);
279 		else
280 			data = val == AFMT_QUERY
281 				? dev.rec_sample_size
282 				: dsp_set_format(file, val);
283 
284 		if (put_user(data, p))
285 			return -EFAULT;
286 		return 0;
287 
288 	case SNDCTL_DSP_NONBLOCK:
289 		if (!test_bit(F_DISABLE_WRITE_NDELAY, &dev.flags) &&
290 		    file->f_mode & FMODE_WRITE)
291 			dev.play_ndelay = 1;
292 		if (file->f_mode & FMODE_READ)
293 			dev.rec_ndelay = 1;
294 		return 0;
295 
296 	case SNDCTL_DSP_GETCAPS:
297 		val = DSP_CAP_DUPLEX | DSP_CAP_BATCH;
298 		if (put_user(val, p))
299 			return -EFAULT;
300 		return 0;
301 
302 	case SNDCTL_DSP_SPEED:
303 		if (get_user(val, p))
304 			return -EFAULT;
305 
306 		if (val < 8000)
307 			val = 8000;
308 
309 		if (val > 48000)
310 			val = 48000;
311 
312 		data = val;
313 
314 		for (i = 0; i < 3; ++i, lpDAQ += DAQDS__size, lpDARQ += DAQDS__size) {
315 			if (file->f_mode & FMODE_WRITE)
316 				writew(data, lpDAQ + DAQDS_wSampleRate);
317 			if (file->f_mode & FMODE_READ)
318 				writew(data, lpDARQ + DAQDS_wSampleRate);
319 		}
320 		if (file->f_mode & FMODE_WRITE)
321 			dev.play_sample_rate = data;
322 		if (file->f_mode & FMODE_READ)
323 			dev.rec_sample_rate = data;
324 
325 		if (put_user(data, p))
326 			return -EFAULT;
327 		return 0;
328 
329 	case SNDCTL_DSP_CHANNELS:
330 	case SNDCTL_DSP_STEREO:
331 		if (get_user(val, p))
332 			return -EFAULT;
333 
334 		if (cmd == SNDCTL_DSP_CHANNELS) {
335 			switch (val) {
336 			case 1:
337 			case 2:
338 				data = val;
339 				break;
340 			default:
341 				val = data = 2;
342 				break;
343 			}
344 		} else {
345 			switch (val) {
346 			case 0:
347 				data = 1;
348 				break;
349 			default:
350 				val = 1;
351 			case 1:
352 				data = 2;
353 				break;
354 			}
355 		}
356 
357 		for (i = 0; i < 3; ++i, lpDAQ += DAQDS__size, lpDARQ += DAQDS__size) {
358 			if (file->f_mode & FMODE_WRITE)
359 				writew(data, lpDAQ + DAQDS_wChannels);
360 			if (file->f_mode & FMODE_READ)
361 				writew(data, lpDARQ + DAQDS_wChannels);
362 		}
363 		if (file->f_mode & FMODE_WRITE)
364 			dev.play_channels = data;
365 		if (file->f_mode & FMODE_READ)
366 			dev.rec_channels = data;
367 
368 		if (put_user(val, p))
369 			return -EFAULT;
370 		return 0;
371 	}
372 
373 	return -EINVAL;
374 }
375 
mixer_get(int d)376 static int mixer_get(int d)
377 {
378 	if (d > 31)
379 		return -EINVAL;
380 
381 	switch (d) {
382 	case SOUND_MIXER_VOLUME:
383 	case SOUND_MIXER_PCM:
384 	case SOUND_MIXER_LINE:
385 	case SOUND_MIXER_IMIX:
386 	case SOUND_MIXER_LINE1:
387 #ifndef MSND_CLASSIC
388 	case SOUND_MIXER_MIC:
389 	case SOUND_MIXER_SYNTH:
390 #endif
391 		return (dev.left_levels[d] >> 8) * 100 / 0xff |
392 			(((dev.right_levels[d] >> 8) * 100 / 0xff) << 8);
393 	default:
394 		return 0;
395 	}
396 }
397 
398 #define update_volm(a,b)						\
399 	writew((dev.left_levels[a] >> 1) *				\
400 	       readw(dev.SMA + SMA_wCurrMastVolLeft) / 0xffff,	\
401 	       dev.SMA + SMA_##b##Left);				\
402 	writew((dev.right_levels[a] >> 1)  *			\
403 	       readw(dev.SMA + SMA_wCurrMastVolRight) / 0xffff,	\
404 	       dev.SMA + SMA_##b##Right);
405 
406 #define update_potm(d,s,ar)						\
407 	writeb((dev.left_levels[d] >> 8) *				\
408 	       readw(dev.SMA + SMA_wCurrMastVolLeft) / 0xffff,	\
409 	       dev.SMA + SMA_##s##Left);				\
410 	writeb((dev.right_levels[d] >> 8) *				\
411 	       readw(dev.SMA + SMA_wCurrMastVolRight) / 0xffff,	\
412 	       dev.SMA + SMA_##s##Right);				\
413 	if (msnd_send_word(&dev, 0, 0, ar) == 0)			\
414 		chk_send_dsp_cmd(&dev, HDEX_AUX_REQ);
415 
416 #define update_pot(d,s,ar)				\
417 	writeb(dev.left_levels[d] >> 8,		\
418 	       dev.SMA + SMA_##s##Left);		\
419 	writeb(dev.right_levels[d] >> 8,		\
420 	       dev.SMA + SMA_##s##Right);		\
421 	if (msnd_send_word(&dev, 0, 0, ar) == 0)	\
422 		chk_send_dsp_cmd(&dev, HDEX_AUX_REQ);
423 
mixer_set(int d,int value)424 static int mixer_set(int d, int value)
425 {
426 	int left = value & 0x000000ff;
427 	int right = (value & 0x0000ff00) >> 8;
428 	int bLeft, bRight;
429 	int wLeft, wRight;
430 	int updatemaster = 0;
431 
432 	if (d > 31)
433 		return -EINVAL;
434 
435 	bLeft = left * 0xff / 100;
436 	wLeft = left * 0xffff / 100;
437 
438 	bRight = right * 0xff / 100;
439 	wRight = right * 0xffff / 100;
440 
441 	dev.left_levels[d] = wLeft;
442 	dev.right_levels[d] = wRight;
443 
444 	switch (d) {
445 		/* master volume unscaled controls */
446 	case SOUND_MIXER_LINE:			/* line pot control */
447 		/* scaled by IMIX in digital mix */
448 		writeb(bLeft, dev.SMA + SMA_bInPotPosLeft);
449 		writeb(bRight, dev.SMA + SMA_bInPotPosRight);
450 		if (msnd_send_word(&dev, 0, 0, HDEXAR_IN_SET_POTS) == 0)
451 			chk_send_dsp_cmd(&dev, HDEX_AUX_REQ);
452 		break;
453 #ifndef MSND_CLASSIC
454 	case SOUND_MIXER_MIC:			/* mic pot control */
455 		/* scaled by IMIX in digital mix */
456 		writeb(bLeft, dev.SMA + SMA_bMicPotPosLeft);
457 		writeb(bRight, dev.SMA + SMA_bMicPotPosRight);
458 		if (msnd_send_word(&dev, 0, 0, HDEXAR_MIC_SET_POTS) == 0)
459 			chk_send_dsp_cmd(&dev, HDEX_AUX_REQ);
460 		break;
461 #endif
462 	case SOUND_MIXER_VOLUME:		/* master volume */
463 		writew(wLeft, dev.SMA + SMA_wCurrMastVolLeft);
464 		writew(wRight, dev.SMA + SMA_wCurrMastVolRight);
465 		/* fall through */
466 
467 	case SOUND_MIXER_LINE1:			/* aux pot control */
468 		/* scaled by master volume */
469 		/* fall through */
470 
471 		/* digital controls */
472 	case SOUND_MIXER_SYNTH:			/* synth vol (dsp mix) */
473 	case SOUND_MIXER_PCM:			/* pcm vol (dsp mix) */
474 	case SOUND_MIXER_IMIX:			/* input monitor (dsp mix) */
475 		/* scaled by master volume */
476 		updatemaster = 1;
477 		break;
478 
479 	default:
480 		return 0;
481 	}
482 
483 	if (updatemaster) {
484 		/* update master volume scaled controls */
485 		update_volm(SOUND_MIXER_PCM, wCurrPlayVol);
486 		update_volm(SOUND_MIXER_IMIX, wCurrInVol);
487 #ifndef MSND_CLASSIC
488 		update_volm(SOUND_MIXER_SYNTH, wCurrMHdrVol);
489 #endif
490 		update_potm(SOUND_MIXER_LINE1, bAuxPotPos, HDEXAR_AUX_SET_POTS);
491 	}
492 
493 	return mixer_get(d);
494 }
495 
mixer_setup(void)496 static void mixer_setup(void)
497 {
498 	update_pot(SOUND_MIXER_LINE, bInPotPos, HDEXAR_IN_SET_POTS);
499 	update_potm(SOUND_MIXER_LINE1, bAuxPotPos, HDEXAR_AUX_SET_POTS);
500 	update_volm(SOUND_MIXER_PCM, wCurrPlayVol);
501 	update_volm(SOUND_MIXER_IMIX, wCurrInVol);
502 #ifndef MSND_CLASSIC
503 	update_pot(SOUND_MIXER_MIC, bMicPotPos, HDEXAR_MIC_SET_POTS);
504 	update_volm(SOUND_MIXER_SYNTH, wCurrMHdrVol);
505 #endif
506 }
507 
set_recsrc(unsigned long recsrc)508 static unsigned long set_recsrc(unsigned long recsrc)
509 {
510 	if (dev.recsrc == recsrc)
511 		return dev.recsrc;
512 #ifdef HAVE_NORECSRC
513 	else if (recsrc == 0)
514 		dev.recsrc = 0;
515 #endif
516 	else
517 		dev.recsrc ^= recsrc;
518 
519 #ifndef MSND_CLASSIC
520 	if (dev.recsrc & SOUND_MASK_IMIX) {
521 		if (msnd_send_word(&dev, 0, 0, HDEXAR_SET_ANA_IN) == 0)
522 			chk_send_dsp_cmd(&dev, HDEX_AUX_REQ);
523 	}
524 	else if (dev.recsrc & SOUND_MASK_SYNTH) {
525 		if (msnd_send_word(&dev, 0, 0, HDEXAR_SET_SYNTH_IN) == 0)
526 			chk_send_dsp_cmd(&dev, HDEX_AUX_REQ);
527 	}
528 	else if ((dev.recsrc & SOUND_MASK_DIGITAL1) && test_bit(F_HAVEDIGITAL, &dev.flags)) {
529 		if (msnd_send_word(&dev, 0, 0, HDEXAR_SET_DAT_IN) == 0)
530       			chk_send_dsp_cmd(&dev, HDEX_AUX_REQ);
531 	}
532 	else {
533 #ifdef HAVE_NORECSRC
534 		/* Select no input (?) */
535 		dev.recsrc = 0;
536 #else
537 		dev.recsrc = SOUND_MASK_IMIX;
538 		if (msnd_send_word(&dev, 0, 0, HDEXAR_SET_ANA_IN) == 0)
539 			chk_send_dsp_cmd(&dev, HDEX_AUX_REQ);
540 #endif
541 	}
542 #endif /* MSND_CLASSIC */
543 
544 	return dev.recsrc;
545 }
546 
force_recsrc(unsigned long recsrc)547 static unsigned long force_recsrc(unsigned long recsrc)
548 {
549 	dev.recsrc = 0;
550 	return set_recsrc(recsrc);
551 }
552 
553 #define set_mixer_info()							\
554 		memset(&info, 0, sizeof(info));					\
555 		strlcpy(info.id, "MSNDMIXER", sizeof(info.id));			\
556 		strlcpy(info.name, "MultiSound Mixer", sizeof(info.name));
557 
mixer_ioctl(unsigned int cmd,unsigned long arg)558 static int mixer_ioctl(unsigned int cmd, unsigned long arg)
559 {
560 	if (cmd == SOUND_MIXER_INFO) {
561 		mixer_info info;
562 		set_mixer_info();
563 		info.modify_counter = dev.mixer_mod_count;
564 		if (copy_to_user((void __user *)arg, &info, sizeof(info)))
565 			return -EFAULT;
566 		return 0;
567 	} else if (cmd == SOUND_OLD_MIXER_INFO) {
568 		_old_mixer_info info;
569 		set_mixer_info();
570 		if (copy_to_user((void __user *)arg, &info, sizeof(info)))
571 			return -EFAULT;
572 		return 0;
573 	} else if (cmd == SOUND_MIXER_PRIVATE1) {
574 		dev.nresets = 0;
575 		dsp_full_reset();
576 		return 0;
577 	} else if (((cmd >> 8) & 0xff) == 'M') {
578 		int val = 0;
579 
580 		if (_SIOC_DIR(cmd) & _SIOC_WRITE) {
581 			switch (cmd & 0xff) {
582 			case SOUND_MIXER_RECSRC:
583 				if (get_user(val, (int __user *)arg))
584 					return -EFAULT;
585 				val = set_recsrc(val);
586 				break;
587 
588 			default:
589 				if (get_user(val, (int __user *)arg))
590 					return -EFAULT;
591 				val = mixer_set(cmd & 0xff, val);
592 				break;
593 			}
594 			++dev.mixer_mod_count;
595 			return put_user(val, (int __user *)arg);
596 		} else {
597 			switch (cmd & 0xff) {
598 			case SOUND_MIXER_RECSRC:
599 				val = dev.recsrc;
600 				break;
601 
602 			case SOUND_MIXER_DEVMASK:
603 			case SOUND_MIXER_STEREODEVS:
604 				val =   SOUND_MASK_PCM |
605 					SOUND_MASK_LINE |
606 					SOUND_MASK_IMIX |
607 					SOUND_MASK_LINE1 |
608 #ifndef MSND_CLASSIC
609 					SOUND_MASK_MIC |
610 					SOUND_MASK_SYNTH |
611 #endif
612 					SOUND_MASK_VOLUME;
613 				break;
614 
615 			case SOUND_MIXER_RECMASK:
616 #ifdef MSND_CLASSIC
617 				val =   0;
618 #else
619 				val =   SOUND_MASK_IMIX |
620 					SOUND_MASK_SYNTH;
621 				if (test_bit(F_HAVEDIGITAL, &dev.flags))
622 					val |= SOUND_MASK_DIGITAL1;
623 #endif
624 				break;
625 
626 			case SOUND_MIXER_CAPS:
627 				val =   SOUND_CAP_EXCL_INPUT;
628 				break;
629 
630 			default:
631 				if ((val = mixer_get(cmd & 0xff)) < 0)
632 					return -EINVAL;
633 				break;
634 			}
635 		}
636 
637 		return put_user(val, (int __user *)arg);
638 	}
639 
640 	return -EINVAL;
641 }
642 
dev_ioctl(struct file * file,unsigned int cmd,unsigned long arg)643 static long dev_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
644 {
645 	int minor = iminor(file_inode(file));
646 	int ret;
647 
648 	if (cmd == OSS_GETVERSION) {
649 		int sound_version = SOUND_VERSION;
650 		return put_user(sound_version, (int __user *)arg);
651 	}
652 
653 	ret = -EINVAL;
654 
655 	mutex_lock(&msnd_pinnacle_mutex);
656 	if (minor == dev.dsp_minor)
657 		ret = dsp_ioctl(file, cmd, arg);
658 	else if (minor == dev.mixer_minor)
659 		ret = mixer_ioctl(cmd, arg);
660 	mutex_unlock(&msnd_pinnacle_mutex);
661 
662 	return ret;
663 }
664 
dsp_write_flush(void)665 static void dsp_write_flush(void)
666 {
667 	int timeout = get_play_delay_jiffies(dev.DAPF.len);
668 
669 	if (!(dev.mode & FMODE_WRITE) || !test_bit(F_WRITING, &dev.flags))
670 		return;
671 	set_bit(F_WRITEFLUSH, &dev.flags);
672 	wait_event_interruptible_timeout(
673 		dev.writeflush,
674 		!test_bit(F_WRITEFLUSH, &dev.flags),
675 		timeout);
676 	clear_bit(F_WRITEFLUSH, &dev.flags);
677 	if (!signal_pending(current)) {
678 		__set_current_state(TASK_INTERRUPTIBLE);
679 		schedule_timeout(get_play_delay_jiffies(DAP_BUFF_SIZE));
680 	}
681 	clear_bit(F_WRITING, &dev.flags);
682 }
683 
dsp_halt(struct file * file)684 static void dsp_halt(struct file *file)
685 {
686 	if ((file ? file->f_mode : dev.mode) & FMODE_READ) {
687 		clear_bit(F_READING, &dev.flags);
688 		chk_send_dsp_cmd(&dev, HDEX_RECORD_STOP);
689 		msnd_disable_irq(&dev);
690 		if (file) {
691 			printk(KERN_DEBUG LOGNAME ": Stopping read for %p\n", file);
692 			dev.mode &= ~FMODE_READ;
693 		}
694 		clear_bit(F_AUDIO_READ_INUSE, &dev.flags);
695 	}
696 	if ((file ? file->f_mode : dev.mode) & FMODE_WRITE) {
697 		if (test_bit(F_WRITING, &dev.flags)) {
698 			dsp_write_flush();
699 			chk_send_dsp_cmd(&dev, HDEX_PLAY_STOP);
700 		}
701 		msnd_disable_irq(&dev);
702 		if (file) {
703 			printk(KERN_DEBUG LOGNAME ": Stopping write for %p\n", file);
704 			dev.mode &= ~FMODE_WRITE;
705 		}
706 		clear_bit(F_AUDIO_WRITE_INUSE, &dev.flags);
707 	}
708 }
709 
dsp_release(struct file * file)710 static int dsp_release(struct file *file)
711 {
712 	dsp_halt(file);
713 	return 0;
714 }
715 
dsp_open(struct file * file)716 static int dsp_open(struct file *file)
717 {
718 	if ((file ? file->f_mode : dev.mode) & FMODE_WRITE) {
719 		set_bit(F_AUDIO_WRITE_INUSE, &dev.flags);
720 		clear_bit(F_WRITING, &dev.flags);
721 		msnd_fifo_make_empty(&dev.DAPF);
722 		reset_play_queue();
723 		if (file) {
724 			printk(KERN_DEBUG LOGNAME ": Starting write for %p\n", file);
725 			dev.mode |= FMODE_WRITE;
726 		}
727 		msnd_enable_irq(&dev);
728 	}
729 	if ((file ? file->f_mode : dev.mode) & FMODE_READ) {
730 		set_bit(F_AUDIO_READ_INUSE, &dev.flags);
731 		clear_bit(F_READING, &dev.flags);
732 		msnd_fifo_make_empty(&dev.DARF);
733 		reset_record_queue();
734 		if (file) {
735 			printk(KERN_DEBUG LOGNAME ": Starting read for %p\n", file);
736 			dev.mode |= FMODE_READ;
737 		}
738 		msnd_enable_irq(&dev);
739 	}
740 	return 0;
741 }
742 
set_default_play_audio_parameters(void)743 static void set_default_play_audio_parameters(void)
744 {
745 	dev.play_sample_size = DEFSAMPLESIZE;
746 	dev.play_sample_rate = DEFSAMPLERATE;
747 	dev.play_channels = DEFCHANNELS;
748 }
749 
set_default_rec_audio_parameters(void)750 static void set_default_rec_audio_parameters(void)
751 {
752 	dev.rec_sample_size = DEFSAMPLESIZE;
753 	dev.rec_sample_rate = DEFSAMPLERATE;
754 	dev.rec_channels = DEFCHANNELS;
755 }
756 
set_default_audio_parameters(void)757 static void set_default_audio_parameters(void)
758 {
759 	set_default_play_audio_parameters();
760 	set_default_rec_audio_parameters();
761 }
762 
dev_open(struct inode * inode,struct file * file)763 static int dev_open(struct inode *inode, struct file *file)
764 {
765 	int minor = iminor(inode);
766 	int err = 0;
767 
768 	mutex_lock(&msnd_pinnacle_mutex);
769 	if (minor == dev.dsp_minor) {
770 		if ((file->f_mode & FMODE_WRITE &&
771 		     test_bit(F_AUDIO_WRITE_INUSE, &dev.flags)) ||
772 		    (file->f_mode & FMODE_READ &&
773 		     test_bit(F_AUDIO_READ_INUSE, &dev.flags))) {
774 			err = -EBUSY;
775 			goto out;
776 		}
777 
778 		if ((err = dsp_open(file)) >= 0) {
779 			dev.nresets = 0;
780 			if (file->f_mode & FMODE_WRITE) {
781 				set_default_play_audio_parameters();
782 				if (!test_bit(F_DISABLE_WRITE_NDELAY, &dev.flags))
783 					dev.play_ndelay = (file->f_flags & O_NDELAY) ? 1 : 0;
784 				else
785 					dev.play_ndelay = 0;
786 			}
787 			if (file->f_mode & FMODE_READ) {
788 				set_default_rec_audio_parameters();
789 				dev.rec_ndelay = (file->f_flags & O_NDELAY) ? 1 : 0;
790 			}
791 		}
792 	}
793 	else if (minor == dev.mixer_minor) {
794 		/* nothing */
795 	} else
796 		err = -EINVAL;
797 out:
798 	mutex_unlock(&msnd_pinnacle_mutex);
799 	return err;
800 }
801 
dev_release(struct inode * inode,struct file * file)802 static int dev_release(struct inode *inode, struct file *file)
803 {
804 	int minor = iminor(inode);
805 	int err = 0;
806 
807 	mutex_lock(&msnd_pinnacle_mutex);
808 	if (minor == dev.dsp_minor)
809 		err = dsp_release(file);
810 	else if (minor == dev.mixer_minor) {
811 		/* nothing */
812 	} else
813 		err = -EINVAL;
814 	mutex_unlock(&msnd_pinnacle_mutex);
815 	return err;
816 }
817 
pack_DARQ_to_DARF(register int bank)818 static __inline__ int pack_DARQ_to_DARF(register int bank)
819 {
820 	register int size, timeout = 3;
821 	register WORD wTmp;
822 	LPDAQD DAQD;
823 
824 	/* Increment the tail and check for queue wrap */
825 	wTmp = readw(dev.DARQ + JQS_wTail) + PCTODSP_OFFSET(DAQDS__size);
826 	if (wTmp > readw(dev.DARQ + JQS_wSize))
827 		wTmp = 0;
828 	while (wTmp == readw(dev.DARQ + JQS_wHead) && timeout--)
829 		udelay(1);
830 	writew(wTmp, dev.DARQ + JQS_wTail);
831 
832 	/* Get our digital audio queue struct */
833 	DAQD = bank * DAQDS__size + dev.base + DARQ_DATA_BUFF;
834 
835 	/* Get length of data */
836 	size = readw(DAQD + DAQDS_wSize);
837 
838 	/* Read data from the head (unprotected bank 1 access okay
839            since this is only called inside an interrupt) */
840 	msnd_outb(HPBLKSEL_1, dev.io + HP_BLKS);
841 	msnd_fifo_write_io(
842 		&dev.DARF,
843 		dev.base + bank * DAR_BUFF_SIZE,
844 		size);
845 	msnd_outb(HPBLKSEL_0, dev.io + HP_BLKS);
846 
847 	return 1;
848 }
849 
pack_DAPF_to_DAPQ(register int start)850 static __inline__ int pack_DAPF_to_DAPQ(register int start)
851 {
852 	register WORD DAPQ_tail;
853 	register int protect = start, nbanks = 0;
854 	LPDAQD DAQD;
855 
856 	DAPQ_tail = readw(dev.DAPQ + JQS_wTail);
857 	while (DAPQ_tail != readw(dev.DAPQ + JQS_wHead) || start) {
858 		register int bank_num = DAPQ_tail / PCTODSP_OFFSET(DAQDS__size);
859 		register int n;
860 		unsigned long flags;
861 
862 		/* Write the data to the new tail */
863 		if (protect) {
864 			/* Critical section: protect fifo in non-interrupt */
865 			spin_lock_irqsave(&dev.lock, flags);
866 			n = msnd_fifo_read_io(
867 				&dev.DAPF,
868 				dev.base + bank_num * DAP_BUFF_SIZE,
869 				DAP_BUFF_SIZE);
870 			spin_unlock_irqrestore(&dev.lock, flags);
871 		} else {
872 			n = msnd_fifo_read_io(
873 				&dev.DAPF,
874 				dev.base + bank_num * DAP_BUFF_SIZE,
875 				DAP_BUFF_SIZE);
876 		}
877 		if (!n)
878 			break;
879 
880 		if (start)
881 			start = 0;
882 
883 		/* Get our digital audio queue struct */
884 		DAQD = bank_num * DAQDS__size + dev.base + DAPQ_DATA_BUFF;
885 
886 		/* Write size of this bank */
887 		writew(n, DAQD + DAQDS_wSize);
888 		++nbanks;
889 
890 		/* Then advance the tail */
891 		DAPQ_tail = (++bank_num % 3) * PCTODSP_OFFSET(DAQDS__size);
892 		writew(DAPQ_tail, dev.DAPQ + JQS_wTail);
893 		/* Tell the DSP to play the bank */
894 		msnd_send_dsp_cmd(&dev, HDEX_PLAY_START);
895 	}
896 	return nbanks;
897 }
898 
dsp_read(char __user * buf,size_t len)899 static int dsp_read(char __user *buf, size_t len)
900 {
901 	int count = len;
902 	char *page = (char *)__get_free_page(GFP_KERNEL);
903 	int timeout = get_rec_delay_jiffies(DAR_BUFF_SIZE);
904 
905 	if (!page)
906 		return -ENOMEM;
907 
908 	while (count > 0) {
909 		int n, k;
910 		unsigned long flags;
911 
912 		k = PAGE_SIZE;
913 		if (k > count)
914 			k = count;
915 
916 		/* Critical section: protect fifo in non-interrupt */
917 		spin_lock_irqsave(&dev.lock, flags);
918 		n = msnd_fifo_read(&dev.DARF, page, k);
919 		spin_unlock_irqrestore(&dev.lock, flags);
920 		if (copy_to_user(buf, page, n)) {
921 			free_page((unsigned long)page);
922 			return -EFAULT;
923 		}
924 		buf += n;
925 		count -= n;
926 
927 		if (n == k && count)
928 			continue;
929 
930 		if (!test_bit(F_READING, &dev.flags) && dev.mode & FMODE_READ) {
931 			dev.last_recbank = -1;
932 			if (chk_send_dsp_cmd(&dev, HDEX_RECORD_START) == 0)
933 				set_bit(F_READING, &dev.flags);
934 		}
935 
936 		if (dev.rec_ndelay) {
937 			free_page((unsigned long)page);
938 			return count == len ? -EAGAIN : len - count;
939 		}
940 
941 		if (count > 0) {
942 			set_bit(F_READBLOCK, &dev.flags);
943 			if (wait_event_interruptible_timeout(
944 					dev.readblock,
945 					test_bit(F_READBLOCK, &dev.flags),
946 					timeout) <= 0)
947 				clear_bit(F_READING, &dev.flags);
948 			if (signal_pending(current)) {
949 				free_page((unsigned long)page);
950 				return -EINTR;
951 			}
952 		}
953 	}
954 	free_page((unsigned long)page);
955 	return len - count;
956 }
957 
dsp_write(const char __user * buf,size_t len)958 static int dsp_write(const char __user *buf, size_t len)
959 {
960 	int count = len;
961 	char *page = (char *)__get_free_page(GFP_KERNEL);
962 	int timeout = get_play_delay_jiffies(DAP_BUFF_SIZE);
963 
964 	if (!page)
965 		return -ENOMEM;
966 
967 	while (count > 0) {
968 		int n, k;
969 		unsigned long flags;
970 
971 		k = PAGE_SIZE;
972 		if (k > count)
973 			k = count;
974 
975 		if (copy_from_user(page, buf, k)) {
976 			free_page((unsigned long)page);
977 			return -EFAULT;
978 		}
979 
980 		/* Critical section: protect fifo in non-interrupt */
981 		spin_lock_irqsave(&dev.lock, flags);
982 		n = msnd_fifo_write(&dev.DAPF, page, k);
983 		spin_unlock_irqrestore(&dev.lock, flags);
984 		buf += n;
985 		count -= n;
986 
987 		if (count && n == k)
988 			continue;
989 
990 		if (!test_bit(F_WRITING, &dev.flags) && (dev.mode & FMODE_WRITE)) {
991 			dev.last_playbank = -1;
992 			if (pack_DAPF_to_DAPQ(1) > 0)
993 				set_bit(F_WRITING, &dev.flags);
994 		}
995 
996 		if (dev.play_ndelay) {
997 			free_page((unsigned long)page);
998 			return count == len ? -EAGAIN : len - count;
999 		}
1000 
1001 		if (count > 0) {
1002 			set_bit(F_WRITEBLOCK, &dev.flags);
1003 			wait_event_interruptible_timeout(
1004 				dev.writeblock,
1005 				test_bit(F_WRITEBLOCK, &dev.flags),
1006 				timeout);
1007 			if (signal_pending(current)) {
1008 				free_page((unsigned long)page);
1009 				return -EINTR;
1010 			}
1011 		}
1012 	}
1013 
1014 	free_page((unsigned long)page);
1015 	return len - count;
1016 }
1017 
dev_read(struct file * file,char __user * buf,size_t count,loff_t * off)1018 static ssize_t dev_read(struct file *file, char __user *buf, size_t count, loff_t *off)
1019 {
1020 	int minor = iminor(file_inode(file));
1021 	if (minor == dev.dsp_minor)
1022 		return dsp_read(buf, count);
1023 	else
1024 		return -EINVAL;
1025 }
1026 
dev_write(struct file * file,const char __user * buf,size_t count,loff_t * off)1027 static ssize_t dev_write(struct file *file, const char __user *buf, size_t count, loff_t *off)
1028 {
1029 	int minor = iminor(file_inode(file));
1030 	if (minor == dev.dsp_minor)
1031 		return dsp_write(buf, count);
1032 	else
1033 		return -EINVAL;
1034 }
1035 
eval_dsp_msg(register WORD wMessage)1036 static __inline__ void eval_dsp_msg(register WORD wMessage)
1037 {
1038 	switch (HIBYTE(wMessage)) {
1039 	case HIMT_PLAY_DONE:
1040 		if (dev.last_playbank == LOBYTE(wMessage) || !test_bit(F_WRITING, &dev.flags))
1041 			break;
1042 		dev.last_playbank = LOBYTE(wMessage);
1043 
1044 		if (pack_DAPF_to_DAPQ(0) <= 0) {
1045 			if (!test_bit(F_WRITEBLOCK, &dev.flags)) {
1046 				if (test_and_clear_bit(F_WRITEFLUSH, &dev.flags))
1047 					wake_up_interruptible(&dev.writeflush);
1048 			}
1049 			clear_bit(F_WRITING, &dev.flags);
1050 		}
1051 
1052 		if (test_and_clear_bit(F_WRITEBLOCK, &dev.flags))
1053 			wake_up_interruptible(&dev.writeblock);
1054 		break;
1055 
1056 	case HIMT_RECORD_DONE:
1057 		if (dev.last_recbank == LOBYTE(wMessage))
1058 			break;
1059 		dev.last_recbank = LOBYTE(wMessage);
1060 
1061 		pack_DARQ_to_DARF(dev.last_recbank);
1062 
1063 		if (test_and_clear_bit(F_READBLOCK, &dev.flags))
1064 			wake_up_interruptible(&dev.readblock);
1065 		break;
1066 
1067 	case HIMT_DSP:
1068 		switch (LOBYTE(wMessage)) {
1069 #ifndef MSND_CLASSIC
1070 		case HIDSP_PLAY_UNDER:
1071 #endif
1072 		case HIDSP_INT_PLAY_UNDER:
1073 /*			printk(KERN_DEBUG LOGNAME ": Play underflow\n"); */
1074 			clear_bit(F_WRITING, &dev.flags);
1075 			break;
1076 
1077 		case HIDSP_INT_RECORD_OVER:
1078 /*			printk(KERN_DEBUG LOGNAME ": Record overflow\n"); */
1079 			clear_bit(F_READING, &dev.flags);
1080 			break;
1081 
1082 		default:
1083 /*			printk(KERN_DEBUG LOGNAME ": DSP message %d 0x%02x\n",
1084 			LOBYTE(wMessage), LOBYTE(wMessage)); */
1085 			break;
1086 		}
1087 		break;
1088 
1089         case HIMT_MIDI_IN_UCHAR:
1090 		if (dev.midi_in_interrupt)
1091 			(*dev.midi_in_interrupt)(&dev);
1092 		break;
1093 
1094 	default:
1095 /*		printk(KERN_DEBUG LOGNAME ": HIMT message %d 0x%02x\n", HIBYTE(wMessage), HIBYTE(wMessage)); */
1096 		break;
1097 	}
1098 }
1099 
intr(int irq,void * dev_id)1100 static irqreturn_t intr(int irq, void *dev_id)
1101 {
1102 	/* Send ack to DSP */
1103 	msnd_inb(dev.io + HP_RXL);
1104 
1105 	/* Evaluate queued DSP messages */
1106 	while (readw(dev.DSPQ + JQS_wTail) != readw(dev.DSPQ + JQS_wHead)) {
1107 		register WORD wTmp;
1108 
1109 		eval_dsp_msg(readw(dev.pwDSPQData + 2*readw(dev.DSPQ + JQS_wHead)));
1110 
1111 		if ((wTmp = readw(dev.DSPQ + JQS_wHead) + 1) > readw(dev.DSPQ + JQS_wSize))
1112 			writew(0, dev.DSPQ + JQS_wHead);
1113 		else
1114 			writew(wTmp, dev.DSPQ + JQS_wHead);
1115 	}
1116 	return IRQ_HANDLED;
1117 }
1118 
1119 static const struct file_operations dev_fileops = {
1120 	.owner		= THIS_MODULE,
1121 	.read		= dev_read,
1122 	.write		= dev_write,
1123 	.unlocked_ioctl	= dev_ioctl,
1124 	.open		= dev_open,
1125 	.release	= dev_release,
1126 	.llseek		= noop_llseek,
1127 };
1128 
reset_dsp(void)1129 static int reset_dsp(void)
1130 {
1131 	int timeout = 100;
1132 
1133 	msnd_outb(HPDSPRESET_ON, dev.io + HP_DSPR);
1134 	mdelay(1);
1135 #ifndef MSND_CLASSIC
1136 	dev.info = msnd_inb(dev.io + HP_INFO);
1137 #endif
1138 	msnd_outb(HPDSPRESET_OFF, dev.io + HP_DSPR);
1139 	mdelay(1);
1140 	while (timeout-- > 0) {
1141 		if (msnd_inb(dev.io + HP_CVR) == HP_CVR_DEF)
1142 			return 0;
1143 		mdelay(1);
1144 	}
1145 	printk(KERN_ERR LOGNAME ": Cannot reset DSP\n");
1146 
1147 	return -EIO;
1148 }
1149 
probe_multisound(void)1150 static int __init probe_multisound(void)
1151 {
1152 #ifndef MSND_CLASSIC
1153 	char *xv, *rev = NULL;
1154 	char *pin = "Pinnacle", *fiji = "Fiji";
1155 	char *pinfiji = "Pinnacle/Fiji";
1156 #endif
1157 
1158 	if (!request_region(dev.io, dev.numio, "probing")) {
1159 		printk(KERN_ERR LOGNAME ": I/O port conflict\n");
1160 		return -ENODEV;
1161 	}
1162 
1163 	if (reset_dsp() < 0) {
1164 		release_region(dev.io, dev.numio);
1165 		return -ENODEV;
1166 	}
1167 
1168 #ifdef MSND_CLASSIC
1169 	dev.name = "Classic/Tahiti/Monterey";
1170 	printk(KERN_INFO LOGNAME ": %s, "
1171 #else
1172 	switch (dev.info >> 4) {
1173 	case 0xf: xv = "<= 1.15"; break;
1174 	case 0x1: xv = "1.18/1.2"; break;
1175 	case 0x2: xv = "1.3"; break;
1176 	case 0x3: xv = "1.4"; break;
1177 	default: xv = "unknown"; break;
1178 	}
1179 
1180 	switch (dev.info & 0x7) {
1181 	case 0x0: rev = "I"; dev.name = pin; break;
1182 	case 0x1: rev = "F"; dev.name = pin; break;
1183 	case 0x2: rev = "G"; dev.name = pin; break;
1184 	case 0x3: rev = "H"; dev.name = pin; break;
1185 	case 0x4: rev = "E"; dev.name = fiji; break;
1186 	case 0x5: rev = "C"; dev.name = fiji; break;
1187 	case 0x6: rev = "D"; dev.name = fiji; break;
1188 	case 0x7:
1189 		rev = "A-B (Fiji) or A-E (Pinnacle)";
1190 		dev.name = pinfiji;
1191 		break;
1192 	}
1193 	printk(KERN_INFO LOGNAME ": %s revision %s, Xilinx version %s, "
1194 #endif /* MSND_CLASSIC */
1195 	       "I/O 0x%x-0x%x, IRQ %d, memory mapped to %p-%p\n",
1196 	       dev.name,
1197 #ifndef MSND_CLASSIC
1198 	       rev, xv,
1199 #endif
1200 	       dev.io, dev.io + dev.numio - 1,
1201 	       dev.irq,
1202 	       dev.base, dev.base + 0x7fff);
1203 
1204 	release_region(dev.io, dev.numio);
1205 	return 0;
1206 }
1207 
init_sma(void)1208 static int init_sma(void)
1209 {
1210 	static int initted;
1211 	WORD mastVolLeft, mastVolRight;
1212 	unsigned long flags;
1213 
1214 #ifdef MSND_CLASSIC
1215 	msnd_outb(dev.memid, dev.io + HP_MEMM);
1216 #endif
1217 	msnd_outb(HPBLKSEL_0, dev.io + HP_BLKS);
1218 	if (initted) {
1219 		mastVolLeft = readw(dev.SMA + SMA_wCurrMastVolLeft);
1220 		mastVolRight = readw(dev.SMA + SMA_wCurrMastVolRight);
1221 	} else
1222 		mastVolLeft = mastVolRight = 0;
1223 	memset_io(dev.base, 0, 0x8000);
1224 
1225 	/* Critical section: bank 1 access */
1226 	spin_lock_irqsave(&dev.lock, flags);
1227 	msnd_outb(HPBLKSEL_1, dev.io + HP_BLKS);
1228 	memset_io(dev.base, 0, 0x8000);
1229 	msnd_outb(HPBLKSEL_0, dev.io + HP_BLKS);
1230 	spin_unlock_irqrestore(&dev.lock, flags);
1231 
1232 	dev.pwDSPQData = (dev.base + DSPQ_DATA_BUFF);
1233 	dev.pwMODQData = (dev.base + MODQ_DATA_BUFF);
1234 	dev.pwMIDQData = (dev.base + MIDQ_DATA_BUFF);
1235 
1236 	/* Motorola 56k shared memory base */
1237 	dev.SMA = dev.base + SMA_STRUCT_START;
1238 
1239 	/* Digital audio play queue */
1240 	dev.DAPQ = dev.base + DAPQ_OFFSET;
1241 	msnd_init_queue(dev.DAPQ, DAPQ_DATA_BUFF, DAPQ_BUFF_SIZE);
1242 
1243 	/* Digital audio record queue */
1244 	dev.DARQ = dev.base + DARQ_OFFSET;
1245 	msnd_init_queue(dev.DARQ, DARQ_DATA_BUFF, DARQ_BUFF_SIZE);
1246 
1247 	/* MIDI out queue */
1248 	dev.MODQ = dev.base + MODQ_OFFSET;
1249 	msnd_init_queue(dev.MODQ, MODQ_DATA_BUFF, MODQ_BUFF_SIZE);
1250 
1251 	/* MIDI in queue */
1252 	dev.MIDQ = dev.base + MIDQ_OFFSET;
1253 	msnd_init_queue(dev.MIDQ, MIDQ_DATA_BUFF, MIDQ_BUFF_SIZE);
1254 
1255 	/* DSP -> host message queue */
1256 	dev.DSPQ = dev.base + DSPQ_OFFSET;
1257 	msnd_init_queue(dev.DSPQ, DSPQ_DATA_BUFF, DSPQ_BUFF_SIZE);
1258 
1259 	/* Setup some DSP values */
1260 #ifndef MSND_CLASSIC
1261 	writew(1, dev.SMA + SMA_wCurrPlayFormat);
1262 	writew(dev.play_sample_size, dev.SMA + SMA_wCurrPlaySampleSize);
1263 	writew(dev.play_channels, dev.SMA + SMA_wCurrPlayChannels);
1264 	writew(dev.play_sample_rate, dev.SMA + SMA_wCurrPlaySampleRate);
1265 #endif
1266 	writew(dev.play_sample_rate, dev.SMA + SMA_wCalFreqAtoD);
1267 	writew(mastVolLeft, dev.SMA + SMA_wCurrMastVolLeft);
1268 	writew(mastVolRight, dev.SMA + SMA_wCurrMastVolRight);
1269 #ifndef MSND_CLASSIC
1270 	writel(0x00010000, dev.SMA + SMA_dwCurrPlayPitch);
1271 	writel(0x00000001, dev.SMA + SMA_dwCurrPlayRate);
1272 #endif
1273 	writew(0x303, dev.SMA + SMA_wCurrInputTagBits);
1274 
1275 	initted = 1;
1276 
1277 	return 0;
1278 }
1279 
calibrate_adc(WORD srate)1280 static int __init calibrate_adc(WORD srate)
1281 {
1282 	writew(srate, dev.SMA + SMA_wCalFreqAtoD);
1283 	if (dev.calibrate_signal == 0)
1284 		writew(readw(dev.SMA + SMA_wCurrHostStatusFlags)
1285 		       | 0x0001, dev.SMA + SMA_wCurrHostStatusFlags);
1286 	else
1287 		writew(readw(dev.SMA + SMA_wCurrHostStatusFlags)
1288 		       & ~0x0001, dev.SMA + SMA_wCurrHostStatusFlags);
1289 	if (msnd_send_word(&dev, 0, 0, HDEXAR_CAL_A_TO_D) == 0 &&
1290 	    chk_send_dsp_cmd(&dev, HDEX_AUX_REQ) == 0) {
1291 		schedule_timeout_interruptible(HZ / 3);
1292 		return 0;
1293 	}
1294 	printk(KERN_WARNING LOGNAME ": ADC calibration failed\n");
1295 
1296 	return -EIO;
1297 }
1298 
upload_dsp_code(void)1299 static int upload_dsp_code(void)
1300 {
1301 	int ret = 0;
1302 
1303 	msnd_outb(HPBLKSEL_0, dev.io + HP_BLKS);
1304 #ifndef HAVE_DSPCODEH
1305 	INITCODESIZE = mod_firmware_load(INITCODEFILE, &INITCODE);
1306 	if (!INITCODE) {
1307 		printk(KERN_ERR LOGNAME ": Error loading " INITCODEFILE);
1308 		return -EBUSY;
1309 	}
1310 
1311 	PERMCODESIZE = mod_firmware_load(PERMCODEFILE, &PERMCODE);
1312 	if (!PERMCODE) {
1313 		printk(KERN_ERR LOGNAME ": Error loading " PERMCODEFILE);
1314 		vfree(INITCODE);
1315 		return -EBUSY;
1316 	}
1317 #endif
1318 	memcpy_toio(dev.base, PERMCODE, PERMCODESIZE);
1319 	if (msnd_upload_host(&dev, INITCODE, INITCODESIZE) < 0) {
1320 		printk(KERN_WARNING LOGNAME ": Error uploading to DSP\n");
1321 		ret = -ENODEV;
1322 		goto out;
1323 	}
1324 #ifdef HAVE_DSPCODEH
1325 	printk(KERN_INFO LOGNAME ": DSP firmware uploaded (resident)\n");
1326 #else
1327 	printk(KERN_INFO LOGNAME ": DSP firmware uploaded\n");
1328 #endif
1329 
1330 out:
1331 #ifndef HAVE_DSPCODEH
1332 	vfree(INITCODE);
1333 	vfree(PERMCODE);
1334 #endif
1335 
1336 	return ret;
1337 }
1338 
1339 #ifdef MSND_CLASSIC
reset_proteus(void)1340 static void reset_proteus(void)
1341 {
1342 	msnd_outb(HPPRORESET_ON, dev.io + HP_PROR);
1343 	mdelay(TIME_PRO_RESET);
1344 	msnd_outb(HPPRORESET_OFF, dev.io + HP_PROR);
1345 	mdelay(TIME_PRO_RESET_DONE);
1346 }
1347 #endif
1348 
initialize(void)1349 static int initialize(void)
1350 {
1351 	int err, timeout;
1352 
1353 #ifdef MSND_CLASSIC
1354 	msnd_outb(HPWAITSTATE_0, dev.io + HP_WAIT);
1355 	msnd_outb(HPBITMODE_16, dev.io + HP_BITM);
1356 
1357 	reset_proteus();
1358 #endif
1359 	if ((err = init_sma()) < 0) {
1360 		printk(KERN_WARNING LOGNAME ": Cannot initialize SMA\n");
1361 		return err;
1362 	}
1363 
1364 	if ((err = reset_dsp()) < 0)
1365 		return err;
1366 
1367 	if ((err = upload_dsp_code()) < 0) {
1368 		printk(KERN_WARNING LOGNAME ": Cannot upload DSP code\n");
1369 		return err;
1370 	}
1371 
1372 	timeout = 200;
1373 	while (readw(dev.base)) {
1374 		mdelay(1);
1375 		if (!timeout--) {
1376 			printk(KERN_DEBUG LOGNAME ": DSP reset timeout\n");
1377 			return -EIO;
1378 		}
1379 	}
1380 
1381 	mixer_setup();
1382 
1383 	return 0;
1384 }
1385 
dsp_full_reset(void)1386 static int dsp_full_reset(void)
1387 {
1388 	int rv;
1389 
1390 	if (test_bit(F_RESETTING, &dev.flags) || ++dev.nresets > 10)
1391 		return 0;
1392 
1393 	set_bit(F_RESETTING, &dev.flags);
1394 	printk(KERN_INFO LOGNAME ": DSP reset\n");
1395 	dsp_halt(NULL);			/* Unconditionally halt */
1396 	if ((rv = initialize()))
1397 		printk(KERN_WARNING LOGNAME ": DSP reset failed\n");
1398 	force_recsrc(dev.recsrc);
1399 	dsp_open(NULL);
1400 	clear_bit(F_RESETTING, &dev.flags);
1401 
1402 	return rv;
1403 }
1404 
attach_multisound(void)1405 static int __init attach_multisound(void)
1406 {
1407 	int err;
1408 
1409 	if ((err = request_irq(dev.irq, intr, 0, dev.name, &dev)) < 0) {
1410 		printk(KERN_ERR LOGNAME ": Couldn't grab IRQ %d\n", dev.irq);
1411 		return err;
1412 	}
1413 	if (request_region(dev.io, dev.numio, dev.name) == NULL) {
1414 		free_irq(dev.irq, &dev);
1415 		return -EBUSY;
1416 	}
1417 
1418 	err = dsp_full_reset();
1419 	if (err < 0) {
1420 		release_region(dev.io, dev.numio);
1421 		free_irq(dev.irq, &dev);
1422 		return err;
1423 	}
1424 
1425 	if ((err = msnd_register(&dev)) < 0) {
1426 		printk(KERN_ERR LOGNAME ": Unable to register MultiSound\n");
1427 		release_region(dev.io, dev.numio);
1428 		free_irq(dev.irq, &dev);
1429 		return err;
1430 	}
1431 
1432 	if ((dev.dsp_minor = register_sound_dsp(&dev_fileops, -1)) < 0) {
1433 		printk(KERN_ERR LOGNAME ": Unable to register DSP operations\n");
1434 		msnd_unregister(&dev);
1435 		release_region(dev.io, dev.numio);
1436 		free_irq(dev.irq, &dev);
1437 		return dev.dsp_minor;
1438 	}
1439 
1440 	if ((dev.mixer_minor = register_sound_mixer(&dev_fileops, -1)) < 0) {
1441 		printk(KERN_ERR LOGNAME ": Unable to register mixer operations\n");
1442 		unregister_sound_mixer(dev.mixer_minor);
1443 		msnd_unregister(&dev);
1444 		release_region(dev.io, dev.numio);
1445 		free_irq(dev.irq, &dev);
1446 		return dev.mixer_minor;
1447 	}
1448 
1449 	dev.ext_midi_dev = dev.hdr_midi_dev = -1;
1450 
1451 	disable_irq(dev.irq);
1452 	calibrate_adc(dev.play_sample_rate);
1453 #ifndef MSND_CLASSIC
1454 	force_recsrc(SOUND_MASK_IMIX);
1455 #endif
1456 
1457 	return 0;
1458 }
1459 
unload_multisound(void)1460 static void __exit unload_multisound(void)
1461 {
1462 	release_region(dev.io, dev.numio);
1463 	free_irq(dev.irq, &dev);
1464 	unregister_sound_mixer(dev.mixer_minor);
1465 	unregister_sound_dsp(dev.dsp_minor);
1466 	msnd_unregister(&dev);
1467 }
1468 
1469 #ifndef MSND_CLASSIC
1470 
1471 /* Pinnacle/Fiji Logical Device Configuration */
1472 
msnd_write_cfg(int cfg,int reg,int value)1473 static int __init msnd_write_cfg(int cfg, int reg, int value)
1474 {
1475 	msnd_outb(reg, cfg);
1476 	msnd_outb(value, cfg + 1);
1477 	if (value != msnd_inb(cfg + 1)) {
1478 		printk(KERN_ERR LOGNAME ": msnd_write_cfg: I/O error\n");
1479 		return -EIO;
1480 	}
1481 	return 0;
1482 }
1483 
msnd_write_cfg_io0(int cfg,int num,WORD io)1484 static int __init msnd_write_cfg_io0(int cfg, int num, WORD io)
1485 {
1486 	if (msnd_write_cfg(cfg, IREG_LOGDEVICE, num))
1487 		return -EIO;
1488 	if (msnd_write_cfg(cfg, IREG_IO0_BASEHI, HIBYTE(io)))
1489 		return -EIO;
1490 	if (msnd_write_cfg(cfg, IREG_IO0_BASELO, LOBYTE(io)))
1491 		return -EIO;
1492 	return 0;
1493 }
1494 
msnd_write_cfg_io1(int cfg,int num,WORD io)1495 static int __init msnd_write_cfg_io1(int cfg, int num, WORD io)
1496 {
1497 	if (msnd_write_cfg(cfg, IREG_LOGDEVICE, num))
1498 		return -EIO;
1499 	if (msnd_write_cfg(cfg, IREG_IO1_BASEHI, HIBYTE(io)))
1500 		return -EIO;
1501 	if (msnd_write_cfg(cfg, IREG_IO1_BASELO, LOBYTE(io)))
1502 		return -EIO;
1503 	return 0;
1504 }
1505 
msnd_write_cfg_irq(int cfg,int num,WORD irq)1506 static int __init msnd_write_cfg_irq(int cfg, int num, WORD irq)
1507 {
1508 	if (msnd_write_cfg(cfg, IREG_LOGDEVICE, num))
1509 		return -EIO;
1510 	if (msnd_write_cfg(cfg, IREG_IRQ_NUMBER, LOBYTE(irq)))
1511 		return -EIO;
1512 	if (msnd_write_cfg(cfg, IREG_IRQ_TYPE, IRQTYPE_EDGE))
1513 		return -EIO;
1514 	return 0;
1515 }
1516 
msnd_write_cfg_mem(int cfg,int num,int mem)1517 static int __init msnd_write_cfg_mem(int cfg, int num, int mem)
1518 {
1519 	WORD wmem;
1520 
1521 	mem >>= 8;
1522 	mem &= 0xfff;
1523 	wmem = (WORD)mem;
1524 	if (msnd_write_cfg(cfg, IREG_LOGDEVICE, num))
1525 		return -EIO;
1526 	if (msnd_write_cfg(cfg, IREG_MEMBASEHI, HIBYTE(wmem)))
1527 		return -EIO;
1528 	if (msnd_write_cfg(cfg, IREG_MEMBASELO, LOBYTE(wmem)))
1529 		return -EIO;
1530 	if (wmem && msnd_write_cfg(cfg, IREG_MEMCONTROL, (MEMTYPE_HIADDR | MEMTYPE_16BIT)))
1531 		return -EIO;
1532 	return 0;
1533 }
1534 
msnd_activate_logical(int cfg,int num)1535 static int __init msnd_activate_logical(int cfg, int num)
1536 {
1537 	if (msnd_write_cfg(cfg, IREG_LOGDEVICE, num))
1538 		return -EIO;
1539 	if (msnd_write_cfg(cfg, IREG_ACTIVATE, LD_ACTIVATE))
1540 		return -EIO;
1541 	return 0;
1542 }
1543 
msnd_write_cfg_logical(int cfg,int num,WORD io0,WORD io1,WORD irq,int mem)1544 static int __init msnd_write_cfg_logical(int cfg, int num, WORD io0, WORD io1, WORD irq, int mem)
1545 {
1546 	if (msnd_write_cfg(cfg, IREG_LOGDEVICE, num))
1547 		return -EIO;
1548 	if (msnd_write_cfg_io0(cfg, num, io0))
1549 		return -EIO;
1550 	if (msnd_write_cfg_io1(cfg, num, io1))
1551 		return -EIO;
1552 	if (msnd_write_cfg_irq(cfg, num, irq))
1553 		return -EIO;
1554 	if (msnd_write_cfg_mem(cfg, num, mem))
1555 		return -EIO;
1556 	if (msnd_activate_logical(cfg, num))
1557 		return -EIO;
1558 	return 0;
1559 }
1560 
1561 typedef struct msnd_pinnacle_cfg_device {
1562 	WORD io0, io1, irq;
1563 	int mem;
1564 } msnd_pinnacle_cfg_t[4];
1565 
msnd_pinnacle_cfg_devices(int cfg,int reset,msnd_pinnacle_cfg_t device)1566 static int __init msnd_pinnacle_cfg_devices(int cfg, int reset, msnd_pinnacle_cfg_t device)
1567 {
1568 	int i;
1569 
1570 	/* Reset devices if told to */
1571 	if (reset) {
1572 		printk(KERN_INFO LOGNAME ": Resetting all devices\n");
1573 		for (i = 0; i < 4; ++i)
1574 			if (msnd_write_cfg_logical(cfg, i, 0, 0, 0, 0))
1575 				return -EIO;
1576 	}
1577 
1578 	/* Configure specified devices */
1579 	for (i = 0; i < 4; ++i) {
1580 
1581 		switch (i) {
1582 		case 0:		/* DSP */
1583 			if (!(device[i].io0 && device[i].irq && device[i].mem))
1584 				continue;
1585 			break;
1586 		case 1:		/* MPU */
1587 			if (!(device[i].io0 && device[i].irq))
1588 				continue;
1589 			printk(KERN_INFO LOGNAME
1590 			       ": Configuring MPU to I/O 0x%x IRQ %d\n",
1591 			       device[i].io0, device[i].irq);
1592 			break;
1593 		case 2:		/* IDE */
1594 			if (!(device[i].io0 && device[i].io1 && device[i].irq))
1595 				continue;
1596 			printk(KERN_INFO LOGNAME
1597 			       ": Configuring IDE to I/O 0x%x, 0x%x IRQ %d\n",
1598 			       device[i].io0, device[i].io1, device[i].irq);
1599 			break;
1600 		case 3:		/* Joystick */
1601 			if (!(device[i].io0))
1602 				continue;
1603 			printk(KERN_INFO LOGNAME
1604 			       ": Configuring joystick to I/O 0x%x\n",
1605 			       device[i].io0);
1606 			break;
1607 		}
1608 
1609 		/* Configure the device */
1610 		if (msnd_write_cfg_logical(cfg, i, device[i].io0, device[i].io1, device[i].irq, device[i].mem))
1611 			return -EIO;
1612 	}
1613 
1614 	return 0;
1615 }
1616 #endif
1617 
1618 #ifdef MODULE
1619 MODULE_AUTHOR				("Andrew Veliath <andrewtv@usa.net>");
1620 MODULE_DESCRIPTION			("Turtle Beach " LONGNAME " Linux Driver");
1621 MODULE_LICENSE("GPL");
1622 
1623 static int io __initdata =		-1;
1624 static int irq __initdata =		-1;
1625 static int mem __initdata =		-1;
1626 static int write_ndelay __initdata =	-1;
1627 
1628 #ifndef MSND_CLASSIC
1629 /* Pinnacle/Fiji non-PnP Config Port */
1630 static int cfg __initdata =		-1;
1631 
1632 /* Extra Peripheral Configuration */
1633 static int reset __initdata = 0;
1634 static int mpu_io __initdata = 0;
1635 static int mpu_irq __initdata = 0;
1636 static int ide_io0 __initdata = 0;
1637 static int ide_io1 __initdata = 0;
1638 static int ide_irq __initdata = 0;
1639 static int joystick_io __initdata = 0;
1640 
1641 /* If we have the digital daugherboard... */
1642 static bool digital __initdata = false;
1643 #endif
1644 
1645 static int fifosize __initdata =	DEFFIFOSIZE;
1646 static int calibrate_signal __initdata = 0;
1647 
1648 #else /* not a module */
1649 
1650 static int write_ndelay __initdata =	-1;
1651 
1652 #ifdef MSND_CLASSIC
1653 static int io __initdata =		CONFIG_MSNDCLAS_IO;
1654 static int irq __initdata =		CONFIG_MSNDCLAS_IRQ;
1655 static int mem __initdata =		CONFIG_MSNDCLAS_MEM;
1656 #else /* Pinnacle/Fiji */
1657 
1658 static int io __initdata =		CONFIG_MSNDPIN_IO;
1659 static int irq __initdata =		CONFIG_MSNDPIN_IRQ;
1660 static int mem __initdata =		CONFIG_MSNDPIN_MEM;
1661 
1662 /* Pinnacle/Fiji non-PnP Config Port */
1663 #ifdef CONFIG_MSNDPIN_NONPNP
1664 #  ifndef CONFIG_MSNDPIN_CFG
1665 #    define CONFIG_MSNDPIN_CFG		0x250
1666 #  endif
1667 #else
1668 #  ifdef CONFIG_MSNDPIN_CFG
1669 #    undef CONFIG_MSNDPIN_CFG
1670 #  endif
1671 #  define CONFIG_MSNDPIN_CFG		-1
1672 #endif
1673 static int cfg __initdata =		CONFIG_MSNDPIN_CFG;
1674 /* If not a module, we don't need to bother with reset=1 */
1675 static int reset;
1676 
1677 /* Extra Peripheral Configuration (Default: Disable) */
1678 #ifndef CONFIG_MSNDPIN_MPU_IO
1679 #  define CONFIG_MSNDPIN_MPU_IO		0
1680 #endif
1681 static int mpu_io __initdata =		CONFIG_MSNDPIN_MPU_IO;
1682 
1683 #ifndef CONFIG_MSNDPIN_MPU_IRQ
1684 #  define CONFIG_MSNDPIN_MPU_IRQ	0
1685 #endif
1686 static int mpu_irq __initdata =		CONFIG_MSNDPIN_MPU_IRQ;
1687 
1688 #ifndef CONFIG_MSNDPIN_IDE_IO0
1689 #  define CONFIG_MSNDPIN_IDE_IO0	0
1690 #endif
1691 static int ide_io0 __initdata =		CONFIG_MSNDPIN_IDE_IO0;
1692 
1693 #ifndef CONFIG_MSNDPIN_IDE_IO1
1694 #  define CONFIG_MSNDPIN_IDE_IO1	0
1695 #endif
1696 static int ide_io1 __initdata =		CONFIG_MSNDPIN_IDE_IO1;
1697 
1698 #ifndef CONFIG_MSNDPIN_IDE_IRQ
1699 #  define CONFIG_MSNDPIN_IDE_IRQ	0
1700 #endif
1701 static int ide_irq __initdata =		CONFIG_MSNDPIN_IDE_IRQ;
1702 
1703 #ifndef CONFIG_MSNDPIN_JOYSTICK_IO
1704 #  define CONFIG_MSNDPIN_JOYSTICK_IO	0
1705 #endif
1706 static int joystick_io __initdata =	CONFIG_MSNDPIN_JOYSTICK_IO;
1707 
1708 /* Have SPDIF (Digital) Daughterboard */
1709 #ifndef CONFIG_MSNDPIN_DIGITAL
1710 #  define CONFIG_MSNDPIN_DIGITAL	0
1711 #endif
1712 static bool digital __initdata =	CONFIG_MSNDPIN_DIGITAL;
1713 
1714 #endif /* MSND_CLASSIC */
1715 
1716 #ifndef CONFIG_MSND_FIFOSIZE
1717 #  define CONFIG_MSND_FIFOSIZE		DEFFIFOSIZE
1718 #endif
1719 static int fifosize __initdata =	CONFIG_MSND_FIFOSIZE;
1720 
1721 #ifndef CONFIG_MSND_CALSIGNAL
1722 #  define CONFIG_MSND_CALSIGNAL		0
1723 #endif
1724 static int
1725 calibrate_signal __initdata =		CONFIG_MSND_CALSIGNAL;
1726 #endif /* MODULE */
1727 
1728 module_param				(io, int, 0);
1729 module_param				(irq, int, 0);
1730 module_param				(mem, int, 0);
1731 module_param				(write_ndelay, int, 0);
1732 module_param				(fifosize, int, 0);
1733 module_param				(calibrate_signal, int, 0);
1734 #ifndef MSND_CLASSIC
1735 module_param				(digital, bool, 0);
1736 module_param				(cfg, int, 0);
1737 module_param				(reset, int, 0);
1738 module_param				(mpu_io, int, 0);
1739 module_param				(mpu_irq, int, 0);
1740 module_param				(ide_io0, int, 0);
1741 module_param				(ide_io1, int, 0);
1742 module_param				(ide_irq, int, 0);
1743 module_param				(joystick_io, int, 0);
1744 #endif
1745 
msnd_init(void)1746 static int __init msnd_init(void)
1747 {
1748 	int err;
1749 #ifndef MSND_CLASSIC
1750 	static msnd_pinnacle_cfg_t pinnacle_devs;
1751 #endif /* MSND_CLASSIC */
1752 
1753 	printk(KERN_INFO LOGNAME ": Turtle Beach " LONGNAME " Linux Driver Version "
1754 	       VERSION ", Copyright (C) 1998 Andrew Veliath\n");
1755 
1756 	if (io == -1 || irq == -1 || mem == -1)
1757 		printk(KERN_WARNING LOGNAME ": io, irq and mem must be set\n");
1758 
1759 #ifdef MSND_CLASSIC
1760 	if (io == -1 ||
1761 	    !(io == 0x290 ||
1762 	      io == 0x260 ||
1763 	      io == 0x250 ||
1764 	      io == 0x240 ||
1765 	      io == 0x230 ||
1766 	      io == 0x220 ||
1767 	      io == 0x210 ||
1768 	      io == 0x3e0)) {
1769 		printk(KERN_ERR LOGNAME ": \"io\" - DSP I/O base must be set to 0x210, 0x220, 0x230, 0x240, 0x250, 0x260, 0x290, or 0x3E0\n");
1770 		return -EINVAL;
1771 	}
1772 #else
1773 	if (io == -1 ||
1774 		io < 0x100 ||
1775 		io > 0x3e0 ||
1776 		(io % 0x10) != 0) {
1777 			printk(KERN_ERR LOGNAME ": \"io\" - DSP I/O base must within the range 0x100 to 0x3E0 and must be evenly divisible by 0x10\n");
1778 			return -EINVAL;
1779 	}
1780 #endif /* MSND_CLASSIC */
1781 
1782 	if (irq == -1 ||
1783 	    !(irq == 5 ||
1784 	      irq == 7 ||
1785 	      irq == 9 ||
1786 	      irq == 10 ||
1787 	      irq == 11 ||
1788 	      irq == 12)) {
1789 		printk(KERN_ERR LOGNAME ": \"irq\" - must be set to 5, 7, 9, 10, 11 or 12\n");
1790 		return -EINVAL;
1791 	}
1792 
1793 	if (mem == -1 ||
1794 	    !(mem == 0xb0000 ||
1795 	      mem == 0xc8000 ||
1796 	      mem == 0xd0000 ||
1797 	      mem == 0xd8000 ||
1798 	      mem == 0xe0000 ||
1799 	      mem == 0xe8000)) {
1800 		printk(KERN_ERR LOGNAME ": \"mem\" - must be set to "
1801 		       "0xb0000, 0xc8000, 0xd0000, 0xd8000, 0xe0000 or 0xe8000\n");
1802 		return -EINVAL;
1803 	}
1804 
1805 #ifdef MSND_CLASSIC
1806 	switch (irq) {
1807 	case 5: dev.irqid = HPIRQ_5; break;
1808 	case 7: dev.irqid = HPIRQ_7; break;
1809 	case 9: dev.irqid = HPIRQ_9; break;
1810 	case 10: dev.irqid = HPIRQ_10; break;
1811 	case 11: dev.irqid = HPIRQ_11; break;
1812 	case 12: dev.irqid = HPIRQ_12; break;
1813 	}
1814 
1815 	switch (mem) {
1816 	case 0xb0000: dev.memid = HPMEM_B000; break;
1817 	case 0xc8000: dev.memid = HPMEM_C800; break;
1818 	case 0xd0000: dev.memid = HPMEM_D000; break;
1819 	case 0xd8000: dev.memid = HPMEM_D800; break;
1820 	case 0xe0000: dev.memid = HPMEM_E000; break;
1821 	case 0xe8000: dev.memid = HPMEM_E800; break;
1822 	}
1823 #else
1824 	if (cfg == -1) {
1825 		printk(KERN_INFO LOGNAME ": Assuming PnP mode\n");
1826 	} else if (cfg != 0x250 && cfg != 0x260 && cfg != 0x270) {
1827 		printk(KERN_INFO LOGNAME ": Config port must be 0x250, 0x260 or 0x270 (or unspecified for PnP mode)\n");
1828 		return -EINVAL;
1829 	} else {
1830 		printk(KERN_INFO LOGNAME ": Non-PnP mode: configuring at port 0x%x\n", cfg);
1831 
1832 		/* DSP */
1833 		pinnacle_devs[0].io0 = io;
1834 		pinnacle_devs[0].irq = irq;
1835 		pinnacle_devs[0].mem = mem;
1836 
1837 		/* The following are Pinnacle specific */
1838 
1839 		/* MPU */
1840 		pinnacle_devs[1].io0 = mpu_io;
1841 		pinnacle_devs[1].irq = mpu_irq;
1842 
1843 		/* IDE */
1844 		pinnacle_devs[2].io0 = ide_io0;
1845 		pinnacle_devs[2].io1 = ide_io1;
1846 		pinnacle_devs[2].irq = ide_irq;
1847 
1848 		/* Joystick */
1849 		pinnacle_devs[3].io0 = joystick_io;
1850 
1851 		if (!request_region(cfg, 2, "Pinnacle/Fiji Config")) {
1852 			printk(KERN_ERR LOGNAME ": Config port 0x%x conflict\n", cfg);
1853 			return -EIO;
1854 		}
1855 
1856 		if (msnd_pinnacle_cfg_devices(cfg, reset, pinnacle_devs)) {
1857 			printk(KERN_ERR LOGNAME ": Device configuration error\n");
1858 			release_region(cfg, 2);
1859 			return -EIO;
1860 		}
1861 		release_region(cfg, 2);
1862 	}
1863 #endif /* MSND_CLASSIC */
1864 
1865 	if (fifosize < 16)
1866 		fifosize = 16;
1867 
1868 	if (fifosize > 1024)
1869 		fifosize = 1024;
1870 
1871 	set_default_audio_parameters();
1872 #ifdef MSND_CLASSIC
1873 	dev.type = msndClassic;
1874 #else
1875 	dev.type = msndPinnacle;
1876 #endif
1877 	dev.io = io;
1878 	dev.numio = DSP_NUMIO;
1879 	dev.irq = irq;
1880 	dev.base = ioremap(mem, 0x8000);
1881 	dev.fifosize = fifosize * 1024;
1882 	dev.calibrate_signal = calibrate_signal ? 1 : 0;
1883 	dev.recsrc = 0;
1884 	dev.dspq_data_buff = DSPQ_DATA_BUFF;
1885 	dev.dspq_buff_size = DSPQ_BUFF_SIZE;
1886 	if (write_ndelay == -1)
1887 		write_ndelay = CONFIG_MSND_WRITE_NDELAY;
1888 	if (write_ndelay)
1889 		clear_bit(F_DISABLE_WRITE_NDELAY, &dev.flags);
1890 	else
1891 		set_bit(F_DISABLE_WRITE_NDELAY, &dev.flags);
1892 #ifndef MSND_CLASSIC
1893 	if (digital)
1894 		set_bit(F_HAVEDIGITAL, &dev.flags);
1895 #endif
1896 	init_waitqueue_head(&dev.writeblock);
1897 	init_waitqueue_head(&dev.readblock);
1898 	init_waitqueue_head(&dev.writeflush);
1899 	msnd_fifo_init(&dev.DAPF);
1900 	msnd_fifo_init(&dev.DARF);
1901 	spin_lock_init(&dev.lock);
1902 	printk(KERN_INFO LOGNAME ": %u byte audio FIFOs (x2)\n", dev.fifosize);
1903 	if ((err = msnd_fifo_alloc(&dev.DAPF, dev.fifosize)) < 0) {
1904 		printk(KERN_ERR LOGNAME ": Couldn't allocate write FIFO\n");
1905 		return err;
1906 	}
1907 
1908 	if ((err = msnd_fifo_alloc(&dev.DARF, dev.fifosize)) < 0) {
1909 		printk(KERN_ERR LOGNAME ": Couldn't allocate read FIFO\n");
1910 		msnd_fifo_free(&dev.DAPF);
1911 		return err;
1912 	}
1913 
1914 	if ((err = probe_multisound()) < 0) {
1915 		printk(KERN_ERR LOGNAME ": Probe failed\n");
1916 		msnd_fifo_free(&dev.DAPF);
1917 		msnd_fifo_free(&dev.DARF);
1918 		return err;
1919 	}
1920 
1921 	if ((err = attach_multisound()) < 0) {
1922 		printk(KERN_ERR LOGNAME ": Attach failed\n");
1923 		msnd_fifo_free(&dev.DAPF);
1924 		msnd_fifo_free(&dev.DARF);
1925 		return err;
1926 	}
1927 
1928 	return 0;
1929 }
1930 
msdn_cleanup(void)1931 static void __exit msdn_cleanup(void)
1932 {
1933 	unload_multisound();
1934 	msnd_fifo_free(&dev.DAPF);
1935 	msnd_fifo_free(&dev.DARF);
1936 }
1937 
1938 module_init(msnd_init);
1939 module_exit(msdn_cleanup);
1940