1 /*
2 comedi/drivers/ni_at_a2150.c
3 Driver for National Instruments AT-A2150 boards
4 Copyright (C) 2001, 2002 Frank Mori Hess <fmhess@users.sourceforge.net>
5
6 COMEDI - Linux Control and Measurement Device Interface
7 Copyright (C) 2000 David A. Schleef <ds@schleef.org>
8
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 2 of the License, or
12 (at your option) any later version.
13
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
18 */
19 /*
20 Driver: ni_at_a2150
21 Description: National Instruments AT-A2150
22 Author: Frank Mori Hess
23 Status: works
24 Devices: [National Instruments] AT-A2150C (at_a2150c), AT-2150S (at_a2150s)
25
26 If you want to ac couple the board's inputs, use AREF_OTHER.
27
28 Configuration options:
29 [0] - I/O port base address
30 [1] - IRQ (optional, required for timed conversions)
31 [2] - DMA (optional, required for timed conversions)
32
33 */
34 /*
35 Yet another driver for obsolete hardware brought to you by Frank Hess.
36 Testing and debugging help provided by Dave Andruczyk.
37
38 This driver supports the boards:
39
40 AT-A2150C
41 AT-A2150S
42
43 The only difference is their master clock frequencies.
44
45 Options:
46 [0] - base io address
47 [1] - irq
48 [2] - dma channel
49
50 References (from ftp://ftp.natinst.com/support/manuals):
51
52 320360.pdf AT-A2150 User Manual
53
54 TODO:
55
56 analog level triggering
57 TRIG_WAKE_EOS
58
59 */
60
61 #include <linux/module.h>
62 #include <linux/delay.h>
63 #include <linux/interrupt.h>
64 #include <linux/slab.h>
65 #include <linux/io.h>
66
67 #include "../comedidev.h"
68
69 #include "comedi_isadma.h"
70 #include "comedi_8254.h"
71
72 #define A2150_DMA_BUFFER_SIZE 0xff00 /* size in bytes of dma buffer */
73
74 /* Registers and bits */
75 #define CONFIG_REG 0x0
76 #define CHANNEL_BITS(x) ((x) & 0x7)
77 #define CHANNEL_MASK 0x7
78 #define CLOCK_SELECT_BITS(x) (((x) & 0x3) << 3)
79 #define CLOCK_DIVISOR_BITS(x) (((x) & 0x3) << 5)
80 #define CLOCK_MASK (0xf << 3)
81 #define ENABLE0_BIT 0x80 /* enable (don't internally ground) channels 0 and 1 */
82 #define ENABLE1_BIT 0x100 /* enable (don't internally ground) channels 2 and 3 */
83 #define AC0_BIT 0x200 /* ac couple channels 0,1 */
84 #define AC1_BIT 0x400 /* ac couple channels 2,3 */
85 #define APD_BIT 0x800 /* analog power down */
86 #define DPD_BIT 0x1000 /* digital power down */
87 #define TRIGGER_REG 0x2 /* trigger config register */
88 #define POST_TRIGGER_BITS 0x2
89 #define DELAY_TRIGGER_BITS 0x3
90 #define HW_TRIG_EN 0x10 /* enable hardware trigger */
91 #define FIFO_START_REG 0x6 /* software start aquistion trigger */
92 #define FIFO_RESET_REG 0x8 /* clears fifo + fifo flags */
93 #define FIFO_DATA_REG 0xa /* read data */
94 #define DMA_TC_CLEAR_REG 0xe /* clear dma terminal count interrupt */
95 #define STATUS_REG 0x12 /* read only */
96 #define FNE_BIT 0x1 /* fifo not empty */
97 #define OVFL_BIT 0x8 /* fifo overflow */
98 #define EDAQ_BIT 0x10 /* end of acquisition interrupt */
99 #define DCAL_BIT 0x20 /* offset calibration in progress */
100 #define INTR_BIT 0x40 /* interrupt has occurred */
101 #define DMA_TC_BIT 0x80 /* dma terminal count interrupt has occurred */
102 #define ID_BITS(x) (((x) >> 8) & 0x3)
103 #define IRQ_DMA_CNTRL_REG 0x12 /* write only */
104 #define DMA_CHAN_BITS(x) ((x) & 0x7) /* sets dma channel */
105 #define DMA_EN_BIT 0x8 /* enables dma */
106 #define IRQ_LVL_BITS(x) (((x) & 0xf) << 4) /* sets irq level */
107 #define FIFO_INTR_EN_BIT 0x100 /* enable fifo interrupts */
108 #define FIFO_INTR_FHF_BIT 0x200 /* interrupt fifo half full */
109 #define DMA_INTR_EN_BIT 0x800 /* enable interrupt on dma terminal count */
110 #define DMA_DEM_EN_BIT 0x1000 /* enables demand mode dma */
111 #define I8253_BASE_REG 0x14
112
113 struct a2150_board {
114 const char *name;
115 int clock[4]; /* master clock periods, in nanoseconds */
116 int num_clocks; /* number of available master clock speeds */
117 int ai_speed; /* maximum conversion rate in nanoseconds */
118 };
119
120 /* analog input range */
121 static const struct comedi_lrange range_a2150 = {
122 1, {
123 BIP_RANGE(2.828)
124 }
125 };
126
127 /* enum must match board indices */
128 enum { a2150_c, a2150_s };
129 static const struct a2150_board a2150_boards[] = {
130 {
131 .name = "at-a2150c",
132 .clock = {31250, 22676, 20833, 19531},
133 .num_clocks = 4,
134 .ai_speed = 19531,
135 },
136 {
137 .name = "at-a2150s",
138 .clock = {62500, 50000, 41667, 0},
139 .num_clocks = 3,
140 .ai_speed = 41667,
141 },
142 };
143
144 struct a2150_private {
145 struct comedi_isadma *dma;
146 unsigned int count; /* number of data points left to be taken */
147 int irq_dma_bits; /* irq/dma register bits */
148 int config_bits; /* config register bits */
149 };
150
151 /* interrupt service routine */
a2150_interrupt(int irq,void * d)152 static irqreturn_t a2150_interrupt(int irq, void *d)
153 {
154 struct comedi_device *dev = d;
155 struct a2150_private *devpriv = dev->private;
156 struct comedi_isadma *dma = devpriv->dma;
157 struct comedi_isadma_desc *desc = &dma->desc[0];
158 struct comedi_subdevice *s = dev->read_subdev;
159 struct comedi_async *async = s->async;
160 struct comedi_cmd *cmd = &async->cmd;
161 unsigned short *buf = desc->virt_addr;
162 unsigned int max_points, num_points, residue, leftover;
163 unsigned short dpnt;
164 int status;
165 int i;
166
167 if (!dev->attached)
168 return IRQ_HANDLED;
169
170 status = inw(dev->iobase + STATUS_REG);
171 if ((status & INTR_BIT) == 0)
172 return IRQ_NONE;
173
174 if (status & OVFL_BIT) {
175 async->events |= COMEDI_CB_ERROR;
176 comedi_handle_events(dev, s);
177 }
178
179 if ((status & DMA_TC_BIT) == 0) {
180 async->events |= COMEDI_CB_ERROR;
181 comedi_handle_events(dev, s);
182 return IRQ_HANDLED;
183 }
184
185 /*
186 * residue is the number of bytes left to be done on the dma
187 * transfer. It should always be zero at this point unless
188 * the stop_src is set to external triggering.
189 */
190 residue = comedi_isadma_disable(desc->chan);
191
192 /* figure out how many points to read */
193 max_points = comedi_bytes_to_samples(s, desc->size);
194 num_points = max_points - comedi_bytes_to_samples(s, residue);
195 if (devpriv->count < num_points && cmd->stop_src == TRIG_COUNT)
196 num_points = devpriv->count;
197
198 /* figure out how many points will be stored next time */
199 leftover = 0;
200 if (cmd->stop_src == TRIG_NONE) {
201 leftover = comedi_bytes_to_samples(s, desc->size);
202 } else if (devpriv->count > max_points) {
203 leftover = devpriv->count - max_points;
204 if (leftover > max_points)
205 leftover = max_points;
206 }
207 /* there should only be a residue if collection was stopped by having
208 * the stop_src set to an external trigger, in which case there
209 * will be no more data
210 */
211 if (residue)
212 leftover = 0;
213
214 for (i = 0; i < num_points; i++) {
215 /* write data point to comedi buffer */
216 dpnt = buf[i];
217 /* convert from 2's complement to unsigned coding */
218 dpnt ^= 0x8000;
219 comedi_buf_write_samples(s, &dpnt, 1);
220 if (cmd->stop_src == TRIG_COUNT) {
221 if (--devpriv->count == 0) { /* end of acquisition */
222 async->events |= COMEDI_CB_EOA;
223 break;
224 }
225 }
226 }
227 /* re-enable dma */
228 if (leftover) {
229 desc->size = comedi_samples_to_bytes(s, leftover);
230 comedi_isadma_program(desc);
231 }
232
233 comedi_handle_events(dev, s);
234
235 /* clear interrupt */
236 outw(0x00, dev->iobase + DMA_TC_CLEAR_REG);
237
238 return IRQ_HANDLED;
239 }
240
a2150_cancel(struct comedi_device * dev,struct comedi_subdevice * s)241 static int a2150_cancel(struct comedi_device *dev, struct comedi_subdevice *s)
242 {
243 struct a2150_private *devpriv = dev->private;
244 struct comedi_isadma *dma = devpriv->dma;
245 struct comedi_isadma_desc *desc = &dma->desc[0];
246
247 /* disable dma on card */
248 devpriv->irq_dma_bits &= ~DMA_INTR_EN_BIT & ~DMA_EN_BIT;
249 outw(devpriv->irq_dma_bits, dev->iobase + IRQ_DMA_CNTRL_REG);
250
251 /* disable computer's dma */
252 comedi_isadma_disable(desc->chan);
253
254 /* clear fifo and reset triggering circuitry */
255 outw(0, dev->iobase + FIFO_RESET_REG);
256
257 return 0;
258 }
259
260 /*
261 * sets bits in devpriv->clock_bits to nearest approximation of requested
262 * period, adjusts requested period to actual timing.
263 */
a2150_get_timing(struct comedi_device * dev,unsigned int * period,unsigned int flags)264 static int a2150_get_timing(struct comedi_device *dev, unsigned int *period,
265 unsigned int flags)
266 {
267 const struct a2150_board *thisboard = dev->board_ptr;
268 struct a2150_private *devpriv = dev->private;
269 int lub, glb, temp;
270 int lub_divisor_shift, lub_index, glb_divisor_shift, glb_index;
271 int i, j;
272
273 /* initialize greatest lower and least upper bounds */
274 lub_divisor_shift = 3;
275 lub_index = 0;
276 lub = thisboard->clock[lub_index] * (1 << lub_divisor_shift);
277 glb_divisor_shift = 0;
278 glb_index = thisboard->num_clocks - 1;
279 glb = thisboard->clock[glb_index] * (1 << glb_divisor_shift);
280
281 /* make sure period is in available range */
282 if (*period < glb)
283 *period = glb;
284 if (*period > lub)
285 *period = lub;
286
287 /* we can multiply period by 1, 2, 4, or 8, using (1 << i) */
288 for (i = 0; i < 4; i++) {
289 /* there are a maximum of 4 master clocks */
290 for (j = 0; j < thisboard->num_clocks; j++) {
291 /* temp is the period in nanosec we are evaluating */
292 temp = thisboard->clock[j] * (1 << i);
293 /* if it is the best match yet */
294 if (temp < lub && temp >= *period) {
295 lub_divisor_shift = i;
296 lub_index = j;
297 lub = temp;
298 }
299 if (temp > glb && temp <= *period) {
300 glb_divisor_shift = i;
301 glb_index = j;
302 glb = temp;
303 }
304 }
305 }
306 switch (flags & CMDF_ROUND_MASK) {
307 case CMDF_ROUND_NEAREST:
308 default:
309 /* if least upper bound is better approximation */
310 if (lub - *period < *period - glb)
311 *period = lub;
312 else
313 *period = glb;
314 break;
315 case CMDF_ROUND_UP:
316 *period = lub;
317 break;
318 case CMDF_ROUND_DOWN:
319 *period = glb;
320 break;
321 }
322
323 /* set clock bits for config register appropriately */
324 devpriv->config_bits &= ~CLOCK_MASK;
325 if (*period == lub) {
326 devpriv->config_bits |=
327 CLOCK_SELECT_BITS(lub_index) |
328 CLOCK_DIVISOR_BITS(lub_divisor_shift);
329 } else {
330 devpriv->config_bits |=
331 CLOCK_SELECT_BITS(glb_index) |
332 CLOCK_DIVISOR_BITS(glb_divisor_shift);
333 }
334
335 return 0;
336 }
337
a2150_set_chanlist(struct comedi_device * dev,unsigned int start_channel,unsigned int num_channels)338 static int a2150_set_chanlist(struct comedi_device *dev,
339 unsigned int start_channel,
340 unsigned int num_channels)
341 {
342 struct a2150_private *devpriv = dev->private;
343
344 if (start_channel + num_channels > 4)
345 return -1;
346
347 devpriv->config_bits &= ~CHANNEL_MASK;
348
349 switch (num_channels) {
350 case 1:
351 devpriv->config_bits |= CHANNEL_BITS(0x4 | start_channel);
352 break;
353 case 2:
354 if (start_channel == 0)
355 devpriv->config_bits |= CHANNEL_BITS(0x2);
356 else if (start_channel == 2)
357 devpriv->config_bits |= CHANNEL_BITS(0x3);
358 else
359 return -1;
360 break;
361 case 4:
362 devpriv->config_bits |= CHANNEL_BITS(0x1);
363 break;
364 default:
365 return -1;
366 }
367
368 return 0;
369 }
370
a2150_ai_check_chanlist(struct comedi_device * dev,struct comedi_subdevice * s,struct comedi_cmd * cmd)371 static int a2150_ai_check_chanlist(struct comedi_device *dev,
372 struct comedi_subdevice *s,
373 struct comedi_cmd *cmd)
374 {
375 unsigned int chan0 = CR_CHAN(cmd->chanlist[0]);
376 unsigned int aref0 = CR_AREF(cmd->chanlist[0]);
377 int i;
378
379 if (cmd->chanlist_len == 2 && (chan0 == 1 || chan0 == 3)) {
380 dev_dbg(dev->class_dev,
381 "length 2 chanlist must be channels 0,1 or channels 2,3\n");
382 return -EINVAL;
383 }
384
385 if (cmd->chanlist_len == 3) {
386 dev_dbg(dev->class_dev,
387 "chanlist must have 1,2 or 4 channels\n");
388 return -EINVAL;
389 }
390
391 for (i = 1; i < cmd->chanlist_len; i++) {
392 unsigned int chan = CR_CHAN(cmd->chanlist[i]);
393 unsigned int aref = CR_AREF(cmd->chanlist[i]);
394
395 if (chan != (chan0 + i)) {
396 dev_dbg(dev->class_dev,
397 "entries in chanlist must be consecutive channels, counting upwards\n");
398 return -EINVAL;
399 }
400
401 if (chan == 2)
402 aref0 = aref;
403 if (aref != aref0) {
404 dev_dbg(dev->class_dev,
405 "channels 0/1 and 2/3 must have the same analog reference\n");
406 return -EINVAL;
407 }
408 }
409
410 return 0;
411 }
412
a2150_ai_cmdtest(struct comedi_device * dev,struct comedi_subdevice * s,struct comedi_cmd * cmd)413 static int a2150_ai_cmdtest(struct comedi_device *dev,
414 struct comedi_subdevice *s, struct comedi_cmd *cmd)
415 {
416 const struct a2150_board *thisboard = dev->board_ptr;
417 int err = 0;
418 unsigned int arg;
419
420 /* Step 1 : check if triggers are trivially valid */
421
422 err |= comedi_check_trigger_src(&cmd->start_src, TRIG_NOW | TRIG_EXT);
423 err |= comedi_check_trigger_src(&cmd->scan_begin_src, TRIG_TIMER);
424 err |= comedi_check_trigger_src(&cmd->convert_src, TRIG_NOW);
425 err |= comedi_check_trigger_src(&cmd->scan_end_src, TRIG_COUNT);
426 err |= comedi_check_trigger_src(&cmd->stop_src, TRIG_COUNT | TRIG_NONE);
427
428 if (err)
429 return 1;
430
431 /* Step 2a : make sure trigger sources are unique */
432
433 err |= comedi_check_trigger_is_unique(cmd->start_src);
434 err |= comedi_check_trigger_is_unique(cmd->stop_src);
435
436 /* Step 2b : and mutually compatible */
437
438 if (err)
439 return 2;
440
441 /* Step 3: check if arguments are trivially valid */
442
443 err |= comedi_check_trigger_arg_is(&cmd->start_arg, 0);
444
445 if (cmd->convert_src == TRIG_TIMER) {
446 err |= comedi_check_trigger_arg_min(&cmd->convert_arg,
447 thisboard->ai_speed);
448 }
449
450 err |= comedi_check_trigger_arg_min(&cmd->chanlist_len, 1);
451 err |= comedi_check_trigger_arg_is(&cmd->scan_end_arg,
452 cmd->chanlist_len);
453
454 if (cmd->stop_src == TRIG_COUNT)
455 err |= comedi_check_trigger_arg_min(&cmd->stop_arg, 1);
456 else /* TRIG_NONE */
457 err |= comedi_check_trigger_arg_is(&cmd->stop_arg, 0);
458
459 if (err)
460 return 3;
461
462 /* step 4: fix up any arguments */
463
464 if (cmd->scan_begin_src == TRIG_TIMER) {
465 arg = cmd->scan_begin_arg;
466 a2150_get_timing(dev, &arg, cmd->flags);
467 err |= comedi_check_trigger_arg_is(&cmd->scan_begin_arg, arg);
468 }
469
470 if (err)
471 return 4;
472
473 /* Step 5: check channel list if it exists */
474 if (cmd->chanlist && cmd->chanlist_len > 0)
475 err |= a2150_ai_check_chanlist(dev, s, cmd);
476
477 if (err)
478 return 5;
479
480 return 0;
481 }
482
a2150_ai_cmd(struct comedi_device * dev,struct comedi_subdevice * s)483 static int a2150_ai_cmd(struct comedi_device *dev, struct comedi_subdevice *s)
484 {
485 struct a2150_private *devpriv = dev->private;
486 struct comedi_isadma *dma = devpriv->dma;
487 struct comedi_isadma_desc *desc = &dma->desc[0];
488 struct comedi_async *async = s->async;
489 struct comedi_cmd *cmd = &async->cmd;
490 unsigned int old_config_bits = devpriv->config_bits;
491 unsigned int trigger_bits;
492
493 if (cmd->flags & CMDF_PRIORITY) {
494 dev_err(dev->class_dev,
495 "dma incompatible with hard real-time interrupt (CMDF_PRIORITY), aborting\n");
496 return -1;
497 }
498 /* clear fifo and reset triggering circuitry */
499 outw(0, dev->iobase + FIFO_RESET_REG);
500
501 /* setup chanlist */
502 if (a2150_set_chanlist(dev, CR_CHAN(cmd->chanlist[0]),
503 cmd->chanlist_len) < 0)
504 return -1;
505
506 /* setup ac/dc coupling */
507 if (CR_AREF(cmd->chanlist[0]) == AREF_OTHER)
508 devpriv->config_bits |= AC0_BIT;
509 else
510 devpriv->config_bits &= ~AC0_BIT;
511 if (CR_AREF(cmd->chanlist[2]) == AREF_OTHER)
512 devpriv->config_bits |= AC1_BIT;
513 else
514 devpriv->config_bits &= ~AC1_BIT;
515
516 /* setup timing */
517 a2150_get_timing(dev, &cmd->scan_begin_arg, cmd->flags);
518
519 /* send timing, channel, config bits */
520 outw(devpriv->config_bits, dev->iobase + CONFIG_REG);
521
522 /* initialize number of samples remaining */
523 devpriv->count = cmd->stop_arg * cmd->chanlist_len;
524
525 comedi_isadma_disable(desc->chan);
526
527 /* set size of transfer to fill in 1/3 second */
528 #define ONE_THIRD_SECOND 333333333
529 desc->size = comedi_bytes_per_sample(s) * cmd->chanlist_len *
530 ONE_THIRD_SECOND / cmd->scan_begin_arg;
531 if (desc->size > desc->maxsize)
532 desc->size = desc->maxsize;
533 if (desc->size < comedi_bytes_per_sample(s))
534 desc->size = comedi_bytes_per_sample(s);
535 desc->size -= desc->size % comedi_bytes_per_sample(s);
536
537 comedi_isadma_program(desc);
538
539 /* clear dma interrupt before enabling it, to try and get rid of that
540 * one spurious interrupt that has been happening */
541 outw(0x00, dev->iobase + DMA_TC_CLEAR_REG);
542
543 /* enable dma on card */
544 devpriv->irq_dma_bits |= DMA_INTR_EN_BIT | DMA_EN_BIT;
545 outw(devpriv->irq_dma_bits, dev->iobase + IRQ_DMA_CNTRL_REG);
546
547 /* may need to wait 72 sampling periods if timing was changed */
548 comedi_8254_load(dev->pacer, 2, 72, I8254_MODE0 | I8254_BINARY);
549
550 /* setup start triggering */
551 trigger_bits = 0;
552 /* decide if we need to wait 72 periods for valid data */
553 if (cmd->start_src == TRIG_NOW &&
554 (old_config_bits & CLOCK_MASK) !=
555 (devpriv->config_bits & CLOCK_MASK)) {
556 /* set trigger source to delay trigger */
557 trigger_bits |= DELAY_TRIGGER_BITS;
558 } else {
559 /* otherwise no delay */
560 trigger_bits |= POST_TRIGGER_BITS;
561 }
562 /* enable external hardware trigger */
563 if (cmd->start_src == TRIG_EXT) {
564 trigger_bits |= HW_TRIG_EN;
565 } else if (cmd->start_src == TRIG_OTHER) {
566 /* XXX add support for level/slope start trigger using TRIG_OTHER */
567 dev_err(dev->class_dev, "you shouldn't see this?\n");
568 }
569 /* send trigger config bits */
570 outw(trigger_bits, dev->iobase + TRIGGER_REG);
571
572 /* start acquisition for soft trigger */
573 if (cmd->start_src == TRIG_NOW)
574 outw(0, dev->iobase + FIFO_START_REG);
575
576 return 0;
577 }
578
a2150_ai_eoc(struct comedi_device * dev,struct comedi_subdevice * s,struct comedi_insn * insn,unsigned long context)579 static int a2150_ai_eoc(struct comedi_device *dev,
580 struct comedi_subdevice *s,
581 struct comedi_insn *insn,
582 unsigned long context)
583 {
584 unsigned int status;
585
586 status = inw(dev->iobase + STATUS_REG);
587 if (status & FNE_BIT)
588 return 0;
589 return -EBUSY;
590 }
591
a2150_ai_rinsn(struct comedi_device * dev,struct comedi_subdevice * s,struct comedi_insn * insn,unsigned int * data)592 static int a2150_ai_rinsn(struct comedi_device *dev, struct comedi_subdevice *s,
593 struct comedi_insn *insn, unsigned int *data)
594 {
595 struct a2150_private *devpriv = dev->private;
596 unsigned int n;
597 int ret;
598
599 /* clear fifo and reset triggering circuitry */
600 outw(0, dev->iobase + FIFO_RESET_REG);
601
602 /* setup chanlist */
603 if (a2150_set_chanlist(dev, CR_CHAN(insn->chanspec), 1) < 0)
604 return -1;
605
606 /* set dc coupling */
607 devpriv->config_bits &= ~AC0_BIT;
608 devpriv->config_bits &= ~AC1_BIT;
609
610 /* send timing, channel, config bits */
611 outw(devpriv->config_bits, dev->iobase + CONFIG_REG);
612
613 /* disable dma on card */
614 devpriv->irq_dma_bits &= ~DMA_INTR_EN_BIT & ~DMA_EN_BIT;
615 outw(devpriv->irq_dma_bits, dev->iobase + IRQ_DMA_CNTRL_REG);
616
617 /* setup start triggering */
618 outw(0, dev->iobase + TRIGGER_REG);
619
620 /* start acquisition for soft trigger */
621 outw(0, dev->iobase + FIFO_START_REG);
622
623 /*
624 * there is a 35.6 sample delay for data to get through the
625 * antialias filter
626 */
627 for (n = 0; n < 36; n++) {
628 ret = comedi_timeout(dev, s, insn, a2150_ai_eoc, 0);
629 if (ret)
630 return ret;
631
632 inw(dev->iobase + FIFO_DATA_REG);
633 }
634
635 /* read data */
636 for (n = 0; n < insn->n; n++) {
637 ret = comedi_timeout(dev, s, insn, a2150_ai_eoc, 0);
638 if (ret)
639 return ret;
640
641 data[n] = inw(dev->iobase + FIFO_DATA_REG);
642 data[n] ^= 0x8000;
643 }
644
645 /* clear fifo and reset triggering circuitry */
646 outw(0, dev->iobase + FIFO_RESET_REG);
647
648 return n;
649 }
650
a2150_alloc_irq_and_dma(struct comedi_device * dev,struct comedi_devconfig * it)651 static void a2150_alloc_irq_and_dma(struct comedi_device *dev,
652 struct comedi_devconfig *it)
653 {
654 struct a2150_private *devpriv = dev->private;
655 unsigned int irq_num = it->options[1];
656 unsigned int dma_chan = it->options[2];
657
658 /*
659 * Only IRQs 15, 14, 12-9, and 7-3 are valid.
660 * Only DMA channels 7-5 and 3-0 are valid.
661 */
662 if (irq_num > 15 || dma_chan > 7 ||
663 !((1 << irq_num) & 0xdef8) || !((1 << dma_chan) & 0xef))
664 return;
665
666 if (request_irq(irq_num, a2150_interrupt, 0, dev->board_name, dev))
667 return;
668
669 /* DMA uses 1 buffer */
670 devpriv->dma = comedi_isadma_alloc(dev, 1, dma_chan, dma_chan,
671 A2150_DMA_BUFFER_SIZE,
672 COMEDI_ISADMA_READ);
673 if (!devpriv->dma) {
674 free_irq(irq_num, dev);
675 } else {
676 dev->irq = irq_num;
677 devpriv->irq_dma_bits = IRQ_LVL_BITS(irq_num) |
678 DMA_CHAN_BITS(dma_chan);
679 }
680 }
681
a2150_free_dma(struct comedi_device * dev)682 static void a2150_free_dma(struct comedi_device *dev)
683 {
684 struct a2150_private *devpriv = dev->private;
685
686 if (devpriv)
687 comedi_isadma_free(devpriv->dma);
688 }
689
690 /* probes board type, returns offset */
a2150_probe(struct comedi_device * dev)691 static int a2150_probe(struct comedi_device *dev)
692 {
693 int status = inw(dev->iobase + STATUS_REG);
694
695 return ID_BITS(status);
696 }
697
a2150_attach(struct comedi_device * dev,struct comedi_devconfig * it)698 static int a2150_attach(struct comedi_device *dev, struct comedi_devconfig *it)
699 {
700 const struct a2150_board *thisboard;
701 struct a2150_private *devpriv;
702 struct comedi_subdevice *s;
703 static const int timeout = 2000;
704 int i;
705 int ret;
706
707 devpriv = comedi_alloc_devpriv(dev, sizeof(*devpriv));
708 if (!devpriv)
709 return -ENOMEM;
710
711 ret = comedi_request_region(dev, it->options[0], 0x1c);
712 if (ret)
713 return ret;
714
715 i = a2150_probe(dev);
716 if (i >= ARRAY_SIZE(a2150_boards))
717 return -ENODEV;
718
719 dev->board_ptr = a2150_boards + i;
720 thisboard = dev->board_ptr;
721 dev->board_name = thisboard->name;
722
723 /* an IRQ and DMA are required to support async commands */
724 a2150_alloc_irq_and_dma(dev, it);
725
726 dev->pacer = comedi_8254_init(dev->iobase + I8253_BASE_REG,
727 0, I8254_IO8, 0);
728 if (!dev->pacer)
729 return -ENOMEM;
730
731 ret = comedi_alloc_subdevices(dev, 1);
732 if (ret)
733 return ret;
734
735 /* analog input subdevice */
736 s = &dev->subdevices[0];
737 s->type = COMEDI_SUBD_AI;
738 s->subdev_flags = SDF_READABLE | SDF_GROUND | SDF_OTHER;
739 s->n_chan = 4;
740 s->maxdata = 0xffff;
741 s->range_table = &range_a2150;
742 s->insn_read = a2150_ai_rinsn;
743 if (dev->irq) {
744 dev->read_subdev = s;
745 s->subdev_flags |= SDF_CMD_READ;
746 s->len_chanlist = s->n_chan;
747 s->do_cmd = a2150_ai_cmd;
748 s->do_cmdtest = a2150_ai_cmdtest;
749 s->cancel = a2150_cancel;
750 }
751
752 /* set card's irq and dma levels */
753 outw(devpriv->irq_dma_bits, dev->iobase + IRQ_DMA_CNTRL_REG);
754
755 /* reset and sync adc clock circuitry */
756 outw_p(DPD_BIT | APD_BIT, dev->iobase + CONFIG_REG);
757 outw_p(DPD_BIT, dev->iobase + CONFIG_REG);
758 /* initialize configuration register */
759 devpriv->config_bits = 0;
760 outw(devpriv->config_bits, dev->iobase + CONFIG_REG);
761 /* wait until offset calibration is done, then enable analog inputs */
762 for (i = 0; i < timeout; i++) {
763 if ((DCAL_BIT & inw(dev->iobase + STATUS_REG)) == 0)
764 break;
765 udelay(1000);
766 }
767 if (i == timeout) {
768 dev_err(dev->class_dev,
769 "timed out waiting for offset calibration to complete\n");
770 return -ETIME;
771 }
772 devpriv->config_bits |= ENABLE0_BIT | ENABLE1_BIT;
773 outw(devpriv->config_bits, dev->iobase + CONFIG_REG);
774
775 return 0;
776 };
777
a2150_detach(struct comedi_device * dev)778 static void a2150_detach(struct comedi_device *dev)
779 {
780 if (dev->iobase)
781 outw(APD_BIT | DPD_BIT, dev->iobase + CONFIG_REG);
782 a2150_free_dma(dev);
783 comedi_legacy_detach(dev);
784 };
785
786 static struct comedi_driver ni_at_a2150_driver = {
787 .driver_name = "ni_at_a2150",
788 .module = THIS_MODULE,
789 .attach = a2150_attach,
790 .detach = a2150_detach,
791 };
792 module_comedi_driver(ni_at_a2150_driver);
793
794 MODULE_AUTHOR("Comedi http://www.comedi.org");
795 MODULE_DESCRIPTION("Comedi low-level driver");
796 MODULE_LICENSE("GPL");
797