1 /*
2 * clk-max-gen.c - Generic clock driver for Maxim PMICs clocks
3 *
4 * Copyright (C) 2014 Google, Inc
5 *
6 * Copyright (C) 2012 Samsung Electornics
7 * Jonghwa Lee <jonghwa3.lee@samsung.com>
8 *
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by the
11 * Free Software Foundation; either version 2 of the License, or (at your
12 * option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * This driver is based on clk-max77686.c
20 *
21 */
22
23 #include <linux/kernel.h>
24 #include <linux/slab.h>
25 #include <linux/err.h>
26 #include <linux/regmap.h>
27 #include <linux/platform_device.h>
28 #include <linux/clk-provider.h>
29 #include <linux/mutex.h>
30 #include <linux/clkdev.h>
31 #include <linux/of.h>
32 #include <linux/export.h>
33
34 #include "clk-max-gen.h"
35
36 struct max_gen_clk {
37 struct regmap *regmap;
38 u32 mask;
39 u32 reg;
40 struct clk_hw hw;
41 };
42
to_max_gen_clk(struct clk_hw * hw)43 static struct max_gen_clk *to_max_gen_clk(struct clk_hw *hw)
44 {
45 return container_of(hw, struct max_gen_clk, hw);
46 }
47
max_gen_clk_prepare(struct clk_hw * hw)48 static int max_gen_clk_prepare(struct clk_hw *hw)
49 {
50 struct max_gen_clk *max_gen = to_max_gen_clk(hw);
51
52 return regmap_update_bits(max_gen->regmap, max_gen->reg,
53 max_gen->mask, max_gen->mask);
54 }
55
max_gen_clk_unprepare(struct clk_hw * hw)56 static void max_gen_clk_unprepare(struct clk_hw *hw)
57 {
58 struct max_gen_clk *max_gen = to_max_gen_clk(hw);
59
60 regmap_update_bits(max_gen->regmap, max_gen->reg,
61 max_gen->mask, ~max_gen->mask);
62 }
63
max_gen_clk_is_prepared(struct clk_hw * hw)64 static int max_gen_clk_is_prepared(struct clk_hw *hw)
65 {
66 struct max_gen_clk *max_gen = to_max_gen_clk(hw);
67 int ret;
68 u32 val;
69
70 ret = regmap_read(max_gen->regmap, max_gen->reg, &val);
71
72 if (ret < 0)
73 return -EINVAL;
74
75 return val & max_gen->mask;
76 }
77
max_gen_recalc_rate(struct clk_hw * hw,unsigned long parent_rate)78 static unsigned long max_gen_recalc_rate(struct clk_hw *hw,
79 unsigned long parent_rate)
80 {
81 return 32768;
82 }
83
84 struct clk_ops max_gen_clk_ops = {
85 .prepare = max_gen_clk_prepare,
86 .unprepare = max_gen_clk_unprepare,
87 .is_prepared = max_gen_clk_is_prepared,
88 .recalc_rate = max_gen_recalc_rate,
89 };
90 EXPORT_SYMBOL_GPL(max_gen_clk_ops);
91
max_gen_clk_register(struct device * dev,struct max_gen_clk * max_gen)92 static struct clk *max_gen_clk_register(struct device *dev,
93 struct max_gen_clk *max_gen)
94 {
95 struct clk *clk;
96 struct clk_hw *hw = &max_gen->hw;
97 int ret;
98
99 clk = devm_clk_register(dev, hw);
100 if (IS_ERR(clk))
101 return clk;
102
103 ret = clk_register_clkdev(clk, hw->init->name, NULL);
104
105 if (ret)
106 return ERR_PTR(ret);
107
108 return clk;
109 }
110
max_gen_clk_probe(struct platform_device * pdev,struct regmap * regmap,u32 reg,struct clk_init_data * clks_init,int num_init)111 int max_gen_clk_probe(struct platform_device *pdev, struct regmap *regmap,
112 u32 reg, struct clk_init_data *clks_init, int num_init)
113 {
114 int i, ret;
115 struct max_gen_clk *max_gen_clks;
116 struct clk **clocks;
117 struct device *dev = pdev->dev.parent;
118 const char *clk_name;
119 struct clk_init_data *init;
120
121 clocks = devm_kzalloc(dev, sizeof(struct clk *) * num_init, GFP_KERNEL);
122 if (!clocks)
123 return -ENOMEM;
124
125 max_gen_clks = devm_kzalloc(dev, sizeof(struct max_gen_clk)
126 * num_init, GFP_KERNEL);
127 if (!max_gen_clks)
128 return -ENOMEM;
129
130 for (i = 0; i < num_init; i++) {
131 max_gen_clks[i].regmap = regmap;
132 max_gen_clks[i].mask = 1 << i;
133 max_gen_clks[i].reg = reg;
134
135 init = devm_kzalloc(dev, sizeof(*init), GFP_KERNEL);
136 if (!init)
137 return -ENOMEM;
138
139 if (dev->of_node &&
140 !of_property_read_string_index(dev->of_node,
141 "clock-output-names",
142 i, &clk_name))
143 init->name = clk_name;
144 else
145 init->name = clks_init[i].name;
146
147 init->ops = clks_init[i].ops;
148 init->flags = clks_init[i].flags;
149
150 max_gen_clks[i].hw.init = init;
151
152 clocks[i] = max_gen_clk_register(dev, &max_gen_clks[i]);
153 if (IS_ERR(clocks[i])) {
154 ret = PTR_ERR(clocks[i]);
155 dev_err(dev, "failed to register %s\n",
156 max_gen_clks[i].hw.init->name);
157 return ret;
158 }
159 }
160
161 platform_set_drvdata(pdev, clocks);
162
163 if (dev->of_node) {
164 struct clk_onecell_data *of_data;
165
166 of_data = devm_kzalloc(dev, sizeof(*of_data), GFP_KERNEL);
167 if (!of_data)
168 return -ENOMEM;
169
170 of_data->clks = clocks;
171 of_data->clk_num = num_init;
172 ret = of_clk_add_provider(dev->of_node, of_clk_src_onecell_get,
173 of_data);
174
175 if (ret) {
176 dev_err(dev, "failed to register OF clock provider\n");
177 return ret;
178 }
179 }
180
181 return 0;
182 }
183 EXPORT_SYMBOL_GPL(max_gen_clk_probe);
184
max_gen_clk_remove(struct platform_device * pdev,int num_init)185 int max_gen_clk_remove(struct platform_device *pdev, int num_init)
186 {
187 struct device *dev = pdev->dev.parent;
188
189 if (dev->of_node)
190 of_clk_del_provider(dev->of_node);
191
192 return 0;
193 }
194 EXPORT_SYMBOL_GPL(max_gen_clk_remove);
195