1 /* exynos_drm.h 2 * 3 * Copyright (c) 2011 Samsung Electronics Co., Ltd. 4 * Authors: 5 * Inki Dae <inki.dae@samsung.com> 6 * Joonyoung Shim <jy0922.shim@samsung.com> 7 * Seung-Woo Kim <sw0312.kim@samsung.com> 8 * 9 * This program is free software; you can redistribute it and/or modify it 10 * under the terms of the GNU General Public License as published by the 11 * Free Software Foundation; either version 2 of the License, or (at your 12 * option) any later version. 13 */ 14 #ifndef _EXYNOS_DRM_H_ 15 #define _EXYNOS_DRM_H_ 16 17 #include <uapi/drm/exynos_drm.h> 18 #include <video/videomode.h> 19 20 /** 21 * A structure for lcd panel information. 22 * 23 * @timing: default video mode for initializing 24 * @width_mm: physical size of lcd width. 25 * @height_mm: physical size of lcd height. 26 */ 27 struct exynos_drm_panel_info { 28 struct videomode vm; 29 u32 width_mm; 30 u32 height_mm; 31 }; 32 33 /** 34 * Platform Specific Structure for DRM based FIMD. 35 * 36 * @panel: default panel info for initializing 37 * @default_win: default window layer number to be used for UI. 38 * @bpp: default bit per pixel. 39 */ 40 struct exynos_drm_fimd_pdata { 41 struct exynos_drm_panel_info panel; 42 u32 vidcon0; 43 u32 vidcon1; 44 unsigned int default_win; 45 unsigned int bpp; 46 }; 47 48 /** 49 * Platform Specific Structure for DRM based HDMI. 50 * 51 * @hdmi_dev: device point to specific hdmi driver. 52 * @mixer_dev: device point to specific mixer driver. 53 * 54 * this structure is used for common hdmi driver and each device object 55 * would be used to access specific device driver(hdmi or mixer driver) 56 */ 57 struct exynos_drm_common_hdmi_pd { 58 struct device *hdmi_dev; 59 struct device *mixer_dev; 60 }; 61 62 /** 63 * Platform Specific Structure for DRM based HDMI core. 64 * 65 * @is_v13: set if hdmi version 13 is. 66 * @cfg_hpd: function pointer to configure hdmi hotplug detection pin 67 * @get_hpd: function pointer to get value of hdmi hotplug detection pin 68 */ 69 struct exynos_drm_hdmi_pdata { 70 bool is_v13; 71 void (*cfg_hpd)(bool external); 72 int (*get_hpd)(void); 73 }; 74 75 /** 76 * Platform Specific Structure for DRM based IPP. 77 * 78 * @inv_pclk: if set 1. invert pixel clock 79 * @inv_vsync: if set 1. invert vsync signal for wb 80 * @inv_href: if set 1. invert href signal 81 * @inv_hsync: if set 1. invert hsync signal for wb 82 */ 83 struct exynos_drm_ipp_pol { 84 unsigned int inv_pclk; 85 unsigned int inv_vsync; 86 unsigned int inv_href; 87 unsigned int inv_hsync; 88 }; 89 90 /** 91 * Platform Specific Structure for DRM based FIMC. 92 * 93 * @pol: current hardware block polarity settings. 94 * @clk_rate: current hardware clock rate. 95 */ 96 struct exynos_drm_fimc_pdata { 97 struct exynos_drm_ipp_pol pol; 98 int clk_rate; 99 }; 100 101 #endif /* _EXYNOS_DRM_H_ */ 102