1 /*
2 * Copyright © 2006-2007 Intel Corporation
3 * Copyright (c) 2006 Dave Airlie <airlied@linux.ie>
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE.
23 *
24 * Authors:
25 * Eric Anholt <eric@anholt.net>
26 * Dave Airlie <airlied@linux.ie>
27 * Jesse Barnes <jesse.barnes@intel.com>
28 */
29
30 #include <acpi/button.h>
31 #include <linux/dmi.h>
32 #include <linux/i2c.h>
33 #include <linux/slab.h>
34 #include <drm/drmP.h>
35 #include <drm/drm_atomic_helper.h>
36 #include <drm/drm_crtc.h>
37 #include <drm/drm_edid.h>
38 #include "intel_drv.h"
39 #include <drm/i915_drm.h>
40 #include "i915_drv.h"
41 #include <linux/acpi.h>
42
43 /* Private structure for the integrated LVDS support */
44 struct intel_lvds_connector {
45 struct intel_connector base;
46
47 struct notifier_block lid_notifier;
48 };
49
50 struct intel_lvds_encoder {
51 struct intel_encoder base;
52
53 bool is_dual_link;
54 u32 reg;
55 u32 a3_power;
56
57 struct intel_lvds_connector *attached_connector;
58 };
59
to_lvds_encoder(struct drm_encoder * encoder)60 static struct intel_lvds_encoder *to_lvds_encoder(struct drm_encoder *encoder)
61 {
62 return container_of(encoder, struct intel_lvds_encoder, base.base);
63 }
64
to_lvds_connector(struct drm_connector * connector)65 static struct intel_lvds_connector *to_lvds_connector(struct drm_connector *connector)
66 {
67 return container_of(connector, struct intel_lvds_connector, base.base);
68 }
69
intel_lvds_get_hw_state(struct intel_encoder * encoder,enum pipe * pipe)70 static bool intel_lvds_get_hw_state(struct intel_encoder *encoder,
71 enum pipe *pipe)
72 {
73 struct drm_device *dev = encoder->base.dev;
74 struct drm_i915_private *dev_priv = dev->dev_private;
75 struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
76 enum intel_display_power_domain power_domain;
77 u32 tmp;
78
79 power_domain = intel_display_port_power_domain(encoder);
80 if (!intel_display_power_is_enabled(dev_priv, power_domain))
81 return false;
82
83 tmp = I915_READ(lvds_encoder->reg);
84
85 if (!(tmp & LVDS_PORT_EN))
86 return false;
87
88 if (HAS_PCH_CPT(dev))
89 *pipe = PORT_TO_PIPE_CPT(tmp);
90 else
91 *pipe = PORT_TO_PIPE(tmp);
92
93 return true;
94 }
95
intel_lvds_get_config(struct intel_encoder * encoder,struct intel_crtc_state * pipe_config)96 static void intel_lvds_get_config(struct intel_encoder *encoder,
97 struct intel_crtc_state *pipe_config)
98 {
99 struct drm_device *dev = encoder->base.dev;
100 struct drm_i915_private *dev_priv = dev->dev_private;
101 u32 lvds_reg, tmp, flags = 0;
102 int dotclock;
103
104 if (HAS_PCH_SPLIT(dev))
105 lvds_reg = PCH_LVDS;
106 else
107 lvds_reg = LVDS;
108
109 tmp = I915_READ(lvds_reg);
110 if (tmp & LVDS_HSYNC_POLARITY)
111 flags |= DRM_MODE_FLAG_NHSYNC;
112 else
113 flags |= DRM_MODE_FLAG_PHSYNC;
114 if (tmp & LVDS_VSYNC_POLARITY)
115 flags |= DRM_MODE_FLAG_NVSYNC;
116 else
117 flags |= DRM_MODE_FLAG_PVSYNC;
118
119 pipe_config->base.adjusted_mode.flags |= flags;
120
121 /* gen2/3 store dither state in pfit control, needs to match */
122 if (INTEL_INFO(dev)->gen < 4) {
123 tmp = I915_READ(PFIT_CONTROL);
124
125 pipe_config->gmch_pfit.control |= tmp & PANEL_8TO6_DITHER_ENABLE;
126 }
127
128 dotclock = pipe_config->port_clock;
129
130 if (HAS_PCH_SPLIT(dev_priv->dev))
131 ironlake_check_encoder_dotclock(pipe_config, dotclock);
132
133 pipe_config->base.adjusted_mode.crtc_clock = dotclock;
134 }
135
intel_pre_enable_lvds(struct intel_encoder * encoder)136 static void intel_pre_enable_lvds(struct intel_encoder *encoder)
137 {
138 struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
139 struct drm_device *dev = encoder->base.dev;
140 struct drm_i915_private *dev_priv = dev->dev_private;
141 struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc);
142 const struct drm_display_mode *adjusted_mode =
143 &crtc->config->base.adjusted_mode;
144 int pipe = crtc->pipe;
145 u32 temp;
146
147 if (HAS_PCH_SPLIT(dev)) {
148 assert_fdi_rx_pll_disabled(dev_priv, pipe);
149 assert_shared_dpll_disabled(dev_priv,
150 intel_crtc_to_shared_dpll(crtc));
151 } else {
152 assert_pll_disabled(dev_priv, pipe);
153 }
154
155 temp = I915_READ(lvds_encoder->reg);
156 temp |= LVDS_PORT_EN | LVDS_A0A2_CLKA_POWER_UP;
157
158 if (HAS_PCH_CPT(dev)) {
159 temp &= ~PORT_TRANS_SEL_MASK;
160 temp |= PORT_TRANS_SEL_CPT(pipe);
161 } else {
162 if (pipe == 1) {
163 temp |= LVDS_PIPEB_SELECT;
164 } else {
165 temp &= ~LVDS_PIPEB_SELECT;
166 }
167 }
168
169 /* set the corresponsding LVDS_BORDER bit */
170 temp &= ~LVDS_BORDER_ENABLE;
171 temp |= crtc->config->gmch_pfit.lvds_border_bits;
172 /* Set the B0-B3 data pairs corresponding to whether we're going to
173 * set the DPLLs for dual-channel mode or not.
174 */
175 if (lvds_encoder->is_dual_link)
176 temp |= LVDS_B0B3_POWER_UP | LVDS_CLKB_POWER_UP;
177 else
178 temp &= ~(LVDS_B0B3_POWER_UP | LVDS_CLKB_POWER_UP);
179
180 /* It would be nice to set 24 vs 18-bit mode (LVDS_A3_POWER_UP)
181 * appropriately here, but we need to look more thoroughly into how
182 * panels behave in the two modes. For now, let's just maintain the
183 * value we got from the BIOS.
184 */
185 temp &= ~LVDS_A3_POWER_MASK;
186 temp |= lvds_encoder->a3_power;
187
188 /* Set the dithering flag on LVDS as needed, note that there is no
189 * special lvds dither control bit on pch-split platforms, dithering is
190 * only controlled through the PIPECONF reg. */
191 if (INTEL_INFO(dev)->gen == 4) {
192 /* Bspec wording suggests that LVDS port dithering only exists
193 * for 18bpp panels. */
194 if (crtc->config->dither && crtc->config->pipe_bpp == 18)
195 temp |= LVDS_ENABLE_DITHER;
196 else
197 temp &= ~LVDS_ENABLE_DITHER;
198 }
199 temp &= ~(LVDS_HSYNC_POLARITY | LVDS_VSYNC_POLARITY);
200 if (adjusted_mode->flags & DRM_MODE_FLAG_NHSYNC)
201 temp |= LVDS_HSYNC_POLARITY;
202 if (adjusted_mode->flags & DRM_MODE_FLAG_NVSYNC)
203 temp |= LVDS_VSYNC_POLARITY;
204
205 I915_WRITE(lvds_encoder->reg, temp);
206 }
207
208 /**
209 * Sets the power state for the panel.
210 */
intel_enable_lvds(struct intel_encoder * encoder)211 static void intel_enable_lvds(struct intel_encoder *encoder)
212 {
213 struct drm_device *dev = encoder->base.dev;
214 struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
215 struct intel_connector *intel_connector =
216 &lvds_encoder->attached_connector->base;
217 struct drm_i915_private *dev_priv = dev->dev_private;
218 u32 ctl_reg, stat_reg;
219
220 if (HAS_PCH_SPLIT(dev)) {
221 ctl_reg = PCH_PP_CONTROL;
222 stat_reg = PCH_PP_STATUS;
223 } else {
224 ctl_reg = PP_CONTROL;
225 stat_reg = PP_STATUS;
226 }
227
228 I915_WRITE(lvds_encoder->reg, I915_READ(lvds_encoder->reg) | LVDS_PORT_EN);
229
230 I915_WRITE(ctl_reg, I915_READ(ctl_reg) | POWER_TARGET_ON);
231 POSTING_READ(lvds_encoder->reg);
232 if (wait_for((I915_READ(stat_reg) & PP_ON) != 0, 1000))
233 DRM_ERROR("timed out waiting for panel to power on\n");
234
235 intel_panel_enable_backlight(intel_connector);
236 }
237
intel_disable_lvds(struct intel_encoder * encoder)238 static void intel_disable_lvds(struct intel_encoder *encoder)
239 {
240 struct drm_device *dev = encoder->base.dev;
241 struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
242 struct intel_connector *intel_connector =
243 &lvds_encoder->attached_connector->base;
244 struct drm_i915_private *dev_priv = dev->dev_private;
245 u32 ctl_reg, stat_reg;
246
247 if (HAS_PCH_SPLIT(dev)) {
248 ctl_reg = PCH_PP_CONTROL;
249 stat_reg = PCH_PP_STATUS;
250 } else {
251 ctl_reg = PP_CONTROL;
252 stat_reg = PP_STATUS;
253 }
254
255 intel_panel_disable_backlight(intel_connector);
256
257 I915_WRITE(ctl_reg, I915_READ(ctl_reg) & ~POWER_TARGET_ON);
258 if (wait_for((I915_READ(stat_reg) & PP_ON) == 0, 1000))
259 DRM_ERROR("timed out waiting for panel to power off\n");
260
261 I915_WRITE(lvds_encoder->reg, I915_READ(lvds_encoder->reg) & ~LVDS_PORT_EN);
262 POSTING_READ(lvds_encoder->reg);
263 }
264
265 static enum drm_mode_status
intel_lvds_mode_valid(struct drm_connector * connector,struct drm_display_mode * mode)266 intel_lvds_mode_valid(struct drm_connector *connector,
267 struct drm_display_mode *mode)
268 {
269 struct intel_connector *intel_connector = to_intel_connector(connector);
270 struct drm_display_mode *fixed_mode = intel_connector->panel.fixed_mode;
271
272 if (mode->hdisplay > fixed_mode->hdisplay)
273 return MODE_PANEL;
274 if (mode->vdisplay > fixed_mode->vdisplay)
275 return MODE_PANEL;
276
277 return MODE_OK;
278 }
279
intel_lvds_compute_config(struct intel_encoder * intel_encoder,struct intel_crtc_state * pipe_config)280 static bool intel_lvds_compute_config(struct intel_encoder *intel_encoder,
281 struct intel_crtc_state *pipe_config)
282 {
283 struct drm_device *dev = intel_encoder->base.dev;
284 struct intel_lvds_encoder *lvds_encoder =
285 to_lvds_encoder(&intel_encoder->base);
286 struct intel_connector *intel_connector =
287 &lvds_encoder->attached_connector->base;
288 struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;
289 struct intel_crtc *intel_crtc = to_intel_crtc(pipe_config->base.crtc);
290 unsigned int lvds_bpp;
291
292 /* Should never happen!! */
293 if (INTEL_INFO(dev)->gen < 4 && intel_crtc->pipe == 0) {
294 DRM_ERROR("Can't support LVDS on pipe A\n");
295 return false;
296 }
297
298 if (lvds_encoder->a3_power == LVDS_A3_POWER_UP)
299 lvds_bpp = 8*3;
300 else
301 lvds_bpp = 6*3;
302
303 if (lvds_bpp != pipe_config->pipe_bpp && !pipe_config->bw_constrained) {
304 DRM_DEBUG_KMS("forcing display bpp (was %d) to LVDS (%d)\n",
305 pipe_config->pipe_bpp, lvds_bpp);
306 pipe_config->pipe_bpp = lvds_bpp;
307 }
308
309 /*
310 * We have timings from the BIOS for the panel, put them in
311 * to the adjusted mode. The CRTC will be set up for this mode,
312 * with the panel scaling set up to source from the H/VDisplay
313 * of the original mode.
314 */
315 intel_fixed_panel_mode(intel_connector->panel.fixed_mode,
316 adjusted_mode);
317
318 if (HAS_PCH_SPLIT(dev)) {
319 pipe_config->has_pch_encoder = true;
320
321 intel_pch_panel_fitting(intel_crtc, pipe_config,
322 intel_connector->panel.fitting_mode);
323 } else {
324 intel_gmch_panel_fitting(intel_crtc, pipe_config,
325 intel_connector->panel.fitting_mode);
326
327 }
328
329 /*
330 * XXX: It would be nice to support lower refresh rates on the
331 * panels to reduce power consumption, and perhaps match the
332 * user's requested refresh rate.
333 */
334
335 return true;
336 }
337
338 /**
339 * Detect the LVDS connection.
340 *
341 * Since LVDS doesn't have hotlug, we use the lid as a proxy. Open means
342 * connected and closed means disconnected. We also send hotplug events as
343 * needed, using lid status notification from the input layer.
344 */
345 static enum drm_connector_status
intel_lvds_detect(struct drm_connector * connector,bool force)346 intel_lvds_detect(struct drm_connector *connector, bool force)
347 {
348 struct drm_device *dev = connector->dev;
349 enum drm_connector_status status;
350
351 DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
352 connector->base.id, connector->name);
353
354 status = intel_panel_detect(dev);
355 if (status != connector_status_unknown)
356 return status;
357
358 return connector_status_connected;
359 }
360
361 /**
362 * Return the list of DDC modes if available, or the BIOS fixed mode otherwise.
363 */
intel_lvds_get_modes(struct drm_connector * connector)364 static int intel_lvds_get_modes(struct drm_connector *connector)
365 {
366 struct intel_lvds_connector *lvds_connector = to_lvds_connector(connector);
367 struct drm_device *dev = connector->dev;
368 struct drm_display_mode *mode;
369
370 /* use cached edid if we have one */
371 if (!IS_ERR_OR_NULL(lvds_connector->base.edid))
372 return drm_add_edid_modes(connector, lvds_connector->base.edid);
373
374 mode = drm_mode_duplicate(dev, lvds_connector->base.panel.fixed_mode);
375 if (mode == NULL)
376 return 0;
377
378 drm_mode_probed_add(connector, mode);
379 return 1;
380 }
381
intel_no_modeset_on_lid_dmi_callback(const struct dmi_system_id * id)382 static int intel_no_modeset_on_lid_dmi_callback(const struct dmi_system_id *id)
383 {
384 DRM_INFO("Skipping forced modeset for %s\n", id->ident);
385 return 1;
386 }
387
388 /* The GPU hangs up on these systems if modeset is performed on LID open */
389 static const struct dmi_system_id intel_no_modeset_on_lid[] = {
390 {
391 .callback = intel_no_modeset_on_lid_dmi_callback,
392 .ident = "Toshiba Tecra A11",
393 .matches = {
394 DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
395 DMI_MATCH(DMI_PRODUCT_NAME, "TECRA A11"),
396 },
397 },
398
399 { } /* terminating entry */
400 };
401
402 /*
403 * Lid events. Note the use of 'modeset':
404 * - we set it to MODESET_ON_LID_OPEN on lid close,
405 * and set it to MODESET_DONE on open
406 * - we use it as a "only once" bit (ie we ignore
407 * duplicate events where it was already properly set)
408 * - the suspend/resume paths will set it to
409 * MODESET_SUSPENDED and ignore the lid open event,
410 * because they restore the mode ("lid open").
411 */
intel_lid_notify(struct notifier_block * nb,unsigned long val,void * unused)412 static int intel_lid_notify(struct notifier_block *nb, unsigned long val,
413 void *unused)
414 {
415 struct intel_lvds_connector *lvds_connector =
416 container_of(nb, struct intel_lvds_connector, lid_notifier);
417 struct drm_connector *connector = &lvds_connector->base.base;
418 struct drm_device *dev = connector->dev;
419 struct drm_i915_private *dev_priv = dev->dev_private;
420
421 if (dev->switch_power_state != DRM_SWITCH_POWER_ON)
422 return NOTIFY_OK;
423
424 mutex_lock(&dev_priv->modeset_restore_lock);
425 if (dev_priv->modeset_restore == MODESET_SUSPENDED)
426 goto exit;
427 /*
428 * check and update the status of LVDS connector after receiving
429 * the LID nofication event.
430 */
431 connector->status = connector->funcs->detect(connector, false);
432
433 /* Don't force modeset on machines where it causes a GPU lockup */
434 if (dmi_check_system(intel_no_modeset_on_lid))
435 goto exit;
436 if (!acpi_lid_open()) {
437 /* do modeset on next lid open event */
438 dev_priv->modeset_restore = MODESET_ON_LID_OPEN;
439 goto exit;
440 }
441
442 if (dev_priv->modeset_restore == MODESET_DONE)
443 goto exit;
444
445 /*
446 * Some old platform's BIOS love to wreak havoc while the lid is closed.
447 * We try to detect this here and undo any damage. The split for PCH
448 * platforms is rather conservative and a bit arbitrary expect that on
449 * those platforms VGA disabling requires actual legacy VGA I/O access,
450 * and as part of the cleanup in the hw state restore we also redisable
451 * the vga plane.
452 */
453 if (!HAS_PCH_SPLIT(dev)) {
454 drm_modeset_lock_all(dev);
455 intel_modeset_setup_hw_state(dev, true);
456 drm_modeset_unlock_all(dev);
457 }
458
459 dev_priv->modeset_restore = MODESET_DONE;
460
461 exit:
462 mutex_unlock(&dev_priv->modeset_restore_lock);
463 return NOTIFY_OK;
464 }
465
466 /**
467 * intel_lvds_destroy - unregister and free LVDS structures
468 * @connector: connector to free
469 *
470 * Unregister the DDC bus for this connector then free the driver private
471 * structure.
472 */
intel_lvds_destroy(struct drm_connector * connector)473 static void intel_lvds_destroy(struct drm_connector *connector)
474 {
475 struct intel_lvds_connector *lvds_connector =
476 to_lvds_connector(connector);
477
478 if (lvds_connector->lid_notifier.notifier_call)
479 acpi_lid_notifier_unregister(&lvds_connector->lid_notifier);
480
481 if (!IS_ERR_OR_NULL(lvds_connector->base.edid))
482 kfree(lvds_connector->base.edid);
483
484 intel_panel_fini(&lvds_connector->base.panel);
485
486 drm_connector_cleanup(connector);
487 kfree(connector);
488 }
489
intel_lvds_set_property(struct drm_connector * connector,struct drm_property * property,uint64_t value)490 static int intel_lvds_set_property(struct drm_connector *connector,
491 struct drm_property *property,
492 uint64_t value)
493 {
494 struct intel_connector *intel_connector = to_intel_connector(connector);
495 struct drm_device *dev = connector->dev;
496
497 if (property == dev->mode_config.scaling_mode_property) {
498 struct drm_crtc *crtc;
499
500 if (value == DRM_MODE_SCALE_NONE) {
501 DRM_DEBUG_KMS("no scaling not supported\n");
502 return -EINVAL;
503 }
504
505 if (intel_connector->panel.fitting_mode == value) {
506 /* the LVDS scaling property is not changed */
507 return 0;
508 }
509 intel_connector->panel.fitting_mode = value;
510
511 crtc = intel_attached_encoder(connector)->base.crtc;
512 if (crtc && crtc->state->enable) {
513 /*
514 * If the CRTC is enabled, the display will be changed
515 * according to the new panel fitting mode.
516 */
517 intel_crtc_restore_mode(crtc);
518 }
519 }
520
521 return 0;
522 }
523
524 static const struct drm_connector_helper_funcs intel_lvds_connector_helper_funcs = {
525 .get_modes = intel_lvds_get_modes,
526 .mode_valid = intel_lvds_mode_valid,
527 .best_encoder = intel_best_encoder,
528 };
529
530 static const struct drm_connector_funcs intel_lvds_connector_funcs = {
531 .dpms = intel_connector_dpms,
532 .detect = intel_lvds_detect,
533 .fill_modes = drm_helper_probe_single_connector_modes,
534 .set_property = intel_lvds_set_property,
535 .atomic_get_property = intel_connector_atomic_get_property,
536 .destroy = intel_lvds_destroy,
537 .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
538 .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
539 };
540
541 static const struct drm_encoder_funcs intel_lvds_enc_funcs = {
542 .destroy = intel_encoder_destroy,
543 };
544
intel_no_lvds_dmi_callback(const struct dmi_system_id * id)545 static int intel_no_lvds_dmi_callback(const struct dmi_system_id *id)
546 {
547 DRM_INFO("Skipping LVDS initialization for %s\n", id->ident);
548 return 1;
549 }
550
551 /* These systems claim to have LVDS, but really don't */
552 static const struct dmi_system_id intel_no_lvds[] = {
553 {
554 .callback = intel_no_lvds_dmi_callback,
555 .ident = "Apple Mac Mini (Core series)",
556 .matches = {
557 DMI_MATCH(DMI_SYS_VENDOR, "Apple"),
558 DMI_MATCH(DMI_PRODUCT_NAME, "Macmini1,1"),
559 },
560 },
561 {
562 .callback = intel_no_lvds_dmi_callback,
563 .ident = "Apple Mac Mini (Core 2 series)",
564 .matches = {
565 DMI_MATCH(DMI_SYS_VENDOR, "Apple"),
566 DMI_MATCH(DMI_PRODUCT_NAME, "Macmini2,1"),
567 },
568 },
569 {
570 .callback = intel_no_lvds_dmi_callback,
571 .ident = "MSI IM-945GSE-A",
572 .matches = {
573 DMI_MATCH(DMI_SYS_VENDOR, "MSI"),
574 DMI_MATCH(DMI_PRODUCT_NAME, "A9830IMS"),
575 },
576 },
577 {
578 .callback = intel_no_lvds_dmi_callback,
579 .ident = "Dell Studio Hybrid",
580 .matches = {
581 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
582 DMI_MATCH(DMI_PRODUCT_NAME, "Studio Hybrid 140g"),
583 },
584 },
585 {
586 .callback = intel_no_lvds_dmi_callback,
587 .ident = "Dell OptiPlex FX170",
588 .matches = {
589 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
590 DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex FX170"),
591 },
592 },
593 {
594 .callback = intel_no_lvds_dmi_callback,
595 .ident = "AOpen Mini PC",
596 .matches = {
597 DMI_MATCH(DMI_SYS_VENDOR, "AOpen"),
598 DMI_MATCH(DMI_PRODUCT_NAME, "i965GMx-IF"),
599 },
600 },
601 {
602 .callback = intel_no_lvds_dmi_callback,
603 .ident = "AOpen Mini PC MP915",
604 .matches = {
605 DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
606 DMI_MATCH(DMI_BOARD_NAME, "i915GMx-F"),
607 },
608 },
609 {
610 .callback = intel_no_lvds_dmi_callback,
611 .ident = "AOpen i915GMm-HFS",
612 .matches = {
613 DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
614 DMI_MATCH(DMI_BOARD_NAME, "i915GMm-HFS"),
615 },
616 },
617 {
618 .callback = intel_no_lvds_dmi_callback,
619 .ident = "AOpen i45GMx-I",
620 .matches = {
621 DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
622 DMI_MATCH(DMI_BOARD_NAME, "i45GMx-I"),
623 },
624 },
625 {
626 .callback = intel_no_lvds_dmi_callback,
627 .ident = "Aopen i945GTt-VFA",
628 .matches = {
629 DMI_MATCH(DMI_PRODUCT_VERSION, "AO00001JW"),
630 },
631 },
632 {
633 .callback = intel_no_lvds_dmi_callback,
634 .ident = "Clientron U800",
635 .matches = {
636 DMI_MATCH(DMI_SYS_VENDOR, "Clientron"),
637 DMI_MATCH(DMI_PRODUCT_NAME, "U800"),
638 },
639 },
640 {
641 .callback = intel_no_lvds_dmi_callback,
642 .ident = "Clientron E830",
643 .matches = {
644 DMI_MATCH(DMI_SYS_VENDOR, "Clientron"),
645 DMI_MATCH(DMI_PRODUCT_NAME, "E830"),
646 },
647 },
648 {
649 .callback = intel_no_lvds_dmi_callback,
650 .ident = "Asus EeeBox PC EB1007",
651 .matches = {
652 DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK Computer INC."),
653 DMI_MATCH(DMI_PRODUCT_NAME, "EB1007"),
654 },
655 },
656 {
657 .callback = intel_no_lvds_dmi_callback,
658 .ident = "Asus AT5NM10T-I",
659 .matches = {
660 DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."),
661 DMI_MATCH(DMI_BOARD_NAME, "AT5NM10T-I"),
662 },
663 },
664 {
665 .callback = intel_no_lvds_dmi_callback,
666 .ident = "Hewlett-Packard HP t5740",
667 .matches = {
668 DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
669 DMI_MATCH(DMI_PRODUCT_NAME, " t5740"),
670 },
671 },
672 {
673 .callback = intel_no_lvds_dmi_callback,
674 .ident = "Hewlett-Packard t5745",
675 .matches = {
676 DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
677 DMI_MATCH(DMI_PRODUCT_NAME, "hp t5745"),
678 },
679 },
680 {
681 .callback = intel_no_lvds_dmi_callback,
682 .ident = "Hewlett-Packard st5747",
683 .matches = {
684 DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
685 DMI_MATCH(DMI_PRODUCT_NAME, "hp st5747"),
686 },
687 },
688 {
689 .callback = intel_no_lvds_dmi_callback,
690 .ident = "MSI Wind Box DC500",
691 .matches = {
692 DMI_MATCH(DMI_BOARD_VENDOR, "MICRO-STAR INTERNATIONAL CO., LTD"),
693 DMI_MATCH(DMI_BOARD_NAME, "MS-7469"),
694 },
695 },
696 {
697 .callback = intel_no_lvds_dmi_callback,
698 .ident = "Gigabyte GA-D525TUD",
699 .matches = {
700 DMI_MATCH(DMI_BOARD_VENDOR, "Gigabyte Technology Co., Ltd."),
701 DMI_MATCH(DMI_BOARD_NAME, "D525TUD"),
702 },
703 },
704 {
705 .callback = intel_no_lvds_dmi_callback,
706 .ident = "Supermicro X7SPA-H",
707 .matches = {
708 DMI_MATCH(DMI_SYS_VENDOR, "Supermicro"),
709 DMI_MATCH(DMI_PRODUCT_NAME, "X7SPA-H"),
710 },
711 },
712 {
713 .callback = intel_no_lvds_dmi_callback,
714 .ident = "Fujitsu Esprimo Q900",
715 .matches = {
716 DMI_MATCH(DMI_SYS_VENDOR, "FUJITSU"),
717 DMI_MATCH(DMI_PRODUCT_NAME, "ESPRIMO Q900"),
718 },
719 },
720 {
721 .callback = intel_no_lvds_dmi_callback,
722 .ident = "Intel D410PT",
723 .matches = {
724 DMI_MATCH(DMI_BOARD_VENDOR, "Intel"),
725 DMI_MATCH(DMI_BOARD_NAME, "D410PT"),
726 },
727 },
728 {
729 .callback = intel_no_lvds_dmi_callback,
730 .ident = "Intel D425KT",
731 .matches = {
732 DMI_MATCH(DMI_BOARD_VENDOR, "Intel"),
733 DMI_EXACT_MATCH(DMI_BOARD_NAME, "D425KT"),
734 },
735 },
736 {
737 .callback = intel_no_lvds_dmi_callback,
738 .ident = "Intel D510MO",
739 .matches = {
740 DMI_MATCH(DMI_BOARD_VENDOR, "Intel"),
741 DMI_EXACT_MATCH(DMI_BOARD_NAME, "D510MO"),
742 },
743 },
744 {
745 .callback = intel_no_lvds_dmi_callback,
746 .ident = "Intel D525MW",
747 .matches = {
748 DMI_MATCH(DMI_BOARD_VENDOR, "Intel"),
749 DMI_EXACT_MATCH(DMI_BOARD_NAME, "D525MW"),
750 },
751 },
752
753 { } /* terminating entry */
754 };
755
756 /*
757 * Enumerate the child dev array parsed from VBT to check whether
758 * the LVDS is present.
759 * If it is present, return 1.
760 * If it is not present, return false.
761 * If no child dev is parsed from VBT, it assumes that the LVDS is present.
762 */
lvds_is_present_in_vbt(struct drm_device * dev,u8 * i2c_pin)763 static bool lvds_is_present_in_vbt(struct drm_device *dev,
764 u8 *i2c_pin)
765 {
766 struct drm_i915_private *dev_priv = dev->dev_private;
767 int i;
768
769 if (!dev_priv->vbt.child_dev_num)
770 return true;
771
772 for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
773 union child_device_config *uchild = dev_priv->vbt.child_dev + i;
774 struct old_child_dev_config *child = &uchild->old;
775
776 /* If the device type is not LFP, continue.
777 * We have to check both the new identifiers as well as the
778 * old for compatibility with some BIOSes.
779 */
780 if (child->device_type != DEVICE_TYPE_INT_LFP &&
781 child->device_type != DEVICE_TYPE_LFP)
782 continue;
783
784 if (intel_gmbus_is_port_valid(child->i2c_pin))
785 *i2c_pin = child->i2c_pin;
786
787 /* However, we cannot trust the BIOS writers to populate
788 * the VBT correctly. Since LVDS requires additional
789 * information from AIM blocks, a non-zero addin offset is
790 * a good indicator that the LVDS is actually present.
791 */
792 if (child->addin_offset)
793 return true;
794
795 /* But even then some BIOS writers perform some black magic
796 * and instantiate the device without reference to any
797 * additional data. Trust that if the VBT was written into
798 * the OpRegion then they have validated the LVDS's existence.
799 */
800 if (dev_priv->opregion.vbt)
801 return true;
802 }
803
804 return false;
805 }
806
intel_dual_link_lvds_callback(const struct dmi_system_id * id)807 static int intel_dual_link_lvds_callback(const struct dmi_system_id *id)
808 {
809 DRM_INFO("Forcing lvds to dual link mode on %s\n", id->ident);
810 return 1;
811 }
812
813 static const struct dmi_system_id intel_dual_link_lvds[] = {
814 {
815 .callback = intel_dual_link_lvds_callback,
816 .ident = "Apple MacBook Pro 15\" (2010)",
817 .matches = {
818 DMI_MATCH(DMI_SYS_VENDOR, "Apple Inc."),
819 DMI_MATCH(DMI_PRODUCT_NAME, "MacBookPro6,2"),
820 },
821 },
822 {
823 .callback = intel_dual_link_lvds_callback,
824 .ident = "Apple MacBook Pro 15\" (2011)",
825 .matches = {
826 DMI_MATCH(DMI_SYS_VENDOR, "Apple Inc."),
827 DMI_MATCH(DMI_PRODUCT_NAME, "MacBookPro8,2"),
828 },
829 },
830 {
831 .callback = intel_dual_link_lvds_callback,
832 .ident = "Apple MacBook Pro 15\" (2012)",
833 .matches = {
834 DMI_MATCH(DMI_SYS_VENDOR, "Apple Inc."),
835 DMI_MATCH(DMI_PRODUCT_NAME, "MacBookPro9,1"),
836 },
837 },
838 { } /* terminating entry */
839 };
840
intel_is_dual_link_lvds(struct drm_device * dev)841 bool intel_is_dual_link_lvds(struct drm_device *dev)
842 {
843 struct intel_encoder *encoder;
844 struct intel_lvds_encoder *lvds_encoder;
845
846 for_each_intel_encoder(dev, encoder) {
847 if (encoder->type == INTEL_OUTPUT_LVDS) {
848 lvds_encoder = to_lvds_encoder(&encoder->base);
849
850 return lvds_encoder->is_dual_link;
851 }
852 }
853
854 return false;
855 }
856
compute_is_dual_link_lvds(struct intel_lvds_encoder * lvds_encoder)857 static bool compute_is_dual_link_lvds(struct intel_lvds_encoder *lvds_encoder)
858 {
859 struct drm_device *dev = lvds_encoder->base.base.dev;
860 unsigned int val;
861 struct drm_i915_private *dev_priv = dev->dev_private;
862
863 /* use the module option value if specified */
864 if (i915.lvds_channel_mode > 0)
865 return i915.lvds_channel_mode == 2;
866
867 /* single channel LVDS is limited to 112 MHz */
868 if (lvds_encoder->attached_connector->base.panel.fixed_mode->clock
869 > 112999)
870 return true;
871
872 if (dmi_check_system(intel_dual_link_lvds))
873 return true;
874
875 /* BIOS should set the proper LVDS register value at boot, but
876 * in reality, it doesn't set the value when the lid is closed;
877 * we need to check "the value to be set" in VBT when LVDS
878 * register is uninitialized.
879 */
880 val = I915_READ(lvds_encoder->reg);
881 if (!(val & ~(LVDS_PIPE_MASK | LVDS_DETECTED)))
882 val = dev_priv->vbt.bios_lvds_val;
883
884 return (val & LVDS_CLKB_POWER_MASK) == LVDS_CLKB_POWER_UP;
885 }
886
intel_lvds_supported(struct drm_device * dev)887 static bool intel_lvds_supported(struct drm_device *dev)
888 {
889 /* With the introduction of the PCH we gained a dedicated
890 * LVDS presence pin, use it. */
891 if (HAS_PCH_IBX(dev) || HAS_PCH_CPT(dev))
892 return true;
893
894 /* Otherwise LVDS was only attached to mobile products,
895 * except for the inglorious 830gm */
896 if (INTEL_INFO(dev)->gen <= 4 && IS_MOBILE(dev) && !IS_I830(dev))
897 return true;
898
899 return false;
900 }
901
902 /**
903 * intel_lvds_init - setup LVDS connectors on this device
904 * @dev: drm device
905 *
906 * Create the connector, register the LVDS DDC bus, and try to figure out what
907 * modes we can display on the LVDS panel (if present).
908 */
intel_lvds_init(struct drm_device * dev)909 void intel_lvds_init(struct drm_device *dev)
910 {
911 struct drm_i915_private *dev_priv = dev->dev_private;
912 struct intel_lvds_encoder *lvds_encoder;
913 struct intel_encoder *intel_encoder;
914 struct intel_lvds_connector *lvds_connector;
915 struct intel_connector *intel_connector;
916 struct drm_connector *connector;
917 struct drm_encoder *encoder;
918 struct drm_display_mode *scan; /* *modes, *bios_mode; */
919 struct drm_display_mode *fixed_mode = NULL;
920 struct drm_display_mode *downclock_mode = NULL;
921 struct edid *edid;
922 struct drm_crtc *crtc;
923 u32 lvds;
924 int pipe;
925 u8 pin;
926
927 /*
928 * Unlock registers and just leave them unlocked. Do this before
929 * checking quirk lists to avoid bogus WARNINGs.
930 */
931 if (HAS_PCH_SPLIT(dev)) {
932 I915_WRITE(PCH_PP_CONTROL,
933 I915_READ(PCH_PP_CONTROL) | PANEL_UNLOCK_REGS);
934 } else {
935 I915_WRITE(PP_CONTROL,
936 I915_READ(PP_CONTROL) | PANEL_UNLOCK_REGS);
937 }
938 if (!intel_lvds_supported(dev))
939 return;
940
941 /* Skip init on machines we know falsely report LVDS */
942 if (dmi_check_system(intel_no_lvds))
943 return;
944
945 pin = GMBUS_PORT_PANEL;
946 if (!lvds_is_present_in_vbt(dev, &pin)) {
947 DRM_DEBUG_KMS("LVDS is not present in VBT\n");
948 return;
949 }
950
951 if (HAS_PCH_SPLIT(dev)) {
952 if ((I915_READ(PCH_LVDS) & LVDS_DETECTED) == 0)
953 return;
954 if (dev_priv->vbt.edp_support) {
955 DRM_DEBUG_KMS("disable LVDS for eDP support\n");
956 return;
957 }
958 }
959
960 lvds_encoder = kzalloc(sizeof(*lvds_encoder), GFP_KERNEL);
961 if (!lvds_encoder)
962 return;
963
964 lvds_connector = kzalloc(sizeof(*lvds_connector), GFP_KERNEL);
965 if (!lvds_connector) {
966 kfree(lvds_encoder);
967 return;
968 }
969
970 if (intel_connector_init(&lvds_connector->base) < 0) {
971 kfree(lvds_connector);
972 kfree(lvds_encoder);
973 return;
974 }
975
976 lvds_encoder->attached_connector = lvds_connector;
977
978 intel_encoder = &lvds_encoder->base;
979 encoder = &intel_encoder->base;
980 intel_connector = &lvds_connector->base;
981 connector = &intel_connector->base;
982 drm_connector_init(dev, &intel_connector->base, &intel_lvds_connector_funcs,
983 DRM_MODE_CONNECTOR_LVDS);
984
985 drm_encoder_init(dev, &intel_encoder->base, &intel_lvds_enc_funcs,
986 DRM_MODE_ENCODER_LVDS);
987
988 intel_encoder->enable = intel_enable_lvds;
989 intel_encoder->pre_enable = intel_pre_enable_lvds;
990 intel_encoder->compute_config = intel_lvds_compute_config;
991 intel_encoder->disable = intel_disable_lvds;
992 intel_encoder->get_hw_state = intel_lvds_get_hw_state;
993 intel_encoder->get_config = intel_lvds_get_config;
994 intel_connector->get_hw_state = intel_connector_get_hw_state;
995 intel_connector->unregister = intel_connector_unregister;
996
997 intel_connector_attach_encoder(intel_connector, intel_encoder);
998 intel_encoder->type = INTEL_OUTPUT_LVDS;
999
1000 intel_encoder->cloneable = 0;
1001 if (HAS_PCH_SPLIT(dev))
1002 intel_encoder->crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
1003 else if (IS_GEN4(dev))
1004 intel_encoder->crtc_mask = (1 << 0) | (1 << 1);
1005 else
1006 intel_encoder->crtc_mask = (1 << 1);
1007
1008 drm_connector_helper_add(connector, &intel_lvds_connector_helper_funcs);
1009 connector->display_info.subpixel_order = SubPixelHorizontalRGB;
1010 connector->interlace_allowed = false;
1011 connector->doublescan_allowed = false;
1012
1013 if (HAS_PCH_SPLIT(dev)) {
1014 lvds_encoder->reg = PCH_LVDS;
1015 } else {
1016 lvds_encoder->reg = LVDS;
1017 }
1018
1019 /* create the scaling mode property */
1020 drm_mode_create_scaling_mode_property(dev);
1021 drm_object_attach_property(&connector->base,
1022 dev->mode_config.scaling_mode_property,
1023 DRM_MODE_SCALE_ASPECT);
1024 intel_connector->panel.fitting_mode = DRM_MODE_SCALE_ASPECT;
1025 /*
1026 * LVDS discovery:
1027 * 1) check for EDID on DDC
1028 * 2) check for VBT data
1029 * 3) check to see if LVDS is already on
1030 * if none of the above, no panel
1031 * 4) make sure lid is open
1032 * if closed, act like it's not there for now
1033 */
1034
1035 /*
1036 * Attempt to get the fixed panel mode from DDC. Assume that the
1037 * preferred mode is the right one.
1038 */
1039 mutex_lock(&dev->mode_config.mutex);
1040 edid = drm_get_edid(connector, intel_gmbus_get_adapter(dev_priv, pin));
1041 if (edid) {
1042 if (drm_add_edid_modes(connector, edid)) {
1043 drm_mode_connector_update_edid_property(connector,
1044 edid);
1045 } else {
1046 kfree(edid);
1047 edid = ERR_PTR(-EINVAL);
1048 }
1049 } else {
1050 edid = ERR_PTR(-ENOENT);
1051 }
1052 lvds_connector->base.edid = edid;
1053
1054 if (IS_ERR_OR_NULL(edid)) {
1055 /* Didn't get an EDID, so
1056 * Set wide sync ranges so we get all modes
1057 * handed to valid_mode for checking
1058 */
1059 connector->display_info.min_vfreq = 0;
1060 connector->display_info.max_vfreq = 200;
1061 connector->display_info.min_hfreq = 0;
1062 connector->display_info.max_hfreq = 200;
1063 }
1064
1065 list_for_each_entry(scan, &connector->probed_modes, head) {
1066 if (scan->type & DRM_MODE_TYPE_PREFERRED) {
1067 DRM_DEBUG_KMS("using preferred mode from EDID: ");
1068 drm_mode_debug_printmodeline(scan);
1069
1070 fixed_mode = drm_mode_duplicate(dev, scan);
1071 if (fixed_mode) {
1072 downclock_mode =
1073 intel_find_panel_downclock(dev,
1074 fixed_mode, connector);
1075 if (downclock_mode != NULL &&
1076 i915.lvds_downclock) {
1077 /* We found the downclock for LVDS. */
1078 dev_priv->lvds_downclock_avail = true;
1079 dev_priv->lvds_downclock =
1080 downclock_mode->clock;
1081 DRM_DEBUG_KMS("LVDS downclock is found"
1082 " in EDID. Normal clock %dKhz, "
1083 "downclock %dKhz\n",
1084 fixed_mode->clock,
1085 dev_priv->lvds_downclock);
1086 }
1087 goto out;
1088 }
1089 }
1090 }
1091
1092 /* Failed to get EDID, what about VBT? */
1093 if (dev_priv->vbt.lfp_lvds_vbt_mode) {
1094 DRM_DEBUG_KMS("using mode from VBT: ");
1095 drm_mode_debug_printmodeline(dev_priv->vbt.lfp_lvds_vbt_mode);
1096
1097 fixed_mode = drm_mode_duplicate(dev, dev_priv->vbt.lfp_lvds_vbt_mode);
1098 if (fixed_mode) {
1099 fixed_mode->type |= DRM_MODE_TYPE_PREFERRED;
1100 goto out;
1101 }
1102 }
1103
1104 /*
1105 * If we didn't get EDID, try checking if the panel is already turned
1106 * on. If so, assume that whatever is currently programmed is the
1107 * correct mode.
1108 */
1109
1110 /* Ironlake: FIXME if still fail, not try pipe mode now */
1111 if (HAS_PCH_SPLIT(dev))
1112 goto failed;
1113
1114 lvds = I915_READ(LVDS);
1115 pipe = (lvds & LVDS_PIPEB_SELECT) ? 1 : 0;
1116 crtc = intel_get_crtc_for_pipe(dev, pipe);
1117
1118 if (crtc && (lvds & LVDS_PORT_EN)) {
1119 fixed_mode = intel_crtc_mode_get(dev, crtc);
1120 if (fixed_mode) {
1121 DRM_DEBUG_KMS("using current (BIOS) mode: ");
1122 drm_mode_debug_printmodeline(fixed_mode);
1123 fixed_mode->type |= DRM_MODE_TYPE_PREFERRED;
1124 goto out;
1125 }
1126 }
1127
1128 /* If we still don't have a mode after all that, give up. */
1129 if (!fixed_mode)
1130 goto failed;
1131
1132 out:
1133 mutex_unlock(&dev->mode_config.mutex);
1134
1135 intel_panel_init(&intel_connector->panel, fixed_mode, downclock_mode);
1136
1137 lvds_encoder->is_dual_link = compute_is_dual_link_lvds(lvds_encoder);
1138 DRM_DEBUG_KMS("detected %s-link lvds configuration\n",
1139 lvds_encoder->is_dual_link ? "dual" : "single");
1140
1141 lvds_encoder->a3_power = I915_READ(lvds_encoder->reg) &
1142 LVDS_A3_POWER_MASK;
1143
1144 lvds_connector->lid_notifier.notifier_call = intel_lid_notify;
1145 if (acpi_lid_notifier_register(&lvds_connector->lid_notifier)) {
1146 DRM_DEBUG_KMS("lid notifier registration failed\n");
1147 lvds_connector->lid_notifier.notifier_call = NULL;
1148 }
1149 drm_connector_register(connector);
1150
1151 intel_panel_setup_backlight(connector, INVALID_PIPE);
1152
1153 return;
1154
1155 failed:
1156 mutex_unlock(&dev->mode_config.mutex);
1157
1158 DRM_DEBUG_KMS("No LVDS modes found, disabling.\n");
1159 drm_connector_cleanup(connector);
1160 drm_encoder_cleanup(encoder);
1161 kfree(lvds_encoder);
1162 kfree(lvds_connector);
1163 return;
1164 }
1165