1 /*
2 * Copyright (c) 2014, NVIDIA CORPORATION. All rights reserved.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
19 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
20 * DEALINGS IN THE SOFTWARE.
21 */
22 #include <subdev/ibus.h>
23 #include <subdev/timer.h>
24
25 struct gk20a_ibus_priv {
26 struct nvkm_ibus base;
27 };
28
29 static void
gk20a_ibus_init_priv_ring(struct gk20a_ibus_priv * priv)30 gk20a_ibus_init_priv_ring(struct gk20a_ibus_priv *priv)
31 {
32 nv_mask(priv, 0x137250, 0x3f, 0);
33
34 nv_mask(priv, 0x000200, 0x20, 0);
35 usleep_range(20, 30);
36 nv_mask(priv, 0x000200, 0x20, 0x20);
37
38 nv_wr32(priv, 0x12004c, 0x4);
39 nv_wr32(priv, 0x122204, 0x2);
40 nv_rd32(priv, 0x122204);
41 }
42
43 static void
gk20a_ibus_intr(struct nvkm_subdev * subdev)44 gk20a_ibus_intr(struct nvkm_subdev *subdev)
45 {
46 struct gk20a_ibus_priv *priv = (void *)subdev;
47 u32 status0 = nv_rd32(priv, 0x120058);
48
49 if (status0 & 0x7) {
50 nv_debug(priv, "resetting priv ring\n");
51 gk20a_ibus_init_priv_ring(priv);
52 }
53
54 /* Acknowledge interrupt */
55 nv_mask(priv, 0x12004c, 0x2, 0x2);
56
57 if (!nv_wait(subdev, 0x12004c, 0x3f, 0x00))
58 nv_warn(priv, "timeout waiting for ringmaster ack\n");
59 }
60
61 static int
gk20a_ibus_init(struct nvkm_object * object)62 gk20a_ibus_init(struct nvkm_object *object)
63 {
64 struct gk20a_ibus_priv *priv = (void *)object;
65 int ret;
66
67 ret = _nvkm_ibus_init(object);
68 if (ret)
69 return ret;
70
71 gk20a_ibus_init_priv_ring(priv);
72
73 return 0;
74 }
75
76 static int
gk20a_ibus_ctor(struct nvkm_object * parent,struct nvkm_object * engine,struct nvkm_oclass * oclass,void * data,u32 size,struct nvkm_object ** pobject)77 gk20a_ibus_ctor(struct nvkm_object *parent, struct nvkm_object *engine,
78 struct nvkm_oclass *oclass, void *data, u32 size,
79 struct nvkm_object **pobject)
80 {
81 struct gk20a_ibus_priv *priv;
82 int ret;
83
84 ret = nvkm_ibus_create(parent, engine, oclass, &priv);
85 *pobject = nv_object(priv);
86 if (ret)
87 return ret;
88
89 nv_subdev(priv)->intr = gk20a_ibus_intr;
90 return 0;
91 }
92
93 struct nvkm_oclass
94 gk20a_ibus_oclass = {
95 .handle = NV_SUBDEV(IBUS, 0xea),
96 .ofuncs = &(struct nvkm_ofuncs) {
97 .ctor = gk20a_ibus_ctor,
98 .dtor = _nvkm_ibus_dtor,
99 .init = gk20a_ibus_init,
100 .fini = _nvkm_ibus_fini,
101 },
102 };
103