1 /*
2 * Copyright 2012 Red Hat Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 * Authors: Ben Skeggs
23 */
24 #include "priv.h"
25
26 #include <subdev/bios.h>
27 #include <subdev/bus.h>
28 #include <subdev/gpio.h>
29 #include <subdev/i2c.h>
30 #include <subdev/fuse.h>
31 #include <subdev/clk.h>
32 #include <subdev/therm.h>
33 #include <subdev/mxm.h>
34 #include <subdev/devinit.h>
35 #include <subdev/mc.h>
36 #include <subdev/timer.h>
37 #include <subdev/fb.h>
38 #include <subdev/ltc.h>
39 #include <subdev/ibus.h>
40 #include <subdev/instmem.h>
41 #include <subdev/mmu.h>
42 #include <subdev/bar.h>
43 #include <subdev/pmu.h>
44 #include <subdev/volt.h>
45
46 #include <engine/dmaobj.h>
47 #include <engine/fifo.h>
48 #include <engine/sw.h>
49 #include <engine/gr.h>
50 #include <engine/disp.h>
51 #include <engine/ce.h>
52 #include <engine/bsp.h>
53 #include <engine/msvld.h>
54 #include <engine/mspdec.h>
55 #include <engine/msppp.h>
56 #include <engine/pm.h>
57
58 int
gk104_identify(struct nvkm_device * device)59 gk104_identify(struct nvkm_device *device)
60 {
61 switch (device->chipset) {
62 case 0xe4:
63 device->cname = "GK104";
64 device->oclass[NVDEV_SUBDEV_VBIOS ] = &nvkm_bios_oclass;
65 device->oclass[NVDEV_SUBDEV_GPIO ] = gk104_gpio_oclass;
66 device->oclass[NVDEV_SUBDEV_I2C ] = gk104_i2c_oclass;
67 device->oclass[NVDEV_SUBDEV_FUSE ] = &gf100_fuse_oclass;
68 device->oclass[NVDEV_SUBDEV_CLK ] = &gk104_clk_oclass;
69 device->oclass[NVDEV_SUBDEV_THERM ] = &gf110_therm_oclass;
70 device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
71 device->oclass[NVDEV_SUBDEV_DEVINIT] = gf100_devinit_oclass;
72 device->oclass[NVDEV_SUBDEV_MC ] = gf106_mc_oclass;
73 device->oclass[NVDEV_SUBDEV_BUS ] = gf100_bus_oclass;
74 device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
75 device->oclass[NVDEV_SUBDEV_FB ] = gk104_fb_oclass;
76 device->oclass[NVDEV_SUBDEV_LTC ] = gk104_ltc_oclass;
77 device->oclass[NVDEV_SUBDEV_IBUS ] = &gk104_ibus_oclass;
78 device->oclass[NVDEV_SUBDEV_INSTMEM] = nv50_instmem_oclass;
79 device->oclass[NVDEV_SUBDEV_MMU ] = &gf100_mmu_oclass;
80 device->oclass[NVDEV_SUBDEV_BAR ] = &gf100_bar_oclass;
81 device->oclass[NVDEV_SUBDEV_PMU ] = gk104_pmu_oclass;
82 device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass;
83 device->oclass[NVDEV_ENGINE_DMAOBJ ] = gf110_dmaeng_oclass;
84 device->oclass[NVDEV_ENGINE_FIFO ] = gk104_fifo_oclass;
85 device->oclass[NVDEV_ENGINE_SW ] = gf100_sw_oclass;
86 device->oclass[NVDEV_ENGINE_GR ] = gk104_gr_oclass;
87 device->oclass[NVDEV_ENGINE_DISP ] = gk104_disp_oclass;
88 device->oclass[NVDEV_ENGINE_CE0 ] = &gk104_ce0_oclass;
89 device->oclass[NVDEV_ENGINE_CE1 ] = &gk104_ce1_oclass;
90 device->oclass[NVDEV_ENGINE_CE2 ] = &gk104_ce2_oclass;
91 device->oclass[NVDEV_ENGINE_MSVLD ] = &gk104_msvld_oclass;
92 device->oclass[NVDEV_ENGINE_MSPDEC ] = &gk104_mspdec_oclass;
93 device->oclass[NVDEV_ENGINE_MSPPP ] = &gf100_msppp_oclass;
94 device->oclass[NVDEV_ENGINE_PM ] = &gk104_pm_oclass;
95 break;
96 case 0xe7:
97 device->cname = "GK107";
98 device->oclass[NVDEV_SUBDEV_VBIOS ] = &nvkm_bios_oclass;
99 device->oclass[NVDEV_SUBDEV_GPIO ] = gk104_gpio_oclass;
100 device->oclass[NVDEV_SUBDEV_I2C ] = gk104_i2c_oclass;
101 device->oclass[NVDEV_SUBDEV_FUSE ] = &gf100_fuse_oclass;
102 device->oclass[NVDEV_SUBDEV_CLK ] = &gk104_clk_oclass;
103 device->oclass[NVDEV_SUBDEV_THERM ] = &gf110_therm_oclass;
104 device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
105 device->oclass[NVDEV_SUBDEV_DEVINIT] = gf100_devinit_oclass;
106 device->oclass[NVDEV_SUBDEV_MC ] = gf106_mc_oclass;
107 device->oclass[NVDEV_SUBDEV_BUS ] = gf100_bus_oclass;
108 device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
109 device->oclass[NVDEV_SUBDEV_FB ] = gk104_fb_oclass;
110 device->oclass[NVDEV_SUBDEV_LTC ] = gk104_ltc_oclass;
111 device->oclass[NVDEV_SUBDEV_IBUS ] = &gk104_ibus_oclass;
112 device->oclass[NVDEV_SUBDEV_INSTMEM] = nv50_instmem_oclass;
113 device->oclass[NVDEV_SUBDEV_MMU ] = &gf100_mmu_oclass;
114 device->oclass[NVDEV_SUBDEV_BAR ] = &gf100_bar_oclass;
115 device->oclass[NVDEV_SUBDEV_PMU ] = gf110_pmu_oclass;
116 device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass;
117 device->oclass[NVDEV_ENGINE_DMAOBJ ] = gf110_dmaeng_oclass;
118 device->oclass[NVDEV_ENGINE_FIFO ] = gk104_fifo_oclass;
119 device->oclass[NVDEV_ENGINE_SW ] = gf100_sw_oclass;
120 device->oclass[NVDEV_ENGINE_GR ] = gk104_gr_oclass;
121 device->oclass[NVDEV_ENGINE_DISP ] = gk104_disp_oclass;
122 device->oclass[NVDEV_ENGINE_CE0 ] = &gk104_ce0_oclass;
123 device->oclass[NVDEV_ENGINE_CE1 ] = &gk104_ce1_oclass;
124 device->oclass[NVDEV_ENGINE_CE2 ] = &gk104_ce2_oclass;
125 device->oclass[NVDEV_ENGINE_MSVLD ] = &gk104_msvld_oclass;
126 device->oclass[NVDEV_ENGINE_MSPDEC ] = &gk104_mspdec_oclass;
127 device->oclass[NVDEV_ENGINE_MSPPP ] = &gf100_msppp_oclass;
128 device->oclass[NVDEV_ENGINE_PM ] = &gk104_pm_oclass;
129 break;
130 case 0xe6:
131 device->cname = "GK106";
132 device->oclass[NVDEV_SUBDEV_VBIOS ] = &nvkm_bios_oclass;
133 device->oclass[NVDEV_SUBDEV_GPIO ] = gk104_gpio_oclass;
134 device->oclass[NVDEV_SUBDEV_I2C ] = gk104_i2c_oclass;
135 device->oclass[NVDEV_SUBDEV_FUSE ] = &gf100_fuse_oclass;
136 device->oclass[NVDEV_SUBDEV_CLK ] = &gk104_clk_oclass;
137 device->oclass[NVDEV_SUBDEV_THERM ] = &gf110_therm_oclass;
138 device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
139 device->oclass[NVDEV_SUBDEV_DEVINIT] = gf100_devinit_oclass;
140 device->oclass[NVDEV_SUBDEV_MC ] = gf106_mc_oclass;
141 device->oclass[NVDEV_SUBDEV_BUS ] = gf100_bus_oclass;
142 device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
143 device->oclass[NVDEV_SUBDEV_FB ] = gk104_fb_oclass;
144 device->oclass[NVDEV_SUBDEV_LTC ] = gk104_ltc_oclass;
145 device->oclass[NVDEV_SUBDEV_IBUS ] = &gk104_ibus_oclass;
146 device->oclass[NVDEV_SUBDEV_INSTMEM] = nv50_instmem_oclass;
147 device->oclass[NVDEV_SUBDEV_MMU ] = &gf100_mmu_oclass;
148 device->oclass[NVDEV_SUBDEV_BAR ] = &gf100_bar_oclass;
149 device->oclass[NVDEV_SUBDEV_PMU ] = gk104_pmu_oclass;
150 device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass;
151 device->oclass[NVDEV_ENGINE_DMAOBJ ] = gf110_dmaeng_oclass;
152 device->oclass[NVDEV_ENGINE_FIFO ] = gk104_fifo_oclass;
153 device->oclass[NVDEV_ENGINE_SW ] = gf100_sw_oclass;
154 device->oclass[NVDEV_ENGINE_GR ] = gk104_gr_oclass;
155 device->oclass[NVDEV_ENGINE_DISP ] = gk104_disp_oclass;
156 device->oclass[NVDEV_ENGINE_CE0 ] = &gk104_ce0_oclass;
157 device->oclass[NVDEV_ENGINE_CE1 ] = &gk104_ce1_oclass;
158 device->oclass[NVDEV_ENGINE_CE2 ] = &gk104_ce2_oclass;
159 device->oclass[NVDEV_ENGINE_MSVLD ] = &gk104_msvld_oclass;
160 device->oclass[NVDEV_ENGINE_MSPDEC ] = &gk104_mspdec_oclass;
161 device->oclass[NVDEV_ENGINE_MSPPP ] = &gf100_msppp_oclass;
162 device->oclass[NVDEV_ENGINE_PM ] = &gk104_pm_oclass;
163 break;
164 case 0xea:
165 device->cname = "GK20A";
166 device->oclass[NVDEV_SUBDEV_CLK ] = &gk20a_clk_oclass;
167 device->oclass[NVDEV_SUBDEV_MC ] = gk20a_mc_oclass;
168 device->oclass[NVDEV_SUBDEV_BUS ] = gf100_bus_oclass;
169 device->oclass[NVDEV_SUBDEV_FUSE ] = &gf100_fuse_oclass;
170 device->oclass[NVDEV_SUBDEV_TIMER ] = &gk20a_timer_oclass;
171 device->oclass[NVDEV_SUBDEV_FB ] = gk20a_fb_oclass;
172 device->oclass[NVDEV_SUBDEV_LTC ] = gk104_ltc_oclass;
173 device->oclass[NVDEV_SUBDEV_IBUS ] = &gk20a_ibus_oclass;
174 device->oclass[NVDEV_SUBDEV_INSTMEM] = gk20a_instmem_oclass;
175 device->oclass[NVDEV_SUBDEV_MMU ] = &gf100_mmu_oclass;
176 device->oclass[NVDEV_SUBDEV_BAR ] = &gk20a_bar_oclass;
177 device->oclass[NVDEV_ENGINE_DMAOBJ ] = gf110_dmaeng_oclass;
178 device->oclass[NVDEV_ENGINE_FIFO ] = gk20a_fifo_oclass;
179 device->oclass[NVDEV_ENGINE_SW ] = gf100_sw_oclass;
180 device->oclass[NVDEV_ENGINE_GR ] = gk20a_gr_oclass;
181 device->oclass[NVDEV_ENGINE_CE2 ] = &gk104_ce2_oclass;
182 device->oclass[NVDEV_ENGINE_PM ] = &gk104_pm_oclass;
183 device->oclass[NVDEV_SUBDEV_VOLT ] = &gk20a_volt_oclass;
184 device->oclass[NVDEV_SUBDEV_PMU ] = gk20a_pmu_oclass;
185 break;
186 case 0xf0:
187 device->cname = "GK110";
188 device->oclass[NVDEV_SUBDEV_VBIOS ] = &nvkm_bios_oclass;
189 device->oclass[NVDEV_SUBDEV_GPIO ] = gk104_gpio_oclass;
190 device->oclass[NVDEV_SUBDEV_I2C ] = gk104_i2c_oclass;
191 device->oclass[NVDEV_SUBDEV_FUSE ] = &gf100_fuse_oclass;
192 device->oclass[NVDEV_SUBDEV_CLK ] = &gk104_clk_oclass;
193 device->oclass[NVDEV_SUBDEV_THERM ] = &gf110_therm_oclass;
194 device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
195 device->oclass[NVDEV_SUBDEV_DEVINIT] = gf100_devinit_oclass;
196 device->oclass[NVDEV_SUBDEV_MC ] = gf106_mc_oclass;
197 device->oclass[NVDEV_SUBDEV_BUS ] = gf100_bus_oclass;
198 device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
199 device->oclass[NVDEV_SUBDEV_FB ] = gk104_fb_oclass;
200 device->oclass[NVDEV_SUBDEV_LTC ] = gk104_ltc_oclass;
201 device->oclass[NVDEV_SUBDEV_IBUS ] = &gk104_ibus_oclass;
202 device->oclass[NVDEV_SUBDEV_INSTMEM] = nv50_instmem_oclass;
203 device->oclass[NVDEV_SUBDEV_MMU ] = &gf100_mmu_oclass;
204 device->oclass[NVDEV_SUBDEV_BAR ] = &gf100_bar_oclass;
205 device->oclass[NVDEV_SUBDEV_PMU ] = gk110_pmu_oclass;
206 device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass;
207 device->oclass[NVDEV_ENGINE_DMAOBJ ] = gf110_dmaeng_oclass;
208 device->oclass[NVDEV_ENGINE_FIFO ] = gk104_fifo_oclass;
209 device->oclass[NVDEV_ENGINE_SW ] = gf100_sw_oclass;
210 device->oclass[NVDEV_ENGINE_GR ] = gk110_gr_oclass;
211 device->oclass[NVDEV_ENGINE_DISP ] = gk110_disp_oclass;
212 device->oclass[NVDEV_ENGINE_CE0 ] = &gk104_ce0_oclass;
213 device->oclass[NVDEV_ENGINE_CE1 ] = &gk104_ce1_oclass;
214 device->oclass[NVDEV_ENGINE_CE2 ] = &gk104_ce2_oclass;
215 device->oclass[NVDEV_ENGINE_MSVLD ] = &gk104_msvld_oclass;
216 device->oclass[NVDEV_ENGINE_MSPDEC ] = &gk104_mspdec_oclass;
217 device->oclass[NVDEV_ENGINE_MSPPP ] = &gf100_msppp_oclass;
218 device->oclass[NVDEV_ENGINE_PM ] = &gk110_pm_oclass;
219 break;
220 case 0xf1:
221 device->cname = "GK110B";
222 device->oclass[NVDEV_SUBDEV_VBIOS ] = &nvkm_bios_oclass;
223 device->oclass[NVDEV_SUBDEV_GPIO ] = gk104_gpio_oclass;
224 device->oclass[NVDEV_SUBDEV_I2C ] = gf110_i2c_oclass;
225 device->oclass[NVDEV_SUBDEV_FUSE ] = &gf100_fuse_oclass;
226 device->oclass[NVDEV_SUBDEV_CLK ] = &gk104_clk_oclass;
227 device->oclass[NVDEV_SUBDEV_THERM ] = &gf110_therm_oclass;
228 device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
229 device->oclass[NVDEV_SUBDEV_DEVINIT] = gf100_devinit_oclass;
230 device->oclass[NVDEV_SUBDEV_MC ] = gf106_mc_oclass;
231 device->oclass[NVDEV_SUBDEV_BUS ] = gf100_bus_oclass;
232 device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
233 device->oclass[NVDEV_SUBDEV_FB ] = gk104_fb_oclass;
234 device->oclass[NVDEV_SUBDEV_LTC ] = gk104_ltc_oclass;
235 device->oclass[NVDEV_SUBDEV_IBUS ] = &gk104_ibus_oclass;
236 device->oclass[NVDEV_SUBDEV_INSTMEM] = nv50_instmem_oclass;
237 device->oclass[NVDEV_SUBDEV_MMU ] = &gf100_mmu_oclass;
238 device->oclass[NVDEV_SUBDEV_BAR ] = &gf100_bar_oclass;
239 device->oclass[NVDEV_SUBDEV_PMU ] = gk110_pmu_oclass;
240 device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass;
241 device->oclass[NVDEV_ENGINE_DMAOBJ ] = gf110_dmaeng_oclass;
242 device->oclass[NVDEV_ENGINE_FIFO ] = gk104_fifo_oclass;
243 device->oclass[NVDEV_ENGINE_SW ] = gf100_sw_oclass;
244 device->oclass[NVDEV_ENGINE_GR ] = gk110b_gr_oclass;
245 device->oclass[NVDEV_ENGINE_DISP ] = gk110_disp_oclass;
246 device->oclass[NVDEV_ENGINE_CE0 ] = &gk104_ce0_oclass;
247 device->oclass[NVDEV_ENGINE_CE1 ] = &gk104_ce1_oclass;
248 device->oclass[NVDEV_ENGINE_CE2 ] = &gk104_ce2_oclass;
249 device->oclass[NVDEV_ENGINE_MSVLD ] = &gk104_msvld_oclass;
250 device->oclass[NVDEV_ENGINE_MSPDEC ] = &gk104_mspdec_oclass;
251 device->oclass[NVDEV_ENGINE_MSPPP ] = &gf100_msppp_oclass;
252 device->oclass[NVDEV_ENGINE_PM ] = &gk110_pm_oclass;
253 break;
254 case 0x106:
255 device->cname = "GK208B";
256 device->oclass[NVDEV_SUBDEV_VBIOS ] = &nvkm_bios_oclass;
257 device->oclass[NVDEV_SUBDEV_GPIO ] = gk104_gpio_oclass;
258 device->oclass[NVDEV_SUBDEV_I2C ] = gk104_i2c_oclass;
259 device->oclass[NVDEV_SUBDEV_FUSE ] = &gf100_fuse_oclass;
260 device->oclass[NVDEV_SUBDEV_CLK ] = &gk104_clk_oclass;
261 device->oclass[NVDEV_SUBDEV_THERM ] = &gf110_therm_oclass;
262 device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
263 device->oclass[NVDEV_SUBDEV_DEVINIT] = gf100_devinit_oclass;
264 device->oclass[NVDEV_SUBDEV_MC ] = gk20a_mc_oclass;
265 device->oclass[NVDEV_SUBDEV_BUS ] = gf100_bus_oclass;
266 device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
267 device->oclass[NVDEV_SUBDEV_FB ] = gk104_fb_oclass;
268 device->oclass[NVDEV_SUBDEV_LTC ] = gk104_ltc_oclass;
269 device->oclass[NVDEV_SUBDEV_IBUS ] = &gk104_ibus_oclass;
270 device->oclass[NVDEV_SUBDEV_INSTMEM] = nv50_instmem_oclass;
271 device->oclass[NVDEV_SUBDEV_MMU ] = &gf100_mmu_oclass;
272 device->oclass[NVDEV_SUBDEV_BAR ] = &gf100_bar_oclass;
273 device->oclass[NVDEV_SUBDEV_PMU ] = gk208_pmu_oclass;
274 device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass;
275 device->oclass[NVDEV_ENGINE_DMAOBJ ] = gf110_dmaeng_oclass;
276 device->oclass[NVDEV_ENGINE_FIFO ] = gk208_fifo_oclass;
277 device->oclass[NVDEV_ENGINE_SW ] = gf100_sw_oclass;
278 device->oclass[NVDEV_ENGINE_GR ] = gk208_gr_oclass;
279 device->oclass[NVDEV_ENGINE_DISP ] = gk110_disp_oclass;
280 device->oclass[NVDEV_ENGINE_CE0 ] = &gk104_ce0_oclass;
281 device->oclass[NVDEV_ENGINE_CE1 ] = &gk104_ce1_oclass;
282 device->oclass[NVDEV_ENGINE_CE2 ] = &gk104_ce2_oclass;
283 device->oclass[NVDEV_ENGINE_MSVLD ] = &gk104_msvld_oclass;
284 device->oclass[NVDEV_ENGINE_MSPDEC ] = &gk104_mspdec_oclass;
285 device->oclass[NVDEV_ENGINE_MSPPP ] = &gf100_msppp_oclass;
286 break;
287 case 0x108:
288 device->cname = "GK208";
289 device->oclass[NVDEV_SUBDEV_VBIOS ] = &nvkm_bios_oclass;
290 device->oclass[NVDEV_SUBDEV_GPIO ] = gk104_gpio_oclass;
291 device->oclass[NVDEV_SUBDEV_I2C ] = gk104_i2c_oclass;
292 device->oclass[NVDEV_SUBDEV_FUSE ] = &gf100_fuse_oclass;
293 device->oclass[NVDEV_SUBDEV_CLK ] = &gk104_clk_oclass;
294 device->oclass[NVDEV_SUBDEV_THERM ] = &gf110_therm_oclass;
295 device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
296 device->oclass[NVDEV_SUBDEV_DEVINIT] = gf100_devinit_oclass;
297 device->oclass[NVDEV_SUBDEV_MC ] = gk20a_mc_oclass;
298 device->oclass[NVDEV_SUBDEV_BUS ] = gf100_bus_oclass;
299 device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
300 device->oclass[NVDEV_SUBDEV_FB ] = gk104_fb_oclass;
301 device->oclass[NVDEV_SUBDEV_LTC ] = gk104_ltc_oclass;
302 device->oclass[NVDEV_SUBDEV_IBUS ] = &gk104_ibus_oclass;
303 device->oclass[NVDEV_SUBDEV_INSTMEM] = nv50_instmem_oclass;
304 device->oclass[NVDEV_SUBDEV_MMU ] = &gf100_mmu_oclass;
305 device->oclass[NVDEV_SUBDEV_BAR ] = &gf100_bar_oclass;
306 device->oclass[NVDEV_SUBDEV_PMU ] = gk208_pmu_oclass;
307 device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass;
308 device->oclass[NVDEV_ENGINE_DMAOBJ ] = gf110_dmaeng_oclass;
309 device->oclass[NVDEV_ENGINE_FIFO ] = gk208_fifo_oclass;
310 device->oclass[NVDEV_ENGINE_SW ] = gf100_sw_oclass;
311 device->oclass[NVDEV_ENGINE_GR ] = gk208_gr_oclass;
312 device->oclass[NVDEV_ENGINE_DISP ] = gk110_disp_oclass;
313 device->oclass[NVDEV_ENGINE_CE0 ] = &gk104_ce0_oclass;
314 device->oclass[NVDEV_ENGINE_CE1 ] = &gk104_ce1_oclass;
315 device->oclass[NVDEV_ENGINE_CE2 ] = &gk104_ce2_oclass;
316 device->oclass[NVDEV_ENGINE_MSVLD ] = &gk104_msvld_oclass;
317 device->oclass[NVDEV_ENGINE_MSPDEC ] = &gk104_mspdec_oclass;
318 device->oclass[NVDEV_ENGINE_MSPPP ] = &gf100_msppp_oclass;
319 break;
320 default:
321 nv_fatal(device, "unknown Kepler chipset\n");
322 return -EINVAL;
323 }
324
325 return 0;
326 }
327