1 /*
2 * Copyright 2012 Red Hat Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 * Authors: Ben Skeggs
23 */
24 #include <engine/sec.h>
25 #include <engine/falcon.h>
26 #include "fuc/g98.fuc0s.h"
27
28 #include <core/client.h>
29 #include <core/enum.h>
30 #include <engine/fifo.h>
31
32 struct g98_sec_priv {
33 struct nvkm_falcon base;
34 };
35
36 /*******************************************************************************
37 * Crypt object classes
38 ******************************************************************************/
39
40 static struct nvkm_oclass
41 g98_sec_sclass[] = {
42 { 0x88b4, &nvkm_object_ofuncs },
43 {},
44 };
45
46 /*******************************************************************************
47 * PSEC context
48 ******************************************************************************/
49
50 static struct nvkm_oclass
51 g98_sec_cclass = {
52 .handle = NV_ENGCTX(SEC, 0x98),
53 .ofuncs = &(struct nvkm_ofuncs) {
54 .ctor = _nvkm_falcon_context_ctor,
55 .dtor = _nvkm_falcon_context_dtor,
56 .init = _nvkm_falcon_context_init,
57 .fini = _nvkm_falcon_context_fini,
58 .rd32 = _nvkm_falcon_context_rd32,
59 .wr32 = _nvkm_falcon_context_wr32,
60 },
61 };
62
63 /*******************************************************************************
64 * PSEC engine/subdev functions
65 ******************************************************************************/
66
67 static const struct nvkm_enum g98_sec_isr_error_name[] = {
68 { 0x0000, "ILLEGAL_MTHD" },
69 { 0x0001, "INVALID_BITFIELD" },
70 { 0x0002, "INVALID_ENUM" },
71 { 0x0003, "QUERY" },
72 {}
73 };
74
75 static void
g98_sec_intr(struct nvkm_subdev * subdev)76 g98_sec_intr(struct nvkm_subdev *subdev)
77 {
78 struct nvkm_fifo *pfifo = nvkm_fifo(subdev);
79 struct nvkm_engine *engine = nv_engine(subdev);
80 struct nvkm_object *engctx;
81 struct g98_sec_priv *priv = (void *)subdev;
82 u32 disp = nv_rd32(priv, 0x08701c);
83 u32 stat = nv_rd32(priv, 0x087008) & disp & ~(disp >> 16);
84 u32 inst = nv_rd32(priv, 0x087050) & 0x3fffffff;
85 u32 ssta = nv_rd32(priv, 0x087040) & 0x0000ffff;
86 u32 addr = nv_rd32(priv, 0x087040) >> 16;
87 u32 mthd = (addr & 0x07ff) << 2;
88 u32 subc = (addr & 0x3800) >> 11;
89 u32 data = nv_rd32(priv, 0x087044);
90 int chid;
91
92 engctx = nvkm_engctx_get(engine, inst);
93 chid = pfifo->chid(pfifo, engctx);
94
95 if (stat & 0x00000040) {
96 nv_error(priv, "DISPATCH_ERROR [");
97 nvkm_enum_print(g98_sec_isr_error_name, ssta);
98 pr_cont("] ch %d [0x%010llx %s] subc %d mthd 0x%04x data 0x%08x\n",
99 chid, (u64)inst << 12, nvkm_client_name(engctx),
100 subc, mthd, data);
101 nv_wr32(priv, 0x087004, 0x00000040);
102 stat &= ~0x00000040;
103 }
104
105 if (stat) {
106 nv_error(priv, "unhandled intr 0x%08x\n", stat);
107 nv_wr32(priv, 0x087004, stat);
108 }
109
110 nvkm_engctx_put(engctx);
111 }
112
113 static int
g98_sec_ctor(struct nvkm_object * parent,struct nvkm_object * engine,struct nvkm_oclass * oclass,void * data,u32 size,struct nvkm_object ** pobject)114 g98_sec_ctor(struct nvkm_object *parent, struct nvkm_object *engine,
115 struct nvkm_oclass *oclass, void *data, u32 size,
116 struct nvkm_object **pobject)
117 {
118 struct g98_sec_priv *priv;
119 int ret;
120
121 ret = nvkm_falcon_create(parent, engine, oclass, 0x087000, true,
122 "PSEC", "sec", &priv);
123 *pobject = nv_object(priv);
124 if (ret)
125 return ret;
126
127 nv_subdev(priv)->unit = 0x00004000;
128 nv_subdev(priv)->intr = g98_sec_intr;
129 nv_engine(priv)->cclass = &g98_sec_cclass;
130 nv_engine(priv)->sclass = g98_sec_sclass;
131 nv_falcon(priv)->code.data = g98_psec_code;
132 nv_falcon(priv)->code.size = sizeof(g98_psec_code);
133 nv_falcon(priv)->data.data = g98_psec_data;
134 nv_falcon(priv)->data.size = sizeof(g98_psec_data);
135 return 0;
136 }
137
138 struct nvkm_oclass
139 g98_sec_oclass = {
140 .handle = NV_ENGINE(SEC, 0x98),
141 .ofuncs = &(struct nvkm_ofuncs) {
142 .ctor = g98_sec_ctor,
143 .dtor = _nvkm_falcon_dtor,
144 .init = _nvkm_falcon_init,
145 .fini = _nvkm_falcon_fini,
146 .rd32 = _nvkm_falcon_rd32,
147 .wr32 = _nvkm_falcon_wr32,
148 },
149 };
150