1 /*
2 * linux/drivers/video/omap2/dss/dpi.c
3 *
4 * Copyright (C) 2009 Nokia Corporation
5 * Author: Tomi Valkeinen <tomi.valkeinen@nokia.com>
6 *
7 * Some code and ideas taken from drivers/video/omap/ driver
8 * by Imre Deak.
9 *
10 * This program is free software; you can redistribute it and/or modify it
11 * under the terms of the GNU General Public License version 2 as published by
12 * the Free Software Foundation.
13 *
14 * This program is distributed in the hope that it will be useful, but WITHOUT
15 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
16 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
17 * more details.
18 *
19 * You should have received a copy of the GNU General Public License along with
20 * this program. If not, see <http://www.gnu.org/licenses/>.
21 */
22
23 #define DSS_SUBSYS_NAME "DPI"
24
25 #include <linux/kernel.h>
26 #include <linux/delay.h>
27 #include <linux/export.h>
28 #include <linux/err.h>
29 #include <linux/errno.h>
30 #include <linux/platform_device.h>
31 #include <linux/regulator/consumer.h>
32 #include <linux/string.h>
33 #include <linux/of.h>
34 #include <linux/clk.h>
35
36 #include <video/omapdss.h>
37
38 #include "dss.h"
39 #include "dss_features.h"
40
41 #define HSDIV_DISPC 0
42
43 struct dpi_data {
44 struct platform_device *pdev;
45
46 struct regulator *vdds_dsi_reg;
47 struct dss_pll *pll;
48
49 struct mutex lock;
50
51 struct omap_video_timings timings;
52 struct dss_lcd_mgr_config mgr_config;
53 int data_lines;
54
55 struct omap_dss_device output;
56
57 bool port_initialized;
58 };
59
dpi_get_data_from_dssdev(struct omap_dss_device * dssdev)60 static struct dpi_data *dpi_get_data_from_dssdev(struct omap_dss_device *dssdev)
61 {
62 return container_of(dssdev, struct dpi_data, output);
63 }
64
65 /* only used in non-DT mode */
dpi_get_data_from_pdev(struct platform_device * pdev)66 static struct dpi_data *dpi_get_data_from_pdev(struct platform_device *pdev)
67 {
68 return dev_get_drvdata(&pdev->dev);
69 }
70
dpi_get_pll(enum omap_channel channel)71 static struct dss_pll *dpi_get_pll(enum omap_channel channel)
72 {
73 /*
74 * XXX we can't currently use DSI PLL for DPI with OMAP3, as the DSI PLL
75 * would also be used for DISPC fclk. Meaning, when the DPI output is
76 * disabled, DISPC clock will be disabled, and TV out will stop.
77 */
78 switch (omapdss_get_version()) {
79 case OMAPDSS_VER_OMAP24xx:
80 case OMAPDSS_VER_OMAP34xx_ES1:
81 case OMAPDSS_VER_OMAP34xx_ES3:
82 case OMAPDSS_VER_OMAP3630:
83 case OMAPDSS_VER_AM35xx:
84 case OMAPDSS_VER_AM43xx:
85 return NULL;
86
87 case OMAPDSS_VER_OMAP4430_ES1:
88 case OMAPDSS_VER_OMAP4430_ES2:
89 case OMAPDSS_VER_OMAP4:
90 switch (channel) {
91 case OMAP_DSS_CHANNEL_LCD:
92 return dss_pll_find("dsi0");
93 case OMAP_DSS_CHANNEL_LCD2:
94 return dss_pll_find("dsi1");
95 default:
96 return NULL;
97 }
98
99 case OMAPDSS_VER_OMAP5:
100 switch (channel) {
101 case OMAP_DSS_CHANNEL_LCD:
102 return dss_pll_find("dsi0");
103 case OMAP_DSS_CHANNEL_LCD3:
104 return dss_pll_find("dsi1");
105 default:
106 return NULL;
107 }
108
109 case OMAPDSS_VER_DRA7xx:
110 switch (channel) {
111 case OMAP_DSS_CHANNEL_LCD:
112 case OMAP_DSS_CHANNEL_LCD2:
113 return dss_pll_find("video0");
114 case OMAP_DSS_CHANNEL_LCD3:
115 return dss_pll_find("video1");
116 default:
117 return NULL;
118 }
119
120 default:
121 return NULL;
122 }
123 }
124
dpi_get_alt_clk_src(enum omap_channel channel)125 static enum omap_dss_clk_source dpi_get_alt_clk_src(enum omap_channel channel)
126 {
127 switch (channel) {
128 case OMAP_DSS_CHANNEL_LCD:
129 return OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC;
130 case OMAP_DSS_CHANNEL_LCD2:
131 return OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DISPC;
132 case OMAP_DSS_CHANNEL_LCD3:
133 return OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DISPC;
134 default:
135 /* this shouldn't happen */
136 WARN_ON(1);
137 return OMAP_DSS_CLK_SRC_FCK;
138 }
139 }
140
141 struct dpi_clk_calc_ctx {
142 struct dss_pll *pll;
143
144 /* inputs */
145
146 unsigned long pck_min, pck_max;
147
148 /* outputs */
149
150 struct dss_pll_clock_info dsi_cinfo;
151 unsigned long fck;
152 struct dispc_clock_info dispc_cinfo;
153 };
154
dpi_calc_dispc_cb(int lckd,int pckd,unsigned long lck,unsigned long pck,void * data)155 static bool dpi_calc_dispc_cb(int lckd, int pckd, unsigned long lck,
156 unsigned long pck, void *data)
157 {
158 struct dpi_clk_calc_ctx *ctx = data;
159
160 /*
161 * Odd dividers give us uneven duty cycle, causing problem when level
162 * shifted. So skip all odd dividers when the pixel clock is on the
163 * higher side.
164 */
165 if (ctx->pck_min >= 100000000) {
166 if (lckd > 1 && lckd % 2 != 0)
167 return false;
168
169 if (pckd > 1 && pckd % 2 != 0)
170 return false;
171 }
172
173 ctx->dispc_cinfo.lck_div = lckd;
174 ctx->dispc_cinfo.pck_div = pckd;
175 ctx->dispc_cinfo.lck = lck;
176 ctx->dispc_cinfo.pck = pck;
177
178 return true;
179 }
180
181
dpi_calc_hsdiv_cb(int m_dispc,unsigned long dispc,void * data)182 static bool dpi_calc_hsdiv_cb(int m_dispc, unsigned long dispc,
183 void *data)
184 {
185 struct dpi_clk_calc_ctx *ctx = data;
186
187 /*
188 * Odd dividers give us uneven duty cycle, causing problem when level
189 * shifted. So skip all odd dividers when the pixel clock is on the
190 * higher side.
191 */
192 if (m_dispc > 1 && m_dispc % 2 != 0 && ctx->pck_min >= 100000000)
193 return false;
194
195 ctx->dsi_cinfo.mX[HSDIV_DISPC] = m_dispc;
196 ctx->dsi_cinfo.clkout[HSDIV_DISPC] = dispc;
197
198 return dispc_div_calc(dispc, ctx->pck_min, ctx->pck_max,
199 dpi_calc_dispc_cb, ctx);
200 }
201
202
dpi_calc_pll_cb(int n,int m,unsigned long fint,unsigned long clkdco,void * data)203 static bool dpi_calc_pll_cb(int n, int m, unsigned long fint,
204 unsigned long clkdco,
205 void *data)
206 {
207 struct dpi_clk_calc_ctx *ctx = data;
208
209 ctx->dsi_cinfo.n = n;
210 ctx->dsi_cinfo.m = m;
211 ctx->dsi_cinfo.fint = fint;
212 ctx->dsi_cinfo.clkdco = clkdco;
213
214 return dss_pll_hsdiv_calc(ctx->pll, clkdco,
215 ctx->pck_min, dss_feat_get_param_max(FEAT_PARAM_DSS_FCK),
216 dpi_calc_hsdiv_cb, ctx);
217 }
218
dpi_calc_dss_cb(unsigned long fck,void * data)219 static bool dpi_calc_dss_cb(unsigned long fck, void *data)
220 {
221 struct dpi_clk_calc_ctx *ctx = data;
222
223 ctx->fck = fck;
224
225 return dispc_div_calc(fck, ctx->pck_min, ctx->pck_max,
226 dpi_calc_dispc_cb, ctx);
227 }
228
dpi_dsi_clk_calc(struct dpi_data * dpi,unsigned long pck,struct dpi_clk_calc_ctx * ctx)229 static bool dpi_dsi_clk_calc(struct dpi_data *dpi, unsigned long pck,
230 struct dpi_clk_calc_ctx *ctx)
231 {
232 unsigned long clkin;
233 unsigned long pll_min, pll_max;
234
235 memset(ctx, 0, sizeof(*ctx));
236 ctx->pll = dpi->pll;
237 ctx->pck_min = pck - 1000;
238 ctx->pck_max = pck + 1000;
239
240 pll_min = 0;
241 pll_max = 0;
242
243 clkin = clk_get_rate(ctx->pll->clkin);
244
245 return dss_pll_calc(ctx->pll, clkin,
246 pll_min, pll_max,
247 dpi_calc_pll_cb, ctx);
248 }
249
dpi_dss_clk_calc(unsigned long pck,struct dpi_clk_calc_ctx * ctx)250 static bool dpi_dss_clk_calc(unsigned long pck, struct dpi_clk_calc_ctx *ctx)
251 {
252 int i;
253
254 /*
255 * DSS fck gives us very few possibilities, so finding a good pixel
256 * clock may not be possible. We try multiple times to find the clock,
257 * each time widening the pixel clock range we look for, up to
258 * +/- ~15MHz.
259 */
260
261 for (i = 0; i < 25; ++i) {
262 bool ok;
263
264 memset(ctx, 0, sizeof(*ctx));
265 if (pck > 1000 * i * i * i)
266 ctx->pck_min = max(pck - 1000 * i * i * i, 0lu);
267 else
268 ctx->pck_min = 0;
269 ctx->pck_max = pck + 1000 * i * i * i;
270
271 ok = dss_div_calc(pck, ctx->pck_min, dpi_calc_dss_cb, ctx);
272 if (ok)
273 return ok;
274 }
275
276 return false;
277 }
278
279
280
dpi_set_dsi_clk(struct dpi_data * dpi,enum omap_channel channel,unsigned long pck_req,unsigned long * fck,int * lck_div,int * pck_div)281 static int dpi_set_dsi_clk(struct dpi_data *dpi, enum omap_channel channel,
282 unsigned long pck_req, unsigned long *fck, int *lck_div,
283 int *pck_div)
284 {
285 struct dpi_clk_calc_ctx ctx;
286 int r;
287 bool ok;
288
289 ok = dpi_dsi_clk_calc(dpi, pck_req, &ctx);
290 if (!ok)
291 return -EINVAL;
292
293 r = dss_pll_set_config(dpi->pll, &ctx.dsi_cinfo);
294 if (r)
295 return r;
296
297 dss_select_lcd_clk_source(channel,
298 dpi_get_alt_clk_src(channel));
299
300 dpi->mgr_config.clock_info = ctx.dispc_cinfo;
301
302 *fck = ctx.dsi_cinfo.clkout[HSDIV_DISPC];
303 *lck_div = ctx.dispc_cinfo.lck_div;
304 *pck_div = ctx.dispc_cinfo.pck_div;
305
306 return 0;
307 }
308
dpi_set_dispc_clk(struct dpi_data * dpi,unsigned long pck_req,unsigned long * fck,int * lck_div,int * pck_div)309 static int dpi_set_dispc_clk(struct dpi_data *dpi, unsigned long pck_req,
310 unsigned long *fck, int *lck_div, int *pck_div)
311 {
312 struct dpi_clk_calc_ctx ctx;
313 int r;
314 bool ok;
315
316 ok = dpi_dss_clk_calc(pck_req, &ctx);
317 if (!ok)
318 return -EINVAL;
319
320 r = dss_set_fck_rate(ctx.fck);
321 if (r)
322 return r;
323
324 dpi->mgr_config.clock_info = ctx.dispc_cinfo;
325
326 *fck = ctx.fck;
327 *lck_div = ctx.dispc_cinfo.lck_div;
328 *pck_div = ctx.dispc_cinfo.pck_div;
329
330 return 0;
331 }
332
dpi_set_mode(struct dpi_data * dpi)333 static int dpi_set_mode(struct dpi_data *dpi)
334 {
335 struct omap_dss_device *out = &dpi->output;
336 struct omap_overlay_manager *mgr = out->manager;
337 struct omap_video_timings *t = &dpi->timings;
338 int lck_div = 0, pck_div = 0;
339 unsigned long fck = 0;
340 unsigned long pck;
341 int r = 0;
342
343 if (dpi->pll)
344 r = dpi_set_dsi_clk(dpi, mgr->id, t->pixelclock, &fck,
345 &lck_div, &pck_div);
346 else
347 r = dpi_set_dispc_clk(dpi, t->pixelclock, &fck,
348 &lck_div, &pck_div);
349 if (r)
350 return r;
351
352 pck = fck / lck_div / pck_div;
353
354 if (pck != t->pixelclock) {
355 DSSWARN("Could not find exact pixel clock. Requested %d Hz, got %lu Hz\n",
356 t->pixelclock, pck);
357
358 t->pixelclock = pck;
359 }
360
361 dss_mgr_set_timings(mgr, t);
362
363 return 0;
364 }
365
dpi_config_lcd_manager(struct dpi_data * dpi)366 static void dpi_config_lcd_manager(struct dpi_data *dpi)
367 {
368 struct omap_dss_device *out = &dpi->output;
369 struct omap_overlay_manager *mgr = out->manager;
370
371 dpi->mgr_config.io_pad_mode = DSS_IO_PAD_MODE_BYPASS;
372
373 dpi->mgr_config.stallmode = false;
374 dpi->mgr_config.fifohandcheck = false;
375
376 dpi->mgr_config.video_port_width = dpi->data_lines;
377
378 dpi->mgr_config.lcden_sig_polarity = 0;
379
380 dss_mgr_set_lcd_config(mgr, &dpi->mgr_config);
381 }
382
dpi_display_enable(struct omap_dss_device * dssdev)383 static int dpi_display_enable(struct omap_dss_device *dssdev)
384 {
385 struct dpi_data *dpi = dpi_get_data_from_dssdev(dssdev);
386 struct omap_dss_device *out = &dpi->output;
387 int r;
388
389 mutex_lock(&dpi->lock);
390
391 if (dss_has_feature(FEAT_DPI_USES_VDDS_DSI) && !dpi->vdds_dsi_reg) {
392 DSSERR("no VDSS_DSI regulator\n");
393 r = -ENODEV;
394 goto err_no_reg;
395 }
396
397 if (out == NULL || out->manager == NULL) {
398 DSSERR("failed to enable display: no output/manager\n");
399 r = -ENODEV;
400 goto err_no_out_mgr;
401 }
402
403 if (dss_has_feature(FEAT_DPI_USES_VDDS_DSI)) {
404 r = regulator_enable(dpi->vdds_dsi_reg);
405 if (r)
406 goto err_reg_enable;
407 }
408
409 r = dispc_runtime_get();
410 if (r)
411 goto err_get_dispc;
412
413 r = dss_dpi_select_source(out->port_num, out->manager->id);
414 if (r)
415 goto err_src_sel;
416
417 if (dpi->pll) {
418 r = dss_pll_enable(dpi->pll);
419 if (r)
420 goto err_dsi_pll_init;
421 }
422
423 r = dpi_set_mode(dpi);
424 if (r)
425 goto err_set_mode;
426
427 dpi_config_lcd_manager(dpi);
428
429 mdelay(2);
430
431 r = dss_mgr_enable(out->manager);
432 if (r)
433 goto err_mgr_enable;
434
435 mutex_unlock(&dpi->lock);
436
437 return 0;
438
439 err_mgr_enable:
440 err_set_mode:
441 if (dpi->pll)
442 dss_pll_disable(dpi->pll);
443 err_dsi_pll_init:
444 err_src_sel:
445 dispc_runtime_put();
446 err_get_dispc:
447 if (dss_has_feature(FEAT_DPI_USES_VDDS_DSI))
448 regulator_disable(dpi->vdds_dsi_reg);
449 err_reg_enable:
450 err_no_out_mgr:
451 err_no_reg:
452 mutex_unlock(&dpi->lock);
453 return r;
454 }
455
dpi_display_disable(struct omap_dss_device * dssdev)456 static void dpi_display_disable(struct omap_dss_device *dssdev)
457 {
458 struct dpi_data *dpi = dpi_get_data_from_dssdev(dssdev);
459 struct omap_overlay_manager *mgr = dpi->output.manager;
460
461 mutex_lock(&dpi->lock);
462
463 dss_mgr_disable(mgr);
464
465 if (dpi->pll) {
466 dss_select_lcd_clk_source(mgr->id, OMAP_DSS_CLK_SRC_FCK);
467 dss_pll_disable(dpi->pll);
468 }
469
470 dispc_runtime_put();
471
472 if (dss_has_feature(FEAT_DPI_USES_VDDS_DSI))
473 regulator_disable(dpi->vdds_dsi_reg);
474
475 mutex_unlock(&dpi->lock);
476 }
477
dpi_set_timings(struct omap_dss_device * dssdev,struct omap_video_timings * timings)478 static void dpi_set_timings(struct omap_dss_device *dssdev,
479 struct omap_video_timings *timings)
480 {
481 struct dpi_data *dpi = dpi_get_data_from_dssdev(dssdev);
482
483 DSSDBG("dpi_set_timings\n");
484
485 mutex_lock(&dpi->lock);
486
487 dpi->timings = *timings;
488
489 mutex_unlock(&dpi->lock);
490 }
491
dpi_get_timings(struct omap_dss_device * dssdev,struct omap_video_timings * timings)492 static void dpi_get_timings(struct omap_dss_device *dssdev,
493 struct omap_video_timings *timings)
494 {
495 struct dpi_data *dpi = dpi_get_data_from_dssdev(dssdev);
496
497 mutex_lock(&dpi->lock);
498
499 *timings = dpi->timings;
500
501 mutex_unlock(&dpi->lock);
502 }
503
dpi_check_timings(struct omap_dss_device * dssdev,struct omap_video_timings * timings)504 static int dpi_check_timings(struct omap_dss_device *dssdev,
505 struct omap_video_timings *timings)
506 {
507 struct dpi_data *dpi = dpi_get_data_from_dssdev(dssdev);
508 struct omap_overlay_manager *mgr = dpi->output.manager;
509 int lck_div, pck_div;
510 unsigned long fck;
511 unsigned long pck;
512 struct dpi_clk_calc_ctx ctx;
513 bool ok;
514
515 if (mgr && !dispc_mgr_timings_ok(mgr->id, timings))
516 return -EINVAL;
517
518 if (timings->pixelclock == 0)
519 return -EINVAL;
520
521 if (dpi->pll) {
522 ok = dpi_dsi_clk_calc(dpi, timings->pixelclock, &ctx);
523 if (!ok)
524 return -EINVAL;
525
526 fck = ctx.dsi_cinfo.clkout[HSDIV_DISPC];
527 } else {
528 ok = dpi_dss_clk_calc(timings->pixelclock, &ctx);
529 if (!ok)
530 return -EINVAL;
531
532 fck = ctx.fck;
533 }
534
535 lck_div = ctx.dispc_cinfo.lck_div;
536 pck_div = ctx.dispc_cinfo.pck_div;
537
538 pck = fck / lck_div / pck_div;
539
540 timings->pixelclock = pck;
541
542 return 0;
543 }
544
dpi_set_data_lines(struct omap_dss_device * dssdev,int data_lines)545 static void dpi_set_data_lines(struct omap_dss_device *dssdev, int data_lines)
546 {
547 struct dpi_data *dpi = dpi_get_data_from_dssdev(dssdev);
548
549 mutex_lock(&dpi->lock);
550
551 dpi->data_lines = data_lines;
552
553 mutex_unlock(&dpi->lock);
554 }
555
dpi_verify_dsi_pll(struct dss_pll * pll)556 static int dpi_verify_dsi_pll(struct dss_pll *pll)
557 {
558 int r;
559
560 /* do initial setup with the PLL to see if it is operational */
561
562 r = dss_pll_enable(pll);
563 if (r)
564 return r;
565
566 dss_pll_disable(pll);
567
568 return 0;
569 }
570
dpi_init_regulator(struct dpi_data * dpi)571 static int dpi_init_regulator(struct dpi_data *dpi)
572 {
573 struct regulator *vdds_dsi;
574
575 if (!dss_has_feature(FEAT_DPI_USES_VDDS_DSI))
576 return 0;
577
578 if (dpi->vdds_dsi_reg)
579 return 0;
580
581 vdds_dsi = devm_regulator_get(&dpi->pdev->dev, "vdds_dsi");
582 if (IS_ERR(vdds_dsi)) {
583 if (PTR_ERR(vdds_dsi) != -EPROBE_DEFER)
584 DSSERR("can't get VDDS_DSI regulator\n");
585 return PTR_ERR(vdds_dsi);
586 }
587
588 dpi->vdds_dsi_reg = vdds_dsi;
589
590 return 0;
591 }
592
dpi_init_pll(struct dpi_data * dpi)593 static void dpi_init_pll(struct dpi_data *dpi)
594 {
595 struct dss_pll *pll;
596
597 if (dpi->pll)
598 return;
599
600 pll = dpi_get_pll(dpi->output.dispc_channel);
601 if (!pll)
602 return;
603
604 /* On DRA7 we need to set a mux to use the PLL */
605 if (omapdss_get_version() == OMAPDSS_VER_DRA7xx)
606 dss_ctrl_pll_set_control_mux(pll->id, dpi->output.dispc_channel);
607
608 if (dpi_verify_dsi_pll(pll)) {
609 DSSWARN("DSI PLL not operational\n");
610 return;
611 }
612
613 dpi->pll = pll;
614 }
615
616 /*
617 * Return a hardcoded channel for the DPI output. This should work for
618 * current use cases, but this can be later expanded to either resolve
619 * the channel in some more dynamic manner, or get the channel as a user
620 * parameter.
621 */
dpi_get_channel(int port_num)622 static enum omap_channel dpi_get_channel(int port_num)
623 {
624 switch (omapdss_get_version()) {
625 case OMAPDSS_VER_OMAP24xx:
626 case OMAPDSS_VER_OMAP34xx_ES1:
627 case OMAPDSS_VER_OMAP34xx_ES3:
628 case OMAPDSS_VER_OMAP3630:
629 case OMAPDSS_VER_AM35xx:
630 case OMAPDSS_VER_AM43xx:
631 return OMAP_DSS_CHANNEL_LCD;
632
633 case OMAPDSS_VER_DRA7xx:
634 switch (port_num) {
635 case 2:
636 return OMAP_DSS_CHANNEL_LCD3;
637 case 1:
638 return OMAP_DSS_CHANNEL_LCD2;
639 case 0:
640 default:
641 return OMAP_DSS_CHANNEL_LCD;
642 }
643
644 case OMAPDSS_VER_OMAP4430_ES1:
645 case OMAPDSS_VER_OMAP4430_ES2:
646 case OMAPDSS_VER_OMAP4:
647 return OMAP_DSS_CHANNEL_LCD2;
648
649 case OMAPDSS_VER_OMAP5:
650 return OMAP_DSS_CHANNEL_LCD3;
651
652 default:
653 DSSWARN("unsupported DSS version\n");
654 return OMAP_DSS_CHANNEL_LCD;
655 }
656 }
657
dpi_connect(struct omap_dss_device * dssdev,struct omap_dss_device * dst)658 static int dpi_connect(struct omap_dss_device *dssdev,
659 struct omap_dss_device *dst)
660 {
661 struct dpi_data *dpi = dpi_get_data_from_dssdev(dssdev);
662 struct omap_overlay_manager *mgr;
663 int r;
664
665 r = dpi_init_regulator(dpi);
666 if (r)
667 return r;
668
669 dpi_init_pll(dpi);
670
671 mgr = omap_dss_get_overlay_manager(dssdev->dispc_channel);
672 if (!mgr)
673 return -ENODEV;
674
675 r = dss_mgr_connect(mgr, dssdev);
676 if (r)
677 return r;
678
679 r = omapdss_output_set_device(dssdev, dst);
680 if (r) {
681 DSSERR("failed to connect output to new device: %s\n",
682 dst->name);
683 dss_mgr_disconnect(mgr, dssdev);
684 return r;
685 }
686
687 return 0;
688 }
689
dpi_disconnect(struct omap_dss_device * dssdev,struct omap_dss_device * dst)690 static void dpi_disconnect(struct omap_dss_device *dssdev,
691 struct omap_dss_device *dst)
692 {
693 WARN_ON(dst != dssdev->dst);
694
695 if (dst != dssdev->dst)
696 return;
697
698 omapdss_output_unset_device(dssdev);
699
700 if (dssdev->manager)
701 dss_mgr_disconnect(dssdev->manager, dssdev);
702 }
703
704 static const struct omapdss_dpi_ops dpi_ops = {
705 .connect = dpi_connect,
706 .disconnect = dpi_disconnect,
707
708 .enable = dpi_display_enable,
709 .disable = dpi_display_disable,
710
711 .check_timings = dpi_check_timings,
712 .set_timings = dpi_set_timings,
713 .get_timings = dpi_get_timings,
714
715 .set_data_lines = dpi_set_data_lines,
716 };
717
dpi_init_output(struct platform_device * pdev)718 static void dpi_init_output(struct platform_device *pdev)
719 {
720 struct dpi_data *dpi = dpi_get_data_from_pdev(pdev);
721 struct omap_dss_device *out = &dpi->output;
722
723 out->dev = &pdev->dev;
724 out->id = OMAP_DSS_OUTPUT_DPI;
725 out->output_type = OMAP_DISPLAY_TYPE_DPI;
726 out->name = "dpi.0";
727 out->dispc_channel = dpi_get_channel(0);
728 out->ops.dpi = &dpi_ops;
729 out->owner = THIS_MODULE;
730
731 omapdss_register_output(out);
732 }
733
dpi_uninit_output(struct platform_device * pdev)734 static void __exit dpi_uninit_output(struct platform_device *pdev)
735 {
736 struct dpi_data *dpi = dpi_get_data_from_pdev(pdev);
737 struct omap_dss_device *out = &dpi->output;
738
739 omapdss_unregister_output(out);
740 }
741
dpi_init_output_port(struct platform_device * pdev,struct device_node * port)742 static void dpi_init_output_port(struct platform_device *pdev,
743 struct device_node *port)
744 {
745 struct dpi_data *dpi = port->data;
746 struct omap_dss_device *out = &dpi->output;
747 int r;
748 u32 port_num;
749
750 r = of_property_read_u32(port, "reg", &port_num);
751 if (r)
752 port_num = 0;
753
754 switch (port_num) {
755 case 2:
756 out->name = "dpi.2";
757 break;
758 case 1:
759 out->name = "dpi.1";
760 break;
761 case 0:
762 default:
763 out->name = "dpi.0";
764 break;
765 }
766
767 out->dev = &pdev->dev;
768 out->id = OMAP_DSS_OUTPUT_DPI;
769 out->output_type = OMAP_DISPLAY_TYPE_DPI;
770 out->dispc_channel = dpi_get_channel(port_num);
771 out->port_num = port_num;
772 out->ops.dpi = &dpi_ops;
773 out->owner = THIS_MODULE;
774
775 omapdss_register_output(out);
776 }
777
dpi_uninit_output_port(struct device_node * port)778 static void __exit dpi_uninit_output_port(struct device_node *port)
779 {
780 struct dpi_data *dpi = port->data;
781 struct omap_dss_device *out = &dpi->output;
782
783 omapdss_unregister_output(out);
784 }
785
omap_dpi_probe(struct platform_device * pdev)786 static int omap_dpi_probe(struct platform_device *pdev)
787 {
788 struct dpi_data *dpi;
789
790 dpi = devm_kzalloc(&pdev->dev, sizeof(*dpi), GFP_KERNEL);
791 if (!dpi)
792 return -ENOMEM;
793
794 dpi->pdev = pdev;
795
796 dev_set_drvdata(&pdev->dev, dpi);
797
798 mutex_init(&dpi->lock);
799
800 dpi_init_output(pdev);
801
802 return 0;
803 }
804
omap_dpi_remove(struct platform_device * pdev)805 static int __exit omap_dpi_remove(struct platform_device *pdev)
806 {
807 dpi_uninit_output(pdev);
808
809 return 0;
810 }
811
812 static struct platform_driver omap_dpi_driver = {
813 .probe = omap_dpi_probe,
814 .remove = __exit_p(omap_dpi_remove),
815 .driver = {
816 .name = "omapdss_dpi",
817 .suppress_bind_attrs = true,
818 },
819 };
820
dpi_init_platform_driver(void)821 int __init dpi_init_platform_driver(void)
822 {
823 return platform_driver_register(&omap_dpi_driver);
824 }
825
dpi_uninit_platform_driver(void)826 void __exit dpi_uninit_platform_driver(void)
827 {
828 platform_driver_unregister(&omap_dpi_driver);
829 }
830
dpi_init_port(struct platform_device * pdev,struct device_node * port)831 int __init dpi_init_port(struct platform_device *pdev, struct device_node *port)
832 {
833 struct dpi_data *dpi;
834 struct device_node *ep;
835 u32 datalines;
836 int r;
837
838 dpi = devm_kzalloc(&pdev->dev, sizeof(*dpi), GFP_KERNEL);
839 if (!dpi)
840 return -ENOMEM;
841
842 ep = omapdss_of_get_next_endpoint(port, NULL);
843 if (!ep)
844 return 0;
845
846 r = of_property_read_u32(ep, "data-lines", &datalines);
847 if (r) {
848 DSSERR("failed to parse datalines\n");
849 goto err_datalines;
850 }
851
852 dpi->data_lines = datalines;
853
854 of_node_put(ep);
855
856 dpi->pdev = pdev;
857 port->data = dpi;
858
859 mutex_init(&dpi->lock);
860
861 dpi_init_output_port(pdev, port);
862
863 dpi->port_initialized = true;
864
865 return 0;
866
867 err_datalines:
868 of_node_put(ep);
869
870 return r;
871 }
872
dpi_uninit_port(struct device_node * port)873 void __exit dpi_uninit_port(struct device_node *port)
874 {
875 struct dpi_data *dpi = port->data;
876
877 if (!dpi->port_initialized)
878 return;
879
880 dpi_uninit_output_port(port);
881 }
882