1 /*
2 * Sony CXD2820R demodulator driver
3 *
4 * Copyright (C) 2010 Antti Palosaari <crope@iki.fi>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License along
17 * with this program; if not, write to the Free Software Foundation, Inc.,
18 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
19 */
20
21
22 #include "cxd2820r_priv.h"
23
24 /* Max transfer size done by I2C transfer functions */
25 #define MAX_XFER_SIZE 64
26
27 /* write multiple registers */
cxd2820r_wr_regs_i2c(struct cxd2820r_priv * priv,u8 i2c,u8 reg,u8 * val,int len)28 static int cxd2820r_wr_regs_i2c(struct cxd2820r_priv *priv, u8 i2c, u8 reg,
29 u8 *val, int len)
30 {
31 int ret;
32 u8 buf[MAX_XFER_SIZE];
33 struct i2c_msg msg[1] = {
34 {
35 .addr = i2c,
36 .flags = 0,
37 .len = len + 1,
38 .buf = buf,
39 }
40 };
41
42 if (1 + len > sizeof(buf)) {
43 dev_warn(&priv->i2c->dev,
44 "%s: i2c wr reg=%04x: len=%d is too big!\n",
45 KBUILD_MODNAME, reg, len);
46 return -EINVAL;
47 }
48
49 buf[0] = reg;
50 memcpy(&buf[1], val, len);
51
52 ret = i2c_transfer(priv->i2c, msg, 1);
53 if (ret == 1) {
54 ret = 0;
55 } else {
56 dev_warn(&priv->i2c->dev, "%s: i2c wr failed=%d reg=%02x " \
57 "len=%d\n", KBUILD_MODNAME, ret, reg, len);
58 ret = -EREMOTEIO;
59 }
60 return ret;
61 }
62
63 /* read multiple registers */
cxd2820r_rd_regs_i2c(struct cxd2820r_priv * priv,u8 i2c,u8 reg,u8 * val,int len)64 static int cxd2820r_rd_regs_i2c(struct cxd2820r_priv *priv, u8 i2c, u8 reg,
65 u8 *val, int len)
66 {
67 int ret;
68 u8 buf[MAX_XFER_SIZE];
69 struct i2c_msg msg[2] = {
70 {
71 .addr = i2c,
72 .flags = 0,
73 .len = 1,
74 .buf = ®,
75 }, {
76 .addr = i2c,
77 .flags = I2C_M_RD,
78 .len = len,
79 .buf = buf,
80 }
81 };
82
83 if (len > sizeof(buf)) {
84 dev_warn(&priv->i2c->dev,
85 "%s: i2c wr reg=%04x: len=%d is too big!\n",
86 KBUILD_MODNAME, reg, len);
87 return -EINVAL;
88 }
89
90 ret = i2c_transfer(priv->i2c, msg, 2);
91 if (ret == 2) {
92 memcpy(val, buf, len);
93 ret = 0;
94 } else {
95 dev_warn(&priv->i2c->dev, "%s: i2c rd failed=%d reg=%02x " \
96 "len=%d\n", KBUILD_MODNAME, ret, reg, len);
97 ret = -EREMOTEIO;
98 }
99
100 return ret;
101 }
102
103 /* write multiple registers */
cxd2820r_wr_regs(struct cxd2820r_priv * priv,u32 reginfo,u8 * val,int len)104 int cxd2820r_wr_regs(struct cxd2820r_priv *priv, u32 reginfo, u8 *val,
105 int len)
106 {
107 int ret;
108 u8 i2c_addr;
109 u8 reg = (reginfo >> 0) & 0xff;
110 u8 bank = (reginfo >> 8) & 0xff;
111 u8 i2c = (reginfo >> 16) & 0x01;
112
113 /* select I2C */
114 if (i2c)
115 i2c_addr = priv->cfg.i2c_address | (1 << 1); /* DVB-C */
116 else
117 i2c_addr = priv->cfg.i2c_address; /* DVB-T/T2 */
118
119 /* switch bank if needed */
120 if (bank != priv->bank[i2c]) {
121 ret = cxd2820r_wr_regs_i2c(priv, i2c_addr, 0x00, &bank, 1);
122 if (ret)
123 return ret;
124 priv->bank[i2c] = bank;
125 }
126 return cxd2820r_wr_regs_i2c(priv, i2c_addr, reg, val, len);
127 }
128
129 /* read multiple registers */
cxd2820r_rd_regs(struct cxd2820r_priv * priv,u32 reginfo,u8 * val,int len)130 int cxd2820r_rd_regs(struct cxd2820r_priv *priv, u32 reginfo, u8 *val,
131 int len)
132 {
133 int ret;
134 u8 i2c_addr;
135 u8 reg = (reginfo >> 0) & 0xff;
136 u8 bank = (reginfo >> 8) & 0xff;
137 u8 i2c = (reginfo >> 16) & 0x01;
138
139 /* select I2C */
140 if (i2c)
141 i2c_addr = priv->cfg.i2c_address | (1 << 1); /* DVB-C */
142 else
143 i2c_addr = priv->cfg.i2c_address; /* DVB-T/T2 */
144
145 /* switch bank if needed */
146 if (bank != priv->bank[i2c]) {
147 ret = cxd2820r_wr_regs_i2c(priv, i2c_addr, 0x00, &bank, 1);
148 if (ret)
149 return ret;
150 priv->bank[i2c] = bank;
151 }
152 return cxd2820r_rd_regs_i2c(priv, i2c_addr, reg, val, len);
153 }
154
155 /* write single register */
cxd2820r_wr_reg(struct cxd2820r_priv * priv,u32 reg,u8 val)156 int cxd2820r_wr_reg(struct cxd2820r_priv *priv, u32 reg, u8 val)
157 {
158 return cxd2820r_wr_regs(priv, reg, &val, 1);
159 }
160
161 /* read single register */
cxd2820r_rd_reg(struct cxd2820r_priv * priv,u32 reg,u8 * val)162 int cxd2820r_rd_reg(struct cxd2820r_priv *priv, u32 reg, u8 *val)
163 {
164 return cxd2820r_rd_regs(priv, reg, val, 1);
165 }
166
167 /* write single register with mask */
cxd2820r_wr_reg_mask(struct cxd2820r_priv * priv,u32 reg,u8 val,u8 mask)168 int cxd2820r_wr_reg_mask(struct cxd2820r_priv *priv, u32 reg, u8 val,
169 u8 mask)
170 {
171 int ret;
172 u8 tmp;
173
174 /* no need for read if whole reg is written */
175 if (mask != 0xff) {
176 ret = cxd2820r_rd_reg(priv, reg, &tmp);
177 if (ret)
178 return ret;
179
180 val &= mask;
181 tmp &= ~mask;
182 val |= tmp;
183 }
184
185 return cxd2820r_wr_reg(priv, reg, val);
186 }
187
cxd2820r_gpio(struct dvb_frontend * fe,u8 * gpio)188 int cxd2820r_gpio(struct dvb_frontend *fe, u8 *gpio)
189 {
190 struct cxd2820r_priv *priv = fe->demodulator_priv;
191 int ret, i;
192 u8 tmp0, tmp1;
193
194 dev_dbg(&priv->i2c->dev, "%s: delsys=%d\n", __func__,
195 fe->dtv_property_cache.delivery_system);
196
197 /* update GPIOs only when needed */
198 if (!memcmp(gpio, priv->gpio, sizeof(priv->gpio)))
199 return 0;
200
201 tmp0 = 0x00;
202 tmp1 = 0x00;
203 for (i = 0; i < sizeof(priv->gpio); i++) {
204 /* enable / disable */
205 if (gpio[i] & CXD2820R_GPIO_E)
206 tmp0 |= (2 << 6) >> (2 * i);
207 else
208 tmp0 |= (1 << 6) >> (2 * i);
209
210 /* input / output */
211 if (gpio[i] & CXD2820R_GPIO_I)
212 tmp1 |= (1 << (3 + i));
213 else
214 tmp1 |= (0 << (3 + i));
215
216 /* high / low */
217 if (gpio[i] & CXD2820R_GPIO_H)
218 tmp1 |= (1 << (0 + i));
219 else
220 tmp1 |= (0 << (0 + i));
221
222 dev_dbg(&priv->i2c->dev, "%s: gpio i=%d %02x %02x\n", __func__,
223 i, tmp0, tmp1);
224 }
225
226 dev_dbg(&priv->i2c->dev, "%s: wr gpio=%02x %02x\n", __func__, tmp0,
227 tmp1);
228
229 /* write bits [7:2] */
230 ret = cxd2820r_wr_reg_mask(priv, 0x00089, tmp0, 0xfc);
231 if (ret)
232 goto error;
233
234 /* write bits [5:0] */
235 ret = cxd2820r_wr_reg_mask(priv, 0x0008e, tmp1, 0x3f);
236 if (ret)
237 goto error;
238
239 memcpy(priv->gpio, gpio, sizeof(priv->gpio));
240
241 return ret;
242 error:
243 dev_dbg(&priv->i2c->dev, "%s: failed=%d\n", __func__, ret);
244 return ret;
245 }
246
cxd2820r_set_frontend(struct dvb_frontend * fe)247 static int cxd2820r_set_frontend(struct dvb_frontend *fe)
248 {
249 struct cxd2820r_priv *priv = fe->demodulator_priv;
250 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
251 int ret;
252
253 dev_dbg(&priv->i2c->dev, "%s: delsys=%d\n", __func__,
254 fe->dtv_property_cache.delivery_system);
255
256 switch (c->delivery_system) {
257 case SYS_DVBT:
258 ret = cxd2820r_init_t(fe);
259 if (ret < 0)
260 goto err;
261 ret = cxd2820r_set_frontend_t(fe);
262 if (ret < 0)
263 goto err;
264 break;
265 case SYS_DVBT2:
266 ret = cxd2820r_init_t(fe);
267 if (ret < 0)
268 goto err;
269 ret = cxd2820r_set_frontend_t2(fe);
270 if (ret < 0)
271 goto err;
272 break;
273 case SYS_DVBC_ANNEX_A:
274 ret = cxd2820r_init_c(fe);
275 if (ret < 0)
276 goto err;
277 ret = cxd2820r_set_frontend_c(fe);
278 if (ret < 0)
279 goto err;
280 break;
281 default:
282 dev_dbg(&priv->i2c->dev, "%s: error state=%d\n", __func__,
283 fe->dtv_property_cache.delivery_system);
284 ret = -EINVAL;
285 break;
286 }
287 err:
288 return ret;
289 }
cxd2820r_read_status(struct dvb_frontend * fe,fe_status_t * status)290 static int cxd2820r_read_status(struct dvb_frontend *fe, fe_status_t *status)
291 {
292 struct cxd2820r_priv *priv = fe->demodulator_priv;
293 int ret;
294
295 dev_dbg(&priv->i2c->dev, "%s: delsys=%d\n", __func__,
296 fe->dtv_property_cache.delivery_system);
297
298 switch (fe->dtv_property_cache.delivery_system) {
299 case SYS_DVBT:
300 ret = cxd2820r_read_status_t(fe, status);
301 break;
302 case SYS_DVBT2:
303 ret = cxd2820r_read_status_t2(fe, status);
304 break;
305 case SYS_DVBC_ANNEX_A:
306 ret = cxd2820r_read_status_c(fe, status);
307 break;
308 default:
309 ret = -EINVAL;
310 break;
311 }
312 return ret;
313 }
314
cxd2820r_get_frontend(struct dvb_frontend * fe)315 static int cxd2820r_get_frontend(struct dvb_frontend *fe)
316 {
317 struct cxd2820r_priv *priv = fe->demodulator_priv;
318 int ret;
319
320 dev_dbg(&priv->i2c->dev, "%s: delsys=%d\n", __func__,
321 fe->dtv_property_cache.delivery_system);
322
323 if (priv->delivery_system == SYS_UNDEFINED)
324 return 0;
325
326 switch (fe->dtv_property_cache.delivery_system) {
327 case SYS_DVBT:
328 ret = cxd2820r_get_frontend_t(fe);
329 break;
330 case SYS_DVBT2:
331 ret = cxd2820r_get_frontend_t2(fe);
332 break;
333 case SYS_DVBC_ANNEX_A:
334 ret = cxd2820r_get_frontend_c(fe);
335 break;
336 default:
337 ret = -EINVAL;
338 break;
339 }
340 return ret;
341 }
342
cxd2820r_read_ber(struct dvb_frontend * fe,u32 * ber)343 static int cxd2820r_read_ber(struct dvb_frontend *fe, u32 *ber)
344 {
345 struct cxd2820r_priv *priv = fe->demodulator_priv;
346 int ret;
347
348 dev_dbg(&priv->i2c->dev, "%s: delsys=%d\n", __func__,
349 fe->dtv_property_cache.delivery_system);
350
351 switch (fe->dtv_property_cache.delivery_system) {
352 case SYS_DVBT:
353 ret = cxd2820r_read_ber_t(fe, ber);
354 break;
355 case SYS_DVBT2:
356 ret = cxd2820r_read_ber_t2(fe, ber);
357 break;
358 case SYS_DVBC_ANNEX_A:
359 ret = cxd2820r_read_ber_c(fe, ber);
360 break;
361 default:
362 ret = -EINVAL;
363 break;
364 }
365 return ret;
366 }
367
cxd2820r_read_signal_strength(struct dvb_frontend * fe,u16 * strength)368 static int cxd2820r_read_signal_strength(struct dvb_frontend *fe, u16 *strength)
369 {
370 struct cxd2820r_priv *priv = fe->demodulator_priv;
371 int ret;
372
373 dev_dbg(&priv->i2c->dev, "%s: delsys=%d\n", __func__,
374 fe->dtv_property_cache.delivery_system);
375
376 switch (fe->dtv_property_cache.delivery_system) {
377 case SYS_DVBT:
378 ret = cxd2820r_read_signal_strength_t(fe, strength);
379 break;
380 case SYS_DVBT2:
381 ret = cxd2820r_read_signal_strength_t2(fe, strength);
382 break;
383 case SYS_DVBC_ANNEX_A:
384 ret = cxd2820r_read_signal_strength_c(fe, strength);
385 break;
386 default:
387 ret = -EINVAL;
388 break;
389 }
390 return ret;
391 }
392
cxd2820r_read_snr(struct dvb_frontend * fe,u16 * snr)393 static int cxd2820r_read_snr(struct dvb_frontend *fe, u16 *snr)
394 {
395 struct cxd2820r_priv *priv = fe->demodulator_priv;
396 int ret;
397
398 dev_dbg(&priv->i2c->dev, "%s: delsys=%d\n", __func__,
399 fe->dtv_property_cache.delivery_system);
400
401 switch (fe->dtv_property_cache.delivery_system) {
402 case SYS_DVBT:
403 ret = cxd2820r_read_snr_t(fe, snr);
404 break;
405 case SYS_DVBT2:
406 ret = cxd2820r_read_snr_t2(fe, snr);
407 break;
408 case SYS_DVBC_ANNEX_A:
409 ret = cxd2820r_read_snr_c(fe, snr);
410 break;
411 default:
412 ret = -EINVAL;
413 break;
414 }
415 return ret;
416 }
417
cxd2820r_read_ucblocks(struct dvb_frontend * fe,u32 * ucblocks)418 static int cxd2820r_read_ucblocks(struct dvb_frontend *fe, u32 *ucblocks)
419 {
420 struct cxd2820r_priv *priv = fe->demodulator_priv;
421 int ret;
422
423 dev_dbg(&priv->i2c->dev, "%s: delsys=%d\n", __func__,
424 fe->dtv_property_cache.delivery_system);
425
426 switch (fe->dtv_property_cache.delivery_system) {
427 case SYS_DVBT:
428 ret = cxd2820r_read_ucblocks_t(fe, ucblocks);
429 break;
430 case SYS_DVBT2:
431 ret = cxd2820r_read_ucblocks_t2(fe, ucblocks);
432 break;
433 case SYS_DVBC_ANNEX_A:
434 ret = cxd2820r_read_ucblocks_c(fe, ucblocks);
435 break;
436 default:
437 ret = -EINVAL;
438 break;
439 }
440 return ret;
441 }
442
cxd2820r_init(struct dvb_frontend * fe)443 static int cxd2820r_init(struct dvb_frontend *fe)
444 {
445 return 0;
446 }
447
cxd2820r_sleep(struct dvb_frontend * fe)448 static int cxd2820r_sleep(struct dvb_frontend *fe)
449 {
450 struct cxd2820r_priv *priv = fe->demodulator_priv;
451 int ret;
452
453 dev_dbg(&priv->i2c->dev, "%s: delsys=%d\n", __func__,
454 fe->dtv_property_cache.delivery_system);
455
456 switch (fe->dtv_property_cache.delivery_system) {
457 case SYS_DVBT:
458 ret = cxd2820r_sleep_t(fe);
459 break;
460 case SYS_DVBT2:
461 ret = cxd2820r_sleep_t2(fe);
462 break;
463 case SYS_DVBC_ANNEX_A:
464 ret = cxd2820r_sleep_c(fe);
465 break;
466 default:
467 ret = -EINVAL;
468 break;
469 }
470 return ret;
471 }
472
cxd2820r_get_tune_settings(struct dvb_frontend * fe,struct dvb_frontend_tune_settings * s)473 static int cxd2820r_get_tune_settings(struct dvb_frontend *fe,
474 struct dvb_frontend_tune_settings *s)
475 {
476 struct cxd2820r_priv *priv = fe->demodulator_priv;
477 int ret;
478
479 dev_dbg(&priv->i2c->dev, "%s: delsys=%d\n", __func__,
480 fe->dtv_property_cache.delivery_system);
481
482 switch (fe->dtv_property_cache.delivery_system) {
483 case SYS_DVBT:
484 ret = cxd2820r_get_tune_settings_t(fe, s);
485 break;
486 case SYS_DVBT2:
487 ret = cxd2820r_get_tune_settings_t2(fe, s);
488 break;
489 case SYS_DVBC_ANNEX_A:
490 ret = cxd2820r_get_tune_settings_c(fe, s);
491 break;
492 default:
493 ret = -EINVAL;
494 break;
495 }
496 return ret;
497 }
498
cxd2820r_search(struct dvb_frontend * fe)499 static enum dvbfe_search cxd2820r_search(struct dvb_frontend *fe)
500 {
501 struct cxd2820r_priv *priv = fe->demodulator_priv;
502 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
503 int ret, i;
504 fe_status_t status = 0;
505
506 dev_dbg(&priv->i2c->dev, "%s: delsys=%d\n", __func__,
507 fe->dtv_property_cache.delivery_system);
508
509 /* switch between DVB-T and DVB-T2 when tune fails */
510 if (priv->last_tune_failed) {
511 if (priv->delivery_system == SYS_DVBT) {
512 ret = cxd2820r_sleep_t(fe);
513 if (ret)
514 goto error;
515
516 c->delivery_system = SYS_DVBT2;
517 } else if (priv->delivery_system == SYS_DVBT2) {
518 ret = cxd2820r_sleep_t2(fe);
519 if (ret)
520 goto error;
521
522 c->delivery_system = SYS_DVBT;
523 }
524 }
525
526 /* set frontend */
527 ret = cxd2820r_set_frontend(fe);
528 if (ret)
529 goto error;
530
531
532 /* frontend lock wait loop count */
533 switch (priv->delivery_system) {
534 case SYS_DVBT:
535 case SYS_DVBC_ANNEX_A:
536 i = 20;
537 break;
538 case SYS_DVBT2:
539 i = 40;
540 break;
541 case SYS_UNDEFINED:
542 default:
543 i = 0;
544 break;
545 }
546
547 /* wait frontend lock */
548 for (; i > 0; i--) {
549 dev_dbg(&priv->i2c->dev, "%s: loop=%d\n", __func__, i);
550 msleep(50);
551 ret = cxd2820r_read_status(fe, &status);
552 if (ret)
553 goto error;
554
555 if (status & FE_HAS_LOCK)
556 break;
557 }
558
559 /* check if we have a valid signal */
560 if (status & FE_HAS_LOCK) {
561 priv->last_tune_failed = false;
562 return DVBFE_ALGO_SEARCH_SUCCESS;
563 } else {
564 priv->last_tune_failed = true;
565 return DVBFE_ALGO_SEARCH_AGAIN;
566 }
567
568 error:
569 dev_dbg(&priv->i2c->dev, "%s: failed=%d\n", __func__, ret);
570 return DVBFE_ALGO_SEARCH_ERROR;
571 }
572
cxd2820r_get_frontend_algo(struct dvb_frontend * fe)573 static int cxd2820r_get_frontend_algo(struct dvb_frontend *fe)
574 {
575 return DVBFE_ALGO_CUSTOM;
576 }
577
cxd2820r_release(struct dvb_frontend * fe)578 static void cxd2820r_release(struct dvb_frontend *fe)
579 {
580 struct cxd2820r_priv *priv = fe->demodulator_priv;
581
582 dev_dbg(&priv->i2c->dev, "%s\n", __func__);
583
584 #ifdef CONFIG_GPIOLIB
585 /* remove GPIOs */
586 if (priv->gpio_chip.label)
587 gpiochip_remove(&priv->gpio_chip);
588
589 #endif
590 kfree(priv);
591 return;
592 }
593
cxd2820r_i2c_gate_ctrl(struct dvb_frontend * fe,int enable)594 static int cxd2820r_i2c_gate_ctrl(struct dvb_frontend *fe, int enable)
595 {
596 struct cxd2820r_priv *priv = fe->demodulator_priv;
597
598 dev_dbg(&priv->i2c->dev, "%s: %d\n", __func__, enable);
599
600 /* Bit 0 of reg 0xdb in bank 0x00 controls I2C repeater */
601 return cxd2820r_wr_reg_mask(priv, 0xdb, enable ? 1 : 0, 0x1);
602 }
603
604 #ifdef CONFIG_GPIOLIB
cxd2820r_gpio_direction_output(struct gpio_chip * chip,unsigned nr,int val)605 static int cxd2820r_gpio_direction_output(struct gpio_chip *chip, unsigned nr,
606 int val)
607 {
608 struct cxd2820r_priv *priv =
609 container_of(chip, struct cxd2820r_priv, gpio_chip);
610 u8 gpio[GPIO_COUNT];
611
612 dev_dbg(&priv->i2c->dev, "%s: nr=%d val=%d\n", __func__, nr, val);
613
614 memcpy(gpio, priv->gpio, sizeof(gpio));
615 gpio[nr] = CXD2820R_GPIO_E | CXD2820R_GPIO_O | (val << 2);
616
617 return cxd2820r_gpio(&priv->fe, gpio);
618 }
619
cxd2820r_gpio_set(struct gpio_chip * chip,unsigned nr,int val)620 static void cxd2820r_gpio_set(struct gpio_chip *chip, unsigned nr, int val)
621 {
622 struct cxd2820r_priv *priv =
623 container_of(chip, struct cxd2820r_priv, gpio_chip);
624 u8 gpio[GPIO_COUNT];
625
626 dev_dbg(&priv->i2c->dev, "%s: nr=%d val=%d\n", __func__, nr, val);
627
628 memcpy(gpio, priv->gpio, sizeof(gpio));
629 gpio[nr] = CXD2820R_GPIO_E | CXD2820R_GPIO_O | (val << 2);
630
631 (void) cxd2820r_gpio(&priv->fe, gpio);
632
633 return;
634 }
635
cxd2820r_gpio_get(struct gpio_chip * chip,unsigned nr)636 static int cxd2820r_gpio_get(struct gpio_chip *chip, unsigned nr)
637 {
638 struct cxd2820r_priv *priv =
639 container_of(chip, struct cxd2820r_priv, gpio_chip);
640
641 dev_dbg(&priv->i2c->dev, "%s: nr=%d\n", __func__, nr);
642
643 return (priv->gpio[nr] >> 2) & 0x01;
644 }
645 #endif
646
647 static const struct dvb_frontend_ops cxd2820r_ops = {
648 .delsys = { SYS_DVBT, SYS_DVBT2, SYS_DVBC_ANNEX_A },
649 /* default: DVB-T/T2 */
650 .info = {
651 .name = "Sony CXD2820R",
652
653 .caps = FE_CAN_FEC_1_2 |
654 FE_CAN_FEC_2_3 |
655 FE_CAN_FEC_3_4 |
656 FE_CAN_FEC_5_6 |
657 FE_CAN_FEC_7_8 |
658 FE_CAN_FEC_AUTO |
659 FE_CAN_QPSK |
660 FE_CAN_QAM_16 |
661 FE_CAN_QAM_32 |
662 FE_CAN_QAM_64 |
663 FE_CAN_QAM_128 |
664 FE_CAN_QAM_256 |
665 FE_CAN_QAM_AUTO |
666 FE_CAN_TRANSMISSION_MODE_AUTO |
667 FE_CAN_GUARD_INTERVAL_AUTO |
668 FE_CAN_HIERARCHY_AUTO |
669 FE_CAN_MUTE_TS |
670 FE_CAN_2G_MODULATION |
671 FE_CAN_MULTISTREAM
672 },
673
674 .release = cxd2820r_release,
675 .init = cxd2820r_init,
676 .sleep = cxd2820r_sleep,
677
678 .get_tune_settings = cxd2820r_get_tune_settings,
679 .i2c_gate_ctrl = cxd2820r_i2c_gate_ctrl,
680
681 .get_frontend = cxd2820r_get_frontend,
682
683 .get_frontend_algo = cxd2820r_get_frontend_algo,
684 .search = cxd2820r_search,
685
686 .read_status = cxd2820r_read_status,
687 .read_snr = cxd2820r_read_snr,
688 .read_ber = cxd2820r_read_ber,
689 .read_ucblocks = cxd2820r_read_ucblocks,
690 .read_signal_strength = cxd2820r_read_signal_strength,
691 };
692
cxd2820r_attach(const struct cxd2820r_config * cfg,struct i2c_adapter * i2c,int * gpio_chip_base)693 struct dvb_frontend *cxd2820r_attach(const struct cxd2820r_config *cfg,
694 struct i2c_adapter *i2c, int *gpio_chip_base
695 )
696 {
697 struct cxd2820r_priv *priv;
698 int ret;
699 u8 tmp;
700
701 priv = kzalloc(sizeof(struct cxd2820r_priv), GFP_KERNEL);
702 if (!priv) {
703 ret = -ENOMEM;
704 dev_err(&i2c->dev, "%s: kzalloc() failed\n",
705 KBUILD_MODNAME);
706 goto error;
707 }
708
709 priv->i2c = i2c;
710 memcpy(&priv->cfg, cfg, sizeof(struct cxd2820r_config));
711 memcpy(&priv->fe.ops, &cxd2820r_ops, sizeof(struct dvb_frontend_ops));
712 priv->fe.demodulator_priv = priv;
713
714 priv->bank[0] = priv->bank[1] = 0xff;
715 ret = cxd2820r_rd_reg(priv, 0x000fd, &tmp);
716 dev_dbg(&priv->i2c->dev, "%s: chip id=%02x\n", __func__, tmp);
717 if (ret || tmp != 0xe1)
718 goto error;
719
720 if (gpio_chip_base) {
721 #ifdef CONFIG_GPIOLIB
722 /* add GPIOs */
723 priv->gpio_chip.label = KBUILD_MODNAME;
724 priv->gpio_chip.dev = &priv->i2c->dev;
725 priv->gpio_chip.owner = THIS_MODULE;
726 priv->gpio_chip.direction_output =
727 cxd2820r_gpio_direction_output;
728 priv->gpio_chip.set = cxd2820r_gpio_set;
729 priv->gpio_chip.get = cxd2820r_gpio_get;
730 priv->gpio_chip.base = -1; /* dynamic allocation */
731 priv->gpio_chip.ngpio = GPIO_COUNT;
732 priv->gpio_chip.can_sleep = 1;
733 ret = gpiochip_add(&priv->gpio_chip);
734 if (ret)
735 goto error;
736
737 dev_dbg(&priv->i2c->dev, "%s: gpio_chip.base=%d\n", __func__,
738 priv->gpio_chip.base);
739
740 *gpio_chip_base = priv->gpio_chip.base;
741 #else
742 /*
743 * Use static GPIO configuration if GPIOLIB is undefined.
744 * This is fallback condition.
745 */
746 u8 gpio[GPIO_COUNT];
747 gpio[0] = (*gpio_chip_base >> 0) & 0x07;
748 gpio[1] = (*gpio_chip_base >> 3) & 0x07;
749 gpio[2] = 0;
750 ret = cxd2820r_gpio(&priv->fe, gpio);
751 if (ret)
752 goto error;
753 #endif
754 }
755
756 return &priv->fe;
757 error:
758 dev_dbg(&i2c->dev, "%s: failed=%d\n", __func__, ret);
759 kfree(priv);
760 return NULL;
761 }
762 EXPORT_SYMBOL(cxd2820r_attach);
763
764 MODULE_AUTHOR("Antti Palosaari <crope@iki.fi>");
765 MODULE_DESCRIPTION("Sony CXD2820R demodulator driver");
766 MODULE_LICENSE("GPL");
767