1 /*
2 * Favr-32 board-specific setup code.
3 *
4 * Copyright (C) 2008 Atmel Corporation
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10 #include <linux/clk.h>
11 #include <linux/etherdevice.h>
12 #include <linux/bootmem.h>
13 #include <linux/fb.h>
14 #include <linux/init.h>
15 #include <linux/platform_device.h>
16 #include <linux/types.h>
17 #include <linux/linkage.h>
18 #include <linux/gpio.h>
19 #include <linux/leds.h>
20 #include <linux/atmel-mci.h>
21 #include <linux/pwm.h>
22 #include <linux/pwm_backlight.h>
23 #include <linux/regulator/fixed.h>
24 #include <linux/regulator/machine.h>
25 #include <linux/spi/spi.h>
26 #include <linux/spi/ads7846.h>
27
28 #include <sound/atmel-abdac.h>
29
30 #include <video/atmel_lcdc.h>
31
32 #include <asm/setup.h>
33
34 #include <mach/at32ap700x.h>
35 #include <mach/init.h>
36 #include <mach/board.h>
37 #include <mach/portmux.h>
38
39 #define PWM_BL_CH 2
40
41 /* Oscillator frequencies. These are board-specific */
42 unsigned long at32_board_osc_rates[3] = {
43 [0] = 32768, /* 32.768 kHz on RTC osc */
44 [1] = 20000000, /* 20 MHz on osc0 */
45 [2] = 12000000, /* 12 MHz on osc1 */
46 };
47
48 /* Initialized by bootloader-specific startup code. */
49 struct tag *bootloader_tags __initdata;
50
51 static struct atmel_abdac_pdata __initdata abdac0_data = {
52 };
53
54 struct eth_addr {
55 u8 addr[6];
56 };
57 static struct eth_addr __initdata hw_addr[1];
58 static struct macb_platform_data __initdata eth_data[1] = {
59 {
60 .phy_mask = ~(1U << 1),
61 },
62 };
63
ads7843_get_pendown_state(void)64 static int ads7843_get_pendown_state(void)
65 {
66 return !gpio_get_value(GPIO_PIN_PB(3));
67 }
68
69 static struct ads7846_platform_data ads7843_data = {
70 .model = 7843,
71 .get_pendown_state = ads7843_get_pendown_state,
72 .pressure_max = 255,
73 /*
74 * Values below are for debounce filtering, these can be experimented
75 * with further.
76 */
77 .debounce_max = 20,
78 .debounce_rep = 4,
79 .debounce_tol = 5,
80
81 .keep_vref_on = true,
82 .settle_delay_usecs = 500,
83 .penirq_recheck_delay_usecs = 100,
84 };
85
86 static struct spi_board_info __initdata spi1_board_info[] = {
87 {
88 /* ADS7843 touch controller */
89 .modalias = "ads7846",
90 .max_speed_hz = 2000000,
91 .chip_select = 0,
92 .bus_num = 1,
93 .platform_data = &ads7843_data,
94 },
95 };
96
97 static struct mci_platform_data __initdata mci0_data = {
98 .slot[0] = {
99 .bus_width = 4,
100 .detect_pin = -ENODEV,
101 .wp_pin = -ENODEV,
102 },
103 };
104
105 static struct fb_videomode __initdata lb104v03_modes[] = {
106 {
107 .name = "640x480 @ 50",
108 .refresh = 50,
109 .xres = 640, .yres = 480,
110 .pixclock = KHZ2PICOS(25100),
111
112 .left_margin = 90, .right_margin = 70,
113 .upper_margin = 30, .lower_margin = 15,
114 .hsync_len = 12, .vsync_len = 2,
115
116 .sync = 0,
117 .vmode = FB_VMODE_NONINTERLACED,
118 },
119 };
120
121 static struct fb_monspecs __initdata favr32_default_monspecs = {
122 .manufacturer = "LG",
123 .monitor = "LB104V03",
124 .modedb = lb104v03_modes,
125 .modedb_len = ARRAY_SIZE(lb104v03_modes),
126 .hfmin = 27273,
127 .hfmax = 31111,
128 .vfmin = 45,
129 .vfmax = 60,
130 .dclkmax = 28000000,
131 };
132
133 struct atmel_lcdfb_pdata __initdata favr32_lcdc_data = {
134 .default_bpp = 16,
135 .default_dmacon = ATMEL_LCDC_DMAEN | ATMEL_LCDC_DMA2DEN,
136 .default_lcdcon2 = (ATMEL_LCDC_DISTYPE_TFT
137 | ATMEL_LCDC_CLKMOD_ALWAYSACTIVE
138 | ATMEL_LCDC_MEMOR_BIG),
139 .default_monspecs = &favr32_default_monspecs,
140 .guard_time = 2,
141 };
142
143 static struct gpio_led favr32_leds[] = {
144 {
145 .name = "green",
146 .gpio = GPIO_PIN_PE(19),
147 .default_trigger = "heartbeat",
148 .active_low = 1,
149 },
150 {
151 .name = "red",
152 .gpio = GPIO_PIN_PE(20),
153 .active_low = 1,
154 },
155 };
156
157 static struct gpio_led_platform_data favr32_led_data = {
158 .num_leds = ARRAY_SIZE(favr32_leds),
159 .leds = favr32_leds,
160 };
161
162 static struct platform_device favr32_led_dev = {
163 .name = "leds-gpio",
164 .id = 0,
165 .dev = {
166 .platform_data = &favr32_led_data,
167 },
168 };
169
170 /*
171 * The next two functions should go away as the boot loader is
172 * supposed to initialize the macb address registers with a valid
173 * ethernet address. But we need to keep it around for a while until
174 * we can be reasonably sure the boot loader does this.
175 *
176 * The phy_id is ignored as the driver will probe for it.
177 */
parse_tag_ethernet(struct tag * tag)178 static int __init parse_tag_ethernet(struct tag *tag)
179 {
180 int i;
181
182 i = tag->u.ethernet.mac_index;
183 if (i < ARRAY_SIZE(hw_addr))
184 memcpy(hw_addr[i].addr, tag->u.ethernet.hw_address,
185 sizeof(hw_addr[i].addr));
186
187 return 0;
188 }
189 __tagtable(ATAG_ETHERNET, parse_tag_ethernet);
190
set_hw_addr(struct platform_device * pdev)191 static void __init set_hw_addr(struct platform_device *pdev)
192 {
193 struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
194 const u8 *addr;
195 void __iomem *regs;
196 struct clk *pclk;
197
198 if (!res)
199 return;
200 if (pdev->id >= ARRAY_SIZE(hw_addr))
201 return;
202
203 addr = hw_addr[pdev->id].addr;
204 if (!is_valid_ether_addr(addr))
205 return;
206
207 /*
208 * Since this is board-specific code, we'll cheat and use the
209 * physical address directly as we happen to know that it's
210 * the same as the virtual address.
211 */
212 regs = (void __iomem __force *)res->start;
213 pclk = clk_get(&pdev->dev, "pclk");
214 if (IS_ERR(pclk))
215 return;
216
217 clk_enable(pclk);
218 __raw_writel((addr[3] << 24) | (addr[2] << 16)
219 | (addr[1] << 8) | addr[0], regs + 0x98);
220 __raw_writel((addr[5] << 8) | addr[4], regs + 0x9c);
221 clk_disable(pclk);
222 clk_put(pclk);
223 }
224
favr32_setup_leds(void)225 void __init favr32_setup_leds(void)
226 {
227 unsigned i;
228
229 for (i = 0; i < ARRAY_SIZE(favr32_leds); i++)
230 at32_select_gpio(favr32_leds[i].gpio, AT32_GPIOF_OUTPUT);
231
232 platform_device_register(&favr32_led_dev);
233 }
234
235 static struct pwm_lookup pwm_lookup[] = {
236 PWM_LOOKUP("at91sam9rl-pwm", PWM_BL_CH, "pwm-backlight.0", NULL,
237 5000, PWM_POLARITY_INVERSED),
238 };
239
240 static struct regulator_consumer_supply fixed_power_consumers[] = {
241 REGULATOR_SUPPLY("power", "pwm-backlight.0"),
242 };
243
244 static struct platform_pwm_backlight_data pwm_bl_data = {
245 .enable_gpio = GPIO_PIN_PA(28),
246 .max_brightness = 255,
247 .dft_brightness = 255,
248 .lth_brightness = 50,
249 };
250
251 static struct platform_device pwm_bl_device = {
252 .name = "pwm-backlight",
253 .dev = {
254 .platform_data = &pwm_bl_data,
255 },
256 };
257
favr32_setup_atmel_pwm_bl(void)258 static void __init favr32_setup_atmel_pwm_bl(void)
259 {
260 pwm_add_table(pwm_lookup, ARRAY_SIZE(pwm_lookup));
261 regulator_register_always_on(0, "fixed", fixed_power_consumers,
262 ARRAY_SIZE(fixed_power_consumers), 3300000);
263 platform_device_register(&pwm_bl_device);
264 at32_select_gpio(pwm_bl_data.enable_gpio, 0);
265 }
266
setup_board(void)267 void __init setup_board(void)
268 {
269 at32_map_usart(3, 0, 0); /* USART 3 => /dev/ttyS0 */
270 at32_setup_serial_console(0);
271 }
272
set_abdac_rate(struct platform_device * pdev)273 static int __init set_abdac_rate(struct platform_device *pdev)
274 {
275 int retval;
276 struct clk *osc1;
277 struct clk *pll1;
278 struct clk *abdac;
279
280 if (pdev == NULL)
281 return -ENXIO;
282
283 osc1 = clk_get(NULL, "osc1");
284 if (IS_ERR(osc1)) {
285 retval = PTR_ERR(osc1);
286 goto out;
287 }
288
289 pll1 = clk_get(NULL, "pll1");
290 if (IS_ERR(pll1)) {
291 retval = PTR_ERR(pll1);
292 goto out_osc1;
293 }
294
295 abdac = clk_get(&pdev->dev, "sample_clk");
296 if (IS_ERR(abdac)) {
297 retval = PTR_ERR(abdac);
298 goto out_pll1;
299 }
300
301 retval = clk_set_parent(pll1, osc1);
302 if (retval != 0)
303 goto out_abdac;
304
305 /*
306 * Rate is 32000 to 50000 and ABDAC oversamples 256x. Multiply, in
307 * power of 2, to a value above 80 MHz. Power of 2 so it is possible
308 * for the generic clock to divide it down again and 80 MHz is the
309 * lowest frequency for the PLL.
310 */
311 retval = clk_round_rate(pll1,
312 CONFIG_BOARD_FAVR32_ABDAC_RATE * 256 * 16);
313 if (retval <= 0) {
314 retval = -EINVAL;
315 goto out_abdac;
316 }
317
318 retval = clk_set_rate(pll1, retval);
319 if (retval != 0)
320 goto out_abdac;
321
322 retval = clk_set_parent(abdac, pll1);
323 if (retval != 0)
324 goto out_abdac;
325
326 out_abdac:
327 clk_put(abdac);
328 out_pll1:
329 clk_put(pll1);
330 out_osc1:
331 clk_put(osc1);
332 out:
333 return retval;
334 }
335
favr32_init(void)336 static int __init favr32_init(void)
337 {
338 /*
339 * Favr-32 uses 32-bit SDRAM interface. Reserve the SDRAM-specific
340 * pins so that nobody messes with them.
341 */
342 at32_reserve_pin(GPIO_PIOE_BASE, ATMEL_EBI_PE_DATA_ALL);
343
344 at32_select_gpio(GPIO_PIN_PB(3), 0); /* IRQ from ADS7843 */
345
346 at32_add_device_usart(0);
347
348 set_hw_addr(at32_add_device_eth(0, ð_data[0]));
349
350 spi1_board_info[0].irq = gpio_to_irq(GPIO_PIN_PB(3));
351
352 set_abdac_rate(at32_add_device_abdac(0, &abdac0_data));
353
354 at32_add_device_pwm(1 << PWM_BL_CH);
355 at32_add_device_spi(1, spi1_board_info, ARRAY_SIZE(spi1_board_info));
356 at32_add_device_mci(0, &mci0_data);
357 at32_add_device_usba(0, NULL);
358 at32_add_device_lcdc(0, &favr32_lcdc_data, fbmem_start, fbmem_size, 0);
359
360 favr32_setup_leds();
361
362 favr32_setup_atmel_pwm_bl();
363
364 return 0;
365 }
366 postcore_initcall(favr32_init);
367