Searched defs:MDMA_S1_IRQ_STATUS (Results 1 - 7 of 7) sorted by relevance

/linux-4.1.27/arch/blackfin/mach-bf527/include/mach/
H A DdefBF522.h440 #define MDMA_S1_IRQ_STATUS 0xFFC00FE8 /* MemDMA Stream 1 Source Interrupt/Status Register */ macro
/linux-4.1.27/arch/blackfin/mach-bf533/include/mach/
H A DdefBF532.h323 #define MDMA_S1_IRQ_STATUS 0xFFC00EE8 /* MemDMA Stream 1 Source Interrupt/Status Register */ macro
/linux-4.1.27/arch/blackfin/mach-bf518/include/mach/
H A DdefBF512.h440 #define MDMA_S1_IRQ_STATUS 0xFFC00FE8 /* MemDMA Stream 1 Source Interrupt/Status Register */ macro
/linux-4.1.27/arch/blackfin/mach-bf537/include/mach/
H A DdefBF534.h416 #define MDMA_S1_IRQ_STATUS 0xFFC00FE8 /* MemDMA Stream 1 Source Interrupt/Status Register */ macro
/linux-4.1.27/arch/blackfin/mach-bf561/include/mach/
H A DdefBF561.h535 #define MDMA_S1_IRQ_STATUS 0xFFC01FE8 /*MemDMA1 Stream 1 Source Interrupt/Status */ macro
/linux-4.1.27/arch/blackfin/mach-bf538/include/mach/
H A DdefBF538.h361 #define MDMA_S1_IRQ_STATUS 0xFFC00EE8 /* MemDMA0 Stream 1 Source Interrupt/Status Register */ macro
/linux-4.1.27/arch/blackfin/mach-bf548/include/mach/
H A DdefBF54x_base.h450 #define MDMA_S1_IRQ_STATUS 0xffc00fe8 /* Memory DMA Stream 1 Source Interrupt/Status Register */ macro

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