1 /*
2  * Copyright (C) 2014 Samsung Electronics Co.Ltd
3  *
4  * This program is free software; you can redistribute it and/or modify
5  * it under the terms of the GNU General Public License version 2 as
6  * published by the Free Software Foundationr
7  */
8 
9 #ifndef EXYNOS_REGS_DECON_H
10 #define EXYNOS_REGS_DECON_H
11 
12 /* Exynos543X DECON */
13 #define DECON_VIDCON0			0x0000
14 #define DECON_VIDOUTCON0		0x0010
15 #define DECON_WINCONx(n)		(0x0020 + ((n) * 4))
16 #define DECON_VIDOSDxH(n)		(0x0080 + ((n) * 4))
17 #define DECON_SHADOWCON			0x00A0
18 #define DECON_VIDOSDxA(n)		(0x00B0 + ((n) * 0x20))
19 #define DECON_VIDOSDxB(n)		(0x00B4 + ((n) * 0x20))
20 #define DECON_VIDOSDxC(n)		(0x00B8 + ((n) * 0x20))
21 #define DECON_VIDOSDxD(n)		(0x00BC + ((n) * 0x20))
22 #define DECON_VIDOSDxE(n)		(0x00C0 + ((n) * 0x20))
23 #define DECON_VIDW0xADD0B0(n)		(0x0150 + ((n) * 0x10))
24 #define DECON_VIDW0xADD0B1(n)		(0x0154 + ((n) * 0x10))
25 #define DECON_VIDW0xADD0B2(n)		(0x0158 + ((n) * 0x10))
26 #define DECON_VIDW0xADD1B0(n)		(0x01A0 + ((n) * 0x10))
27 #define DECON_VIDW0xADD1B1(n)		(0x01A4 + ((n) * 0x10))
28 #define DECON_VIDW0xADD1B2(n)		(0x01A8 + ((n) * 0x10))
29 #define DECON_VIDW0xADD2(n)		(0x0200 + ((n) * 4))
30 #define DECON_LOCALxSIZE(n)		(0x0214 + ((n) * 4))
31 #define DECON_VIDINTCON0		0x0220
32 #define DECON_VIDINTCON1		0x0224
33 #define DECON_WxKEYCON0(n)		(0x0230 + ((n - 1) * 8))
34 #define DECON_WxKEYCON1(n)		(0x0234 + ((n - 1) * 8))
35 #define DECON_WxKEYALPHA(n)		(0x0250 + ((n - 1) * 4))
36 #define DECON_WINxMAP(n)		(0x0270 + ((n) * 4))
37 #define DECON_QOSLUT07_00		0x02C0
38 #define DECON_QOSLUT15_08		0x02C4
39 #define DECON_QOSCTRL			0x02C8
40 #define DECON_BLENDERQx(n)		(0x0300 + ((n - 1) * 4))
41 #define DECON_BLENDCON			0x0310
42 #define DECON_OPE_VIDW0xADD0(n)		(0x0400 + ((n) * 4))
43 #define DECON_OPE_VIDW0xADD1(n)		(0x0414 + ((n) * 4))
44 #define DECON_FRAMEFIFO_REG7		0x051C
45 #define DECON_FRAMEFIFO_REG8		0x0520
46 #define DECON_FRAMEFIFO_STATUS		0x0524
47 #define DECON_CMU			0x1404
48 #define DECON_UPDATE			0x1410
49 #define DECON_UPDATE_SCHEME		0x1438
50 #define DECON_VIDCON1			0x2000
51 #define DECON_VIDCON2			0x2004
52 #define DECON_VIDCON3			0x2008
53 #define DECON_VIDCON4			0x200C
54 #define DECON_VIDTCON2			0x2028
55 #define DECON_FRAME_SIZE		0x2038
56 #define DECON_LINECNT_OP_THRESHOLD	0x203C
57 #define DECON_TRIGCON			0x2040
58 #define DECON_TRIGSKIP			0x2050
59 #define DECON_CRCRDATA			0x20B0
60 #define DECON_CRCCTRL			0x20B4
61 
62 /* Exynos5430 DECON */
63 #define DECON_VIDTCON0			0x2020
64 #define DECON_VIDTCON1			0x2024
65 
66 /* Exynos5433 DECON */
67 #define DECON_VIDTCON00			0x2010
68 #define DECON_VIDTCON01			0x2014
69 #define DECON_VIDTCON10			0x2018
70 #define DECON_VIDTCON11			0x201C
71 
72 /* Exynos543X DECON Internal */
73 #define DECON_W013DSTREOCON		0x0320
74 #define DECON_W233DSTREOCON		0x0324
75 #define DECON_FRAMEFIFO_REG0		0x0500
76 #define DECON_ENHANCER_CTRL		0x2100
77 
78 /* Exynos543X DECON TV */
79 #define DECON_VCLKCON0			0x0014
80 #define DECON_VIDINTCON2		0x0228
81 #define DECON_VIDINTCON3		0x022C
82 
83 /* VIDCON0 */
84 #define VIDCON0_SWRESET			(1 << 28)
85 #define VIDCON0_CLKVALUP		(1 << 14)
86 #define VIDCON0_VLCKFREE		(1 << 5)
87 #define VIDCON0_STOP_STATUS		(1 << 2)
88 #define VIDCON0_ENVID			(1 << 1)
89 #define VIDCON0_ENVID_F			(1 << 0)
90 
91 /* VIDOUTCON0 */
92 #define VIDOUT_LCD_ON			(1 << 24)
93 #define VIDOUT_IF_F_MASK		(0x3 << 20)
94 #define VIDOUT_RGB_IF			(0x0 << 20)
95 #define VIDOUT_COMMAND_IF		(0x2 << 20)
96 
97 /* WINCONx */
98 #define WINCONx_HAWSWP_F		(1 << 16)
99 #define WINCONx_WSWP_F			(1 << 15)
100 #define WINCONx_BURSTLEN_MASK		(0x3 << 10)
101 #define WINCONx_BURSTLEN_16WORD		(0x0 << 10)
102 #define WINCONx_BURSTLEN_8WORD		(0x1 << 10)
103 #define WINCONx_BURSTLEN_4WORD		(0x2 << 10)
104 #define WINCONx_BLD_PIX_F		(1 << 6)
105 #define WINCONx_BPPMODE_MASK		(0xf << 2)
106 #define WINCONx_BPPMODE_16BPP_565	(0x5 << 2)
107 #define WINCONx_BPPMODE_16BPP_A1555	(0x6 << 2)
108 #define WINCONx_BPPMODE_16BPP_I1555	(0x7 << 2)
109 #define WINCONx_BPPMODE_24BPP_888	(0xb << 2)
110 #define WINCONx_BPPMODE_24BPP_A1887	(0xc << 2)
111 #define WINCONx_BPPMODE_25BPP_A1888	(0xd << 2)
112 #define WINCONx_BPPMODE_32BPP_A8888	(0xd << 2)
113 #define WINCONx_BPPMODE_16BPP_A4444	(0xe << 2)
114 #define WINCONx_ALPHA_SEL_F		(1 << 1)
115 #define WINCONx_ENWIN_F			(1 << 0)
116 
117 /* SHADOWCON */
118 #define SHADOWCON_Wx_PROTECT(n)		(1 << (10 + (n)))
119 
120 /* VIDOSDxD */
121 #define VIDOSD_Wx_ALPHA_R_F(n)		(((n) & 0xff) << 16)
122 #define VIDOSD_Wx_ALPHA_G_F(n)		(((n) & 0xff) << 8)
123 #define VIDOSD_Wx_ALPHA_B_F(n)		(((n) & 0xff) << 0)
124 
125 /* VIDINTCON0 */
126 #define VIDINTCON0_FRAMEDONE		(1 << 17)
127 #define VIDINTCON0_INTFRMEN		(1 << 12)
128 #define VIDINTCON0_INTEN		(1 << 0)
129 
130 /* VIDINTCON1 */
131 #define VIDINTCON1_INTFRMDONEPEND	(1 << 2)
132 #define VIDINTCON1_INTFRMPEND		(1 << 1)
133 #define VIDINTCON1_INTFIFOPEND		(1 << 0)
134 
135 /* DECON_CMU */
136 #define CMU_CLKGAGE_MODE_SFR_F		(1 << 1)
137 #define CMU_CLKGAGE_MODE_MEM_F		(1 << 0)
138 
139 /* DECON_UPDATE */
140 #define STANDALONE_UPDATE_F		(1 << 0)
141 
142 /* DECON_VIDCON1 */
143 #define VIDCON1_VCLK_MASK		(0x3 << 9)
144 #define VIDCON1_VCLK_RUN_VDEN_DISABLE	(0x3 << 9)
145 #define VIDCON1_VCLK_HOLD		(0x0 << 9)
146 #define VIDCON1_VCLK_RUN		(0x1 << 9)
147 
148 
149 /* DECON_VIDTCON00 */
150 #define VIDTCON00_VBPD_F(x)		(((x) & 0xfff) << 16)
151 #define VIDTCON00_VFPD_F(x)		((x) & 0xfff)
152 
153 /* DECON_VIDTCON01 */
154 #define VIDTCON01_VSPW_F(x)		(((x) & 0xfff) << 16)
155 
156 /* DECON_VIDTCON10 */
157 #define VIDTCON10_HBPD_F(x)		(((x) & 0xfff) << 16)
158 #define VIDTCON10_HFPD_F(x)		((x) & 0xfff)
159 
160 /* DECON_VIDTCON11 */
161 #define VIDTCON11_HSPW_F(x)		(((x) & 0xfff) << 16)
162 
163 /* DECON_VIDTCON2 */
164 #define VIDTCON2_LINEVAL(x)		(((x) & 0xfff) << 16)
165 #define VIDTCON2_HOZVAL(x)		((x) & 0xfff)
166 
167 /* TRIGCON */
168 #define TRIGCON_TRIGEN_PER_F		(1 << 31)
169 #define TRIGCON_TRIGEN_F		(1 << 30)
170 #define TRIGCON_TE_AUTO_MASK		(1 << 29)
171 #define TRIGCON_WB_SWTRIGCMD		(1 << 28)
172 #define TRIGCON_SWTRIGCMD_W4BUF		(1 << 26)
173 #define TRIGCON_TRIGMODE_W4BUF		(1 << 25)
174 #define TRIGCON_SWTRIGCMD_W3BUF		(1 << 21)
175 #define TRIGCON_TRIGMODE_W3BUF		(1 << 20)
176 #define TRIGCON_SWTRIGCMD_W2BUF		(1 << 16)
177 #define TRIGCON_TRIGMODE_W2BUF		(1 << 15)
178 #define TRIGCON_SWTRIGCMD_W1BUF		(1 << 11)
179 #define TRIGCON_TRIGMODE_W1BUF		(1 << 10)
180 #define TRIGCON_SWTRIGCMD_W0BUF		(1 << 6)
181 #define TRIGCON_TRIGMODE_W0BUF		(1 << 5)
182 #define TRIGCON_HWTRIGMASK_I80_RGB	(1 << 4)
183 #define TRIGCON_HWTRIGEN_I80_RGB	(1 << 3)
184 #define TRIGCON_HWTRIG_INV_I80_RGB	(1 << 2)
185 #define TRIGCON_SWTRIGCMD		(1 << 1)
186 #define TRIGCON_SWTRIGEN		(1 << 0)
187 
188 /* DECON_CRCCTRL */
189 #define CRCCTRL_CRCCLKEN		(0x1 << 2)
190 #define CRCCTRL_CRCSTART_F		(0x1 << 1)
191 #define CRCCTRL_CRCEN			(0x1 << 0)
192 #define CRCCTRL_MASK			(0x7)
193 
194 #endif /* EXYNOS_REGS_DECON_H */
195