1
2 /*
3 * Copyright 2003-2004 Red Hat, Inc. All rights reserved.
4 * Copyright 2003-2004 Jeff Garzik
5 *
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2, or (at your option)
10 * any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; see the file COPYING. If not, write to
19 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
20 *
21 *
22 * libata documentation is available via 'make {ps|pdf}docs',
23 * as Documentation/DocBook/libata.*
24 *
25 * Hardware documentation available from http://www.t13.org/
26 *
27 */
28
29 #ifndef __LINUX_ATA_H__
30 #define __LINUX_ATA_H__
31
32 #include <linux/kernel.h>
33 #include <linux/string.h>
34 #include <linux/types.h>
35 #include <asm/byteorder.h>
36
37 /* defines only for the constants which don't work well as enums */
38 #define ATA_DMA_BOUNDARY 0xffffUL
39 #define ATA_DMA_MASK 0xffffffffULL
40
41 enum {
42 /* various global constants */
43 ATA_MAX_DEVICES = 2, /* per bus/port */
44 ATA_MAX_PRD = 256, /* we could make these 256/256 */
45 ATA_SECT_SIZE = 512,
46 ATA_MAX_SECTORS_128 = 128,
47 ATA_MAX_SECTORS = 256,
48 ATA_MAX_SECTORS_1024 = 1024,
49 ATA_MAX_SECTORS_LBA48 = 65535,/* TODO: 65536? */
50 ATA_MAX_SECTORS_TAPE = 65535,
51
52 ATA_ID_WORDS = 256,
53 ATA_ID_CONFIG = 0,
54 ATA_ID_CYLS = 1,
55 ATA_ID_HEADS = 3,
56 ATA_ID_SECTORS = 6,
57 ATA_ID_SERNO = 10,
58 ATA_ID_BUF_SIZE = 21,
59 ATA_ID_FW_REV = 23,
60 ATA_ID_PROD = 27,
61 ATA_ID_MAX_MULTSECT = 47,
62 ATA_ID_DWORD_IO = 48,
63 ATA_ID_CAPABILITY = 49,
64 ATA_ID_OLD_PIO_MODES = 51,
65 ATA_ID_OLD_DMA_MODES = 52,
66 ATA_ID_FIELD_VALID = 53,
67 ATA_ID_CUR_CYLS = 54,
68 ATA_ID_CUR_HEADS = 55,
69 ATA_ID_CUR_SECTORS = 56,
70 ATA_ID_MULTSECT = 59,
71 ATA_ID_LBA_CAPACITY = 60,
72 ATA_ID_SWDMA_MODES = 62,
73 ATA_ID_MWDMA_MODES = 63,
74 ATA_ID_PIO_MODES = 64,
75 ATA_ID_EIDE_DMA_MIN = 65,
76 ATA_ID_EIDE_DMA_TIME = 66,
77 ATA_ID_EIDE_PIO = 67,
78 ATA_ID_EIDE_PIO_IORDY = 68,
79 ATA_ID_ADDITIONAL_SUPP = 69,
80 ATA_ID_QUEUE_DEPTH = 75,
81 ATA_ID_SATA_CAPABILITY = 76,
82 ATA_ID_SATA_CAPABILITY_2 = 77,
83 ATA_ID_FEATURE_SUPP = 78,
84 ATA_ID_MAJOR_VER = 80,
85 ATA_ID_COMMAND_SET_1 = 82,
86 ATA_ID_COMMAND_SET_2 = 83,
87 ATA_ID_CFSSE = 84,
88 ATA_ID_CFS_ENABLE_1 = 85,
89 ATA_ID_CFS_ENABLE_2 = 86,
90 ATA_ID_CSF_DEFAULT = 87,
91 ATA_ID_UDMA_MODES = 88,
92 ATA_ID_HW_CONFIG = 93,
93 ATA_ID_SPG = 98,
94 ATA_ID_LBA_CAPACITY_2 = 100,
95 ATA_ID_SECTOR_SIZE = 106,
96 ATA_ID_WWN = 108,
97 ATA_ID_LOGICAL_SECTOR_SIZE = 117, /* and 118 */
98 ATA_ID_COMMAND_SET_3 = 119,
99 ATA_ID_COMMAND_SET_4 = 120,
100 ATA_ID_LAST_LUN = 126,
101 ATA_ID_DLF = 128,
102 ATA_ID_CSFO = 129,
103 ATA_ID_CFA_POWER = 160,
104 ATA_ID_CFA_KEY_MGMT = 162,
105 ATA_ID_CFA_MODES = 163,
106 ATA_ID_DATA_SET_MGMT = 169,
107 ATA_ID_ROT_SPEED = 217,
108 ATA_ID_PIO4 = (1 << 1),
109
110 ATA_ID_SERNO_LEN = 20,
111 ATA_ID_FW_REV_LEN = 8,
112 ATA_ID_PROD_LEN = 40,
113 ATA_ID_WWN_LEN = 8,
114
115 ATA_PCI_CTL_OFS = 2,
116
117 ATA_PIO0 = (1 << 0),
118 ATA_PIO1 = ATA_PIO0 | (1 << 1),
119 ATA_PIO2 = ATA_PIO1 | (1 << 2),
120 ATA_PIO3 = ATA_PIO2 | (1 << 3),
121 ATA_PIO4 = ATA_PIO3 | (1 << 4),
122 ATA_PIO5 = ATA_PIO4 | (1 << 5),
123 ATA_PIO6 = ATA_PIO5 | (1 << 6),
124
125 ATA_PIO4_ONLY = (1 << 4),
126
127 ATA_SWDMA0 = (1 << 0),
128 ATA_SWDMA1 = ATA_SWDMA0 | (1 << 1),
129 ATA_SWDMA2 = ATA_SWDMA1 | (1 << 2),
130
131 ATA_SWDMA2_ONLY = (1 << 2),
132
133 ATA_MWDMA0 = (1 << 0),
134 ATA_MWDMA1 = ATA_MWDMA0 | (1 << 1),
135 ATA_MWDMA2 = ATA_MWDMA1 | (1 << 2),
136 ATA_MWDMA3 = ATA_MWDMA2 | (1 << 3),
137 ATA_MWDMA4 = ATA_MWDMA3 | (1 << 4),
138
139 ATA_MWDMA12_ONLY = (1 << 1) | (1 << 2),
140 ATA_MWDMA2_ONLY = (1 << 2),
141
142 ATA_UDMA0 = (1 << 0),
143 ATA_UDMA1 = ATA_UDMA0 | (1 << 1),
144 ATA_UDMA2 = ATA_UDMA1 | (1 << 2),
145 ATA_UDMA3 = ATA_UDMA2 | (1 << 3),
146 ATA_UDMA4 = ATA_UDMA3 | (1 << 4),
147 ATA_UDMA5 = ATA_UDMA4 | (1 << 5),
148 ATA_UDMA6 = ATA_UDMA5 | (1 << 6),
149 ATA_UDMA7 = ATA_UDMA6 | (1 << 7),
150 /* ATA_UDMA7 is just for completeness... doesn't exist (yet?). */
151
152 ATA_UDMA24_ONLY = (1 << 2) | (1 << 4),
153
154 ATA_UDMA_MASK_40C = ATA_UDMA2, /* udma0-2 */
155
156 /* DMA-related */
157 ATA_PRD_SZ = 8,
158 ATA_PRD_TBL_SZ = (ATA_MAX_PRD * ATA_PRD_SZ),
159 ATA_PRD_EOT = (1 << 31), /* end-of-table flag */
160
161 ATA_DMA_TABLE_OFS = 4,
162 ATA_DMA_STATUS = 2,
163 ATA_DMA_CMD = 0,
164 ATA_DMA_WR = (1 << 3),
165 ATA_DMA_START = (1 << 0),
166 ATA_DMA_INTR = (1 << 2),
167 ATA_DMA_ERR = (1 << 1),
168 ATA_DMA_ACTIVE = (1 << 0),
169
170 /* bits in ATA command block registers */
171 ATA_HOB = (1 << 7), /* LBA48 selector */
172 ATA_NIEN = (1 << 1), /* disable-irq flag */
173 ATA_LBA = (1 << 6), /* LBA28 selector */
174 ATA_DEV1 = (1 << 4), /* Select Device 1 (slave) */
175 ATA_DEVICE_OBS = (1 << 7) | (1 << 5), /* obs bits in dev reg */
176 ATA_DEVCTL_OBS = (1 << 3), /* obsolete bit in devctl reg */
177 ATA_BUSY = (1 << 7), /* BSY status bit */
178 ATA_DRDY = (1 << 6), /* device ready */
179 ATA_DF = (1 << 5), /* device fault */
180 ATA_DSC = (1 << 4), /* drive seek complete */
181 ATA_DRQ = (1 << 3), /* data request i/o */
182 ATA_CORR = (1 << 2), /* corrected data error */
183 ATA_SENSE = (1 << 1), /* sense code available */
184 ATA_ERR = (1 << 0), /* have an error */
185 ATA_SRST = (1 << 2), /* software reset */
186 ATA_ICRC = (1 << 7), /* interface CRC error */
187 ATA_BBK = ATA_ICRC, /* pre-EIDE: block marked bad */
188 ATA_UNC = (1 << 6), /* uncorrectable media error */
189 ATA_MC = (1 << 5), /* media changed */
190 ATA_IDNF = (1 << 4), /* ID not found */
191 ATA_MCR = (1 << 3), /* media change requested */
192 ATA_ABORTED = (1 << 2), /* command aborted */
193 ATA_TRK0NF = (1 << 1), /* track 0 not found */
194 ATA_AMNF = (1 << 0), /* address mark not found */
195 ATAPI_LFS = 0xF0, /* last failed sense */
196 ATAPI_EOM = ATA_TRK0NF, /* end of media */
197 ATAPI_ILI = ATA_AMNF, /* illegal length indication */
198 ATAPI_IO = (1 << 1),
199 ATAPI_COD = (1 << 0),
200
201 /* ATA command block registers */
202 ATA_REG_DATA = 0x00,
203 ATA_REG_ERR = 0x01,
204 ATA_REG_NSECT = 0x02,
205 ATA_REG_LBAL = 0x03,
206 ATA_REG_LBAM = 0x04,
207 ATA_REG_LBAH = 0x05,
208 ATA_REG_DEVICE = 0x06,
209 ATA_REG_STATUS = 0x07,
210
211 ATA_REG_FEATURE = ATA_REG_ERR, /* and their aliases */
212 ATA_REG_CMD = ATA_REG_STATUS,
213 ATA_REG_BYTEL = ATA_REG_LBAM,
214 ATA_REG_BYTEH = ATA_REG_LBAH,
215 ATA_REG_DEVSEL = ATA_REG_DEVICE,
216 ATA_REG_IRQ = ATA_REG_NSECT,
217
218 /* ATA device commands */
219 ATA_CMD_DEV_RESET = 0x08, /* ATAPI device reset */
220 ATA_CMD_CHK_POWER = 0xE5, /* check power mode */
221 ATA_CMD_STANDBY = 0xE2, /* place in standby power mode */
222 ATA_CMD_IDLE = 0xE3, /* place in idle power mode */
223 ATA_CMD_EDD = 0x90, /* execute device diagnostic */
224 ATA_CMD_DOWNLOAD_MICRO = 0x92,
225 ATA_CMD_DOWNLOAD_MICRO_DMA = 0x93,
226 ATA_CMD_NOP = 0x00,
227 ATA_CMD_FLUSH = 0xE7,
228 ATA_CMD_FLUSH_EXT = 0xEA,
229 ATA_CMD_ID_ATA = 0xEC,
230 ATA_CMD_ID_ATAPI = 0xA1,
231 ATA_CMD_SERVICE = 0xA2,
232 ATA_CMD_READ = 0xC8,
233 ATA_CMD_READ_EXT = 0x25,
234 ATA_CMD_READ_QUEUED = 0x26,
235 ATA_CMD_READ_STREAM_EXT = 0x2B,
236 ATA_CMD_READ_STREAM_DMA_EXT = 0x2A,
237 ATA_CMD_WRITE = 0xCA,
238 ATA_CMD_WRITE_EXT = 0x35,
239 ATA_CMD_WRITE_QUEUED = 0x36,
240 ATA_CMD_WRITE_STREAM_EXT = 0x3B,
241 ATA_CMD_WRITE_STREAM_DMA_EXT = 0x3A,
242 ATA_CMD_WRITE_FUA_EXT = 0x3D,
243 ATA_CMD_WRITE_QUEUED_FUA_EXT = 0x3E,
244 ATA_CMD_FPDMA_READ = 0x60,
245 ATA_CMD_FPDMA_WRITE = 0x61,
246 ATA_CMD_FPDMA_SEND = 0x64,
247 ATA_CMD_FPDMA_RECV = 0x65,
248 ATA_CMD_PIO_READ = 0x20,
249 ATA_CMD_PIO_READ_EXT = 0x24,
250 ATA_CMD_PIO_WRITE = 0x30,
251 ATA_CMD_PIO_WRITE_EXT = 0x34,
252 ATA_CMD_READ_MULTI = 0xC4,
253 ATA_CMD_READ_MULTI_EXT = 0x29,
254 ATA_CMD_WRITE_MULTI = 0xC5,
255 ATA_CMD_WRITE_MULTI_EXT = 0x39,
256 ATA_CMD_WRITE_MULTI_FUA_EXT = 0xCE,
257 ATA_CMD_SET_FEATURES = 0xEF,
258 ATA_CMD_SET_MULTI = 0xC6,
259 ATA_CMD_PACKET = 0xA0,
260 ATA_CMD_VERIFY = 0x40,
261 ATA_CMD_VERIFY_EXT = 0x42,
262 ATA_CMD_WRITE_UNCORR_EXT = 0x45,
263 ATA_CMD_STANDBYNOW1 = 0xE0,
264 ATA_CMD_IDLEIMMEDIATE = 0xE1,
265 ATA_CMD_SLEEP = 0xE6,
266 ATA_CMD_INIT_DEV_PARAMS = 0x91,
267 ATA_CMD_READ_NATIVE_MAX = 0xF8,
268 ATA_CMD_READ_NATIVE_MAX_EXT = 0x27,
269 ATA_CMD_SET_MAX = 0xF9,
270 ATA_CMD_SET_MAX_EXT = 0x37,
271 ATA_CMD_READ_LOG_EXT = 0x2F,
272 ATA_CMD_WRITE_LOG_EXT = 0x3F,
273 ATA_CMD_READ_LOG_DMA_EXT = 0x47,
274 ATA_CMD_WRITE_LOG_DMA_EXT = 0x57,
275 ATA_CMD_TRUSTED_NONDATA = 0x5B,
276 ATA_CMD_TRUSTED_RCV = 0x5C,
277 ATA_CMD_TRUSTED_RCV_DMA = 0x5D,
278 ATA_CMD_TRUSTED_SND = 0x5E,
279 ATA_CMD_TRUSTED_SND_DMA = 0x5F,
280 ATA_CMD_PMP_READ = 0xE4,
281 ATA_CMD_PMP_READ_DMA = 0xE9,
282 ATA_CMD_PMP_WRITE = 0xE8,
283 ATA_CMD_PMP_WRITE_DMA = 0xEB,
284 ATA_CMD_CONF_OVERLAY = 0xB1,
285 ATA_CMD_SEC_SET_PASS = 0xF1,
286 ATA_CMD_SEC_UNLOCK = 0xF2,
287 ATA_CMD_SEC_ERASE_PREP = 0xF3,
288 ATA_CMD_SEC_ERASE_UNIT = 0xF4,
289 ATA_CMD_SEC_FREEZE_LOCK = 0xF5,
290 ATA_CMD_SEC_DISABLE_PASS = 0xF6,
291 ATA_CMD_CONFIG_STREAM = 0x51,
292 ATA_CMD_SMART = 0xB0,
293 ATA_CMD_MEDIA_LOCK = 0xDE,
294 ATA_CMD_MEDIA_UNLOCK = 0xDF,
295 ATA_CMD_DSM = 0x06,
296 ATA_CMD_CHK_MED_CRD_TYP = 0xD1,
297 ATA_CMD_CFA_REQ_EXT_ERR = 0x03,
298 ATA_CMD_CFA_WRITE_NE = 0x38,
299 ATA_CMD_CFA_TRANS_SECT = 0x87,
300 ATA_CMD_CFA_ERASE = 0xC0,
301 ATA_CMD_CFA_WRITE_MULT_NE = 0xCD,
302 ATA_CMD_REQ_SENSE_DATA = 0x0B,
303 ATA_CMD_SANITIZE_DEVICE = 0xB4,
304
305 /* marked obsolete in the ATA/ATAPI-7 spec */
306 ATA_CMD_RESTORE = 0x10,
307
308 /* Subcmds for ATA_CMD_FPDMA_SEND */
309 ATA_SUBCMD_FPDMA_SEND_DSM = 0x00,
310 ATA_SUBCMD_FPDMA_SEND_WR_LOG_DMA_EXT = 0x02,
311
312 /* READ_LOG_EXT pages */
313 ATA_LOG_SATA_NCQ = 0x10,
314 ATA_LOG_NCQ_SEND_RECV = 0x13,
315 ATA_LOG_SATA_ID_DEV_DATA = 0x30,
316 ATA_LOG_SATA_SETTINGS = 0x08,
317 ATA_LOG_DEVSLP_OFFSET = 0x30,
318 ATA_LOG_DEVSLP_SIZE = 0x08,
319 ATA_LOG_DEVSLP_MDAT = 0x00,
320 ATA_LOG_DEVSLP_MDAT_MASK = 0x1F,
321 ATA_LOG_DEVSLP_DETO = 0x01,
322 ATA_LOG_DEVSLP_VALID = 0x07,
323 ATA_LOG_DEVSLP_VALID_MASK = 0x80,
324
325 /* NCQ send and receive log */
326 ATA_LOG_NCQ_SEND_RECV_SUBCMDS_OFFSET = 0x00,
327 ATA_LOG_NCQ_SEND_RECV_SUBCMDS_DSM = (1 << 0),
328 ATA_LOG_NCQ_SEND_RECV_DSM_OFFSET = 0x04,
329 ATA_LOG_NCQ_SEND_RECV_DSM_TRIM = (1 << 0),
330 ATA_LOG_NCQ_SEND_RECV_RD_LOG_OFFSET = 0x08,
331 ATA_LOG_NCQ_SEND_RECV_WR_LOG_OFFSET = 0x0C,
332 ATA_LOG_NCQ_SEND_RECV_SIZE = 0x10,
333
334 /* READ/WRITE LONG (obsolete) */
335 ATA_CMD_READ_LONG = 0x22,
336 ATA_CMD_READ_LONG_ONCE = 0x23,
337 ATA_CMD_WRITE_LONG = 0x32,
338 ATA_CMD_WRITE_LONG_ONCE = 0x33,
339
340 /* SETFEATURES stuff */
341 SETFEATURES_XFER = 0x03,
342 XFER_UDMA_7 = 0x47,
343 XFER_UDMA_6 = 0x46,
344 XFER_UDMA_5 = 0x45,
345 XFER_UDMA_4 = 0x44,
346 XFER_UDMA_3 = 0x43,
347 XFER_UDMA_2 = 0x42,
348 XFER_UDMA_1 = 0x41,
349 XFER_UDMA_0 = 0x40,
350 XFER_MW_DMA_4 = 0x24, /* CFA only */
351 XFER_MW_DMA_3 = 0x23, /* CFA only */
352 XFER_MW_DMA_2 = 0x22,
353 XFER_MW_DMA_1 = 0x21,
354 XFER_MW_DMA_0 = 0x20,
355 XFER_SW_DMA_2 = 0x12,
356 XFER_SW_DMA_1 = 0x11,
357 XFER_SW_DMA_0 = 0x10,
358 XFER_PIO_6 = 0x0E, /* CFA only */
359 XFER_PIO_5 = 0x0D, /* CFA only */
360 XFER_PIO_4 = 0x0C,
361 XFER_PIO_3 = 0x0B,
362 XFER_PIO_2 = 0x0A,
363 XFER_PIO_1 = 0x09,
364 XFER_PIO_0 = 0x08,
365 XFER_PIO_SLOW = 0x00,
366
367 SETFEATURES_WC_ON = 0x02, /* Enable write cache */
368 SETFEATURES_WC_OFF = 0x82, /* Disable write cache */
369
370 /* Enable/Disable Automatic Acoustic Management */
371 SETFEATURES_AAM_ON = 0x42,
372 SETFEATURES_AAM_OFF = 0xC2,
373
374 SETFEATURES_SPINUP = 0x07, /* Spin-up drive */
375
376 SETFEATURES_SATA_ENABLE = 0x10, /* Enable use of SATA feature */
377 SETFEATURES_SATA_DISABLE = 0x90, /* Disable use of SATA feature */
378
379 /* SETFEATURE Sector counts for SATA features */
380 SATA_FPDMA_OFFSET = 0x01, /* FPDMA non-zero buffer offsets */
381 SATA_FPDMA_AA = 0x02, /* FPDMA Setup FIS Auto-Activate */
382 SATA_DIPM = 0x03, /* Device Initiated Power Management */
383 SATA_FPDMA_IN_ORDER = 0x04, /* FPDMA in-order data delivery */
384 SATA_AN = 0x05, /* Asynchronous Notification */
385 SATA_SSP = 0x06, /* Software Settings Preservation */
386 SATA_DEVSLP = 0x09, /* Device Sleep */
387
388 /* feature values for SET_MAX */
389 ATA_SET_MAX_ADDR = 0x00,
390 ATA_SET_MAX_PASSWD = 0x01,
391 ATA_SET_MAX_LOCK = 0x02,
392 ATA_SET_MAX_UNLOCK = 0x03,
393 ATA_SET_MAX_FREEZE_LOCK = 0x04,
394
395 /* feature values for DEVICE CONFIGURATION OVERLAY */
396 ATA_DCO_RESTORE = 0xC0,
397 ATA_DCO_FREEZE_LOCK = 0xC1,
398 ATA_DCO_IDENTIFY = 0xC2,
399 ATA_DCO_SET = 0xC3,
400
401 /* feature values for SMART */
402 ATA_SMART_ENABLE = 0xD8,
403 ATA_SMART_READ_VALUES = 0xD0,
404 ATA_SMART_READ_THRESHOLDS = 0xD1,
405
406 /* feature values for Data Set Management */
407 ATA_DSM_TRIM = 0x01,
408
409 /* password used in LBA Mid / LBA High for executing SMART commands */
410 ATA_SMART_LBAM_PASS = 0x4F,
411 ATA_SMART_LBAH_PASS = 0xC2,
412
413 /* ATAPI stuff */
414 ATAPI_PKT_DMA = (1 << 0),
415 ATAPI_DMADIR = (1 << 2), /* ATAPI data dir:
416 0=to device, 1=to host */
417 ATAPI_CDB_LEN = 16,
418
419 /* PMP stuff */
420 SATA_PMP_MAX_PORTS = 15,
421 SATA_PMP_CTRL_PORT = 15,
422
423 SATA_PMP_GSCR_DWORDS = 128,
424 SATA_PMP_GSCR_PROD_ID = 0,
425 SATA_PMP_GSCR_REV = 1,
426 SATA_PMP_GSCR_PORT_INFO = 2,
427 SATA_PMP_GSCR_ERROR = 32,
428 SATA_PMP_GSCR_ERROR_EN = 33,
429 SATA_PMP_GSCR_FEAT = 64,
430 SATA_PMP_GSCR_FEAT_EN = 96,
431
432 SATA_PMP_PSCR_STATUS = 0,
433 SATA_PMP_PSCR_ERROR = 1,
434 SATA_PMP_PSCR_CONTROL = 2,
435
436 SATA_PMP_FEAT_BIST = (1 << 0),
437 SATA_PMP_FEAT_PMREQ = (1 << 1),
438 SATA_PMP_FEAT_DYNSSC = (1 << 2),
439 SATA_PMP_FEAT_NOTIFY = (1 << 3),
440
441 /* cable types */
442 ATA_CBL_NONE = 0,
443 ATA_CBL_PATA40 = 1,
444 ATA_CBL_PATA80 = 2,
445 ATA_CBL_PATA40_SHORT = 3, /* 40 wire cable to high UDMA spec */
446 ATA_CBL_PATA_UNK = 4, /* don't know, maybe 80c? */
447 ATA_CBL_PATA_IGN = 5, /* don't know, ignore cable handling */
448 ATA_CBL_SATA = 6,
449
450 /* SATA Status and Control Registers */
451 SCR_STATUS = 0,
452 SCR_ERROR = 1,
453 SCR_CONTROL = 2,
454 SCR_ACTIVE = 3,
455 SCR_NOTIFICATION = 4,
456
457 /* SError bits */
458 SERR_DATA_RECOVERED = (1 << 0), /* recovered data error */
459 SERR_COMM_RECOVERED = (1 << 1), /* recovered comm failure */
460 SERR_DATA = (1 << 8), /* unrecovered data error */
461 SERR_PERSISTENT = (1 << 9), /* persistent data/comm error */
462 SERR_PROTOCOL = (1 << 10), /* protocol violation */
463 SERR_INTERNAL = (1 << 11), /* host internal error */
464 SERR_PHYRDY_CHG = (1 << 16), /* PHY RDY changed */
465 SERR_PHY_INT_ERR = (1 << 17), /* PHY internal error */
466 SERR_COMM_WAKE = (1 << 18), /* Comm wake */
467 SERR_10B_8B_ERR = (1 << 19), /* 10b to 8b decode error */
468 SERR_DISPARITY = (1 << 20), /* Disparity */
469 SERR_CRC = (1 << 21), /* CRC error */
470 SERR_HANDSHAKE = (1 << 22), /* Handshake error */
471 SERR_LINK_SEQ_ERR = (1 << 23), /* Link sequence error */
472 SERR_TRANS_ST_ERROR = (1 << 24), /* Transport state trans. error */
473 SERR_UNRECOG_FIS = (1 << 25), /* Unrecognized FIS */
474 SERR_DEV_XCHG = (1 << 26), /* device exchanged */
475 };
476
477 enum ata_tf_protocols {
478 /* ATA taskfile protocols */
479 ATA_PROT_UNKNOWN, /* unknown/invalid */
480 ATA_PROT_NODATA, /* no data */
481 ATA_PROT_PIO, /* PIO data xfer */
482 ATA_PROT_DMA, /* DMA */
483 ATA_PROT_NCQ, /* NCQ */
484 ATAPI_PROT_NODATA, /* packet command, no data */
485 ATAPI_PROT_PIO, /* packet command, PIO data xfer*/
486 ATAPI_PROT_DMA, /* packet command with special DMA sauce */
487 };
488
489 enum ata_ioctls {
490 ATA_IOC_GET_IO32 = 0x309, /* HDIO_GET_32BIT */
491 ATA_IOC_SET_IO32 = 0x324, /* HDIO_SET_32BIT */
492 };
493
494 /* core structures */
495
496 struct ata_bmdma_prd {
497 __le32 addr;
498 __le32 flags_len;
499 };
500
501 /*
502 * id tests
503 */
504 #define ata_id_is_ata(id) (((id)[ATA_ID_CONFIG] & (1 << 15)) == 0)
505 #define ata_id_has_lba(id) ((id)[ATA_ID_CAPABILITY] & (1 << 9))
506 #define ata_id_has_dma(id) ((id)[ATA_ID_CAPABILITY] & (1 << 8))
507 #define ata_id_has_ncq(id) ((id)[ATA_ID_SATA_CAPABILITY] & (1 << 8))
508 #define ata_id_queue_depth(id) (((id)[ATA_ID_QUEUE_DEPTH] & 0x1f) + 1)
509 #define ata_id_removable(id) ((id)[ATA_ID_CONFIG] & (1 << 7))
510 #define ata_id_has_atapi_AN(id) \
511 ((((id)[ATA_ID_SATA_CAPABILITY] != 0x0000) && \
512 ((id)[ATA_ID_SATA_CAPABILITY] != 0xffff)) && \
513 ((id)[ATA_ID_FEATURE_SUPP] & (1 << 5)))
514 #define ata_id_has_fpdma_aa(id) \
515 ((((id)[ATA_ID_SATA_CAPABILITY] != 0x0000) && \
516 ((id)[ATA_ID_SATA_CAPABILITY] != 0xffff)) && \
517 ((id)[ATA_ID_FEATURE_SUPP] & (1 << 2)))
518 #define ata_id_iordy_disable(id) ((id)[ATA_ID_CAPABILITY] & (1 << 10))
519 #define ata_id_has_iordy(id) ((id)[ATA_ID_CAPABILITY] & (1 << 11))
520 #define ata_id_u32(id,n) \
521 (((u32) (id)[(n) + 1] << 16) | ((u32) (id)[(n)]))
522 #define ata_id_u64(id,n) \
523 ( ((u64) (id)[(n) + 3] << 48) | \
524 ((u64) (id)[(n) + 2] << 32) | \
525 ((u64) (id)[(n) + 1] << 16) | \
526 ((u64) (id)[(n) + 0]) )
527
528 #define ata_id_cdb_intr(id) (((id)[ATA_ID_CONFIG] & 0x60) == 0x20)
529 #define ata_id_has_da(id) ((id)[ATA_ID_SATA_CAPABILITY_2] & (1 << 4))
530 #define ata_id_has_devslp(id) ((id)[ATA_ID_FEATURE_SUPP] & (1 << 8))
531
ata_id_has_hipm(const u16 * id)532 static inline bool ata_id_has_hipm(const u16 *id)
533 {
534 u16 val = id[ATA_ID_SATA_CAPABILITY];
535
536 if (val == 0 || val == 0xffff)
537 return false;
538
539 return val & (1 << 9);
540 }
541
ata_id_has_dipm(const u16 * id)542 static inline bool ata_id_has_dipm(const u16 *id)
543 {
544 u16 val = id[ATA_ID_FEATURE_SUPP];
545
546 if (val == 0 || val == 0xffff)
547 return false;
548
549 return val & (1 << 3);
550 }
551
552
ata_id_has_fua(const u16 * id)553 static inline bool ata_id_has_fua(const u16 *id)
554 {
555 if ((id[ATA_ID_CFSSE] & 0xC000) != 0x4000)
556 return false;
557 return id[ATA_ID_CFSSE] & (1 << 6);
558 }
559
ata_id_has_flush(const u16 * id)560 static inline bool ata_id_has_flush(const u16 *id)
561 {
562 if ((id[ATA_ID_COMMAND_SET_2] & 0xC000) != 0x4000)
563 return false;
564 return id[ATA_ID_COMMAND_SET_2] & (1 << 12);
565 }
566
ata_id_flush_enabled(const u16 * id)567 static inline bool ata_id_flush_enabled(const u16 *id)
568 {
569 if (ata_id_has_flush(id) == 0)
570 return false;
571 if ((id[ATA_ID_CSF_DEFAULT] & 0xC000) != 0x4000)
572 return false;
573 return id[ATA_ID_CFS_ENABLE_2] & (1 << 12);
574 }
575
ata_id_has_flush_ext(const u16 * id)576 static inline bool ata_id_has_flush_ext(const u16 *id)
577 {
578 if ((id[ATA_ID_COMMAND_SET_2] & 0xC000) != 0x4000)
579 return false;
580 return id[ATA_ID_COMMAND_SET_2] & (1 << 13);
581 }
582
ata_id_flush_ext_enabled(const u16 * id)583 static inline bool ata_id_flush_ext_enabled(const u16 *id)
584 {
585 if (ata_id_has_flush_ext(id) == 0)
586 return false;
587 if ((id[ATA_ID_CSF_DEFAULT] & 0xC000) != 0x4000)
588 return false;
589 /*
590 * some Maxtor disks have bit 13 defined incorrectly
591 * so check bit 10 too
592 */
593 return (id[ATA_ID_CFS_ENABLE_2] & 0x2400) == 0x2400;
594 }
595
ata_id_logical_sector_size(const u16 * id)596 static inline u32 ata_id_logical_sector_size(const u16 *id)
597 {
598 /* T13/1699-D Revision 6a, Sep 6, 2008. Page 128.
599 * IDENTIFY DEVICE data, word 117-118.
600 * 0xd000 ignores bit 13 (logical:physical > 1)
601 */
602 if ((id[ATA_ID_SECTOR_SIZE] & 0xd000) == 0x5000)
603 return (((id[ATA_ID_LOGICAL_SECTOR_SIZE+1] << 16)
604 + id[ATA_ID_LOGICAL_SECTOR_SIZE]) * sizeof(u16)) ;
605 return ATA_SECT_SIZE;
606 }
607
ata_id_log2_per_physical_sector(const u16 * id)608 static inline u8 ata_id_log2_per_physical_sector(const u16 *id)
609 {
610 /* T13/1699-D Revision 6a, Sep 6, 2008. Page 128.
611 * IDENTIFY DEVICE data, word 106.
612 * 0xe000 ignores bit 12 (logical sector > 512 bytes)
613 */
614 if ((id[ATA_ID_SECTOR_SIZE] & 0xe000) == 0x6000)
615 return (id[ATA_ID_SECTOR_SIZE] & 0xf);
616 return 0;
617 }
618
619 /* Offset of logical sectors relative to physical sectors.
620 *
621 * If device has more than one logical sector per physical sector
622 * (aka 512 byte emulation), vendors might offset the "sector 0" address
623 * so sector 63 is "naturally aligned" - e.g. FAT partition table.
624 * This avoids Read/Mod/Write penalties when using FAT partition table
625 * and updating "well aligned" (FS perspective) physical sectors on every
626 * transaction.
627 */
ata_id_logical_sector_offset(const u16 * id,u8 log2_per_phys)628 static inline u16 ata_id_logical_sector_offset(const u16 *id,
629 u8 log2_per_phys)
630 {
631 u16 word_209 = id[209];
632
633 if ((log2_per_phys > 1) && (word_209 & 0xc000) == 0x4000) {
634 u16 first = word_209 & 0x3fff;
635 if (first > 0)
636 return (1 << log2_per_phys) - first;
637 }
638 return 0;
639 }
640
ata_id_has_lba48(const u16 * id)641 static inline bool ata_id_has_lba48(const u16 *id)
642 {
643 if ((id[ATA_ID_COMMAND_SET_2] & 0xC000) != 0x4000)
644 return false;
645 if (!ata_id_u64(id, ATA_ID_LBA_CAPACITY_2))
646 return false;
647 return id[ATA_ID_COMMAND_SET_2] & (1 << 10);
648 }
649
ata_id_lba48_enabled(const u16 * id)650 static inline bool ata_id_lba48_enabled(const u16 *id)
651 {
652 if (ata_id_has_lba48(id) == 0)
653 return false;
654 if ((id[ATA_ID_CSF_DEFAULT] & 0xC000) != 0x4000)
655 return false;
656 return id[ATA_ID_CFS_ENABLE_2] & (1 << 10);
657 }
658
ata_id_hpa_enabled(const u16 * id)659 static inline bool ata_id_hpa_enabled(const u16 *id)
660 {
661 /* Yes children, word 83 valid bits cover word 82 data */
662 if ((id[ATA_ID_COMMAND_SET_2] & 0xC000) != 0x4000)
663 return false;
664 /* And 87 covers 85-87 */
665 if ((id[ATA_ID_CSF_DEFAULT] & 0xC000) != 0x4000)
666 return false;
667 /* Check command sets enabled as well as supported */
668 if ((id[ATA_ID_CFS_ENABLE_1] & (1 << 10)) == 0)
669 return false;
670 return id[ATA_ID_COMMAND_SET_1] & (1 << 10);
671 }
672
ata_id_has_wcache(const u16 * id)673 static inline bool ata_id_has_wcache(const u16 *id)
674 {
675 /* Yes children, word 83 valid bits cover word 82 data */
676 if ((id[ATA_ID_COMMAND_SET_2] & 0xC000) != 0x4000)
677 return false;
678 return id[ATA_ID_COMMAND_SET_1] & (1 << 5);
679 }
680
ata_id_has_pm(const u16 * id)681 static inline bool ata_id_has_pm(const u16 *id)
682 {
683 if ((id[ATA_ID_COMMAND_SET_2] & 0xC000) != 0x4000)
684 return false;
685 return id[ATA_ID_COMMAND_SET_1] & (1 << 3);
686 }
687
ata_id_rahead_enabled(const u16 * id)688 static inline bool ata_id_rahead_enabled(const u16 *id)
689 {
690 if ((id[ATA_ID_CSF_DEFAULT] & 0xC000) != 0x4000)
691 return false;
692 return id[ATA_ID_CFS_ENABLE_1] & (1 << 6);
693 }
694
ata_id_wcache_enabled(const u16 * id)695 static inline bool ata_id_wcache_enabled(const u16 *id)
696 {
697 if ((id[ATA_ID_CSF_DEFAULT] & 0xC000) != 0x4000)
698 return false;
699 return id[ATA_ID_CFS_ENABLE_1] & (1 << 5);
700 }
701
ata_id_has_read_log_dma_ext(const u16 * id)702 static inline bool ata_id_has_read_log_dma_ext(const u16 *id)
703 {
704 if (!(id[ATA_ID_CFS_ENABLE_2] & (1 << 15)))
705 return false;
706 return id[ATA_ID_COMMAND_SET_3] & (1 << 3);
707 }
708
709 /**
710 * ata_id_major_version - get ATA level of drive
711 * @id: Identify data
712 *
713 * Caveats:
714 * ATA-1 considers identify optional
715 * ATA-2 introduces mandatory identify
716 * ATA-3 introduces word 80 and accurate reporting
717 *
718 * The practical impact of this is that ata_id_major_version cannot
719 * reliably report on drives below ATA3.
720 */
721
ata_id_major_version(const u16 * id)722 static inline unsigned int ata_id_major_version(const u16 *id)
723 {
724 unsigned int mver;
725
726 if (id[ATA_ID_MAJOR_VER] == 0xFFFF)
727 return 0;
728
729 for (mver = 14; mver >= 1; mver--)
730 if (id[ATA_ID_MAJOR_VER] & (1 << mver))
731 break;
732 return mver;
733 }
734
ata_id_is_sata(const u16 * id)735 static inline bool ata_id_is_sata(const u16 *id)
736 {
737 /*
738 * See if word 93 is 0 AND drive is at least ATA-5 compatible
739 * verifying that word 80 by casting it to a signed type --
740 * this trick allows us to filter out the reserved values of
741 * 0x0000 and 0xffff along with the earlier ATA revisions...
742 */
743 if (id[ATA_ID_HW_CONFIG] == 0 && (short)id[ATA_ID_MAJOR_VER] >= 0x0020)
744 return true;
745 return false;
746 }
747
ata_id_has_tpm(const u16 * id)748 static inline bool ata_id_has_tpm(const u16 *id)
749 {
750 /* The TPM bits are only valid on ATA8 */
751 if (ata_id_major_version(id) < 8)
752 return false;
753 if ((id[48] & 0xC000) != 0x4000)
754 return false;
755 return id[48] & (1 << 0);
756 }
757
ata_id_has_dword_io(const u16 * id)758 static inline bool ata_id_has_dword_io(const u16 *id)
759 {
760 /* ATA 8 reuses this flag for "trusted" computing */
761 if (ata_id_major_version(id) > 7)
762 return false;
763 return id[ATA_ID_DWORD_IO] & (1 << 0);
764 }
765
ata_id_has_unload(const u16 * id)766 static inline bool ata_id_has_unload(const u16 *id)
767 {
768 if (ata_id_major_version(id) >= 7 &&
769 (id[ATA_ID_CFSSE] & 0xC000) == 0x4000 &&
770 id[ATA_ID_CFSSE] & (1 << 13))
771 return true;
772 return false;
773 }
774
ata_id_has_wwn(const u16 * id)775 static inline bool ata_id_has_wwn(const u16 *id)
776 {
777 return (id[ATA_ID_CSF_DEFAULT] & 0xC100) == 0x4100;
778 }
779
ata_id_form_factor(const u16 * id)780 static inline int ata_id_form_factor(const u16 *id)
781 {
782 u16 val = id[168];
783
784 if (ata_id_major_version(id) < 7 || val == 0 || val == 0xffff)
785 return 0;
786
787 val &= 0xf;
788
789 if (val > 5)
790 return 0;
791
792 return val;
793 }
794
ata_id_rotation_rate(const u16 * id)795 static inline int ata_id_rotation_rate(const u16 *id)
796 {
797 u16 val = id[217];
798
799 if (ata_id_major_version(id) < 7 || val == 0 || val == 0xffff)
800 return 0;
801
802 if (val > 1 && val < 0x401)
803 return 0;
804
805 return val;
806 }
807
ata_id_has_ncq_send_and_recv(const u16 * id)808 static inline bool ata_id_has_ncq_send_and_recv(const u16 *id)
809 {
810 return id[ATA_ID_SATA_CAPABILITY_2] & BIT(6);
811 }
812
ata_id_has_trim(const u16 * id)813 static inline bool ata_id_has_trim(const u16 *id)
814 {
815 if (ata_id_major_version(id) >= 7 &&
816 (id[ATA_ID_DATA_SET_MGMT] & 1))
817 return true;
818 return false;
819 }
820
ata_id_has_zero_after_trim(const u16 * id)821 static inline bool ata_id_has_zero_after_trim(const u16 *id)
822 {
823 /* DSM supported, deterministic read, and read zero after trim set */
824 if (ata_id_has_trim(id) &&
825 (id[ATA_ID_ADDITIONAL_SUPP] & 0x4020) == 0x4020)
826 return true;
827
828 return false;
829 }
830
ata_id_current_chs_valid(const u16 * id)831 static inline bool ata_id_current_chs_valid(const u16 *id)
832 {
833 /* For ATA-1 devices, if the INITIALIZE DEVICE PARAMETERS command
834 has not been issued to the device then the values of
835 id[ATA_ID_CUR_CYLS] to id[ATA_ID_CUR_SECTORS] are vendor specific. */
836 return (id[ATA_ID_FIELD_VALID] & 1) && /* Current translation valid */
837 id[ATA_ID_CUR_CYLS] && /* cylinders in current translation */
838 id[ATA_ID_CUR_HEADS] && /* heads in current translation */
839 id[ATA_ID_CUR_HEADS] <= 16 &&
840 id[ATA_ID_CUR_SECTORS]; /* sectors in current translation */
841 }
842
ata_id_is_cfa(const u16 * id)843 static inline bool ata_id_is_cfa(const u16 *id)
844 {
845 if ((id[ATA_ID_CONFIG] == 0x848A) || /* Traditional CF */
846 (id[ATA_ID_CONFIG] == 0x844A)) /* Delkin Devices CF */
847 return true;
848 /*
849 * CF specs don't require specific value in the word 0 anymore and yet
850 * they forbid to report the ATA version in the word 80 and require the
851 * CFA feature set support to be indicated in the word 83 in this case.
852 * Unfortunately, some cards only follow either of this requirements,
853 * and while those that don't indicate CFA feature support need some
854 * sort of quirk list, it seems impractical for the ones that do...
855 */
856 return (id[ATA_ID_COMMAND_SET_2] & 0xC004) == 0x4004;
857 }
858
ata_id_is_ssd(const u16 * id)859 static inline bool ata_id_is_ssd(const u16 *id)
860 {
861 return id[ATA_ID_ROT_SPEED] == 0x01;
862 }
863
ata_id_pio_need_iordy(const u16 * id,const u8 pio)864 static inline bool ata_id_pio_need_iordy(const u16 *id, const u8 pio)
865 {
866 /* CF spec. r4.1 Table 22 says no IORDY on PIO5 and PIO6. */
867 if (pio > 4 && ata_id_is_cfa(id))
868 return false;
869 /* For PIO3 and higher it is mandatory. */
870 if (pio > 2)
871 return true;
872 /* Turn it on when possible. */
873 return ata_id_has_iordy(id);
874 }
875
ata_drive_40wire(const u16 * dev_id)876 static inline bool ata_drive_40wire(const u16 *dev_id)
877 {
878 if (ata_id_is_sata(dev_id))
879 return false; /* SATA */
880 if ((dev_id[ATA_ID_HW_CONFIG] & 0xE000) == 0x6000)
881 return false; /* 80 wire */
882 return true;
883 }
884
ata_drive_40wire_relaxed(const u16 * dev_id)885 static inline bool ata_drive_40wire_relaxed(const u16 *dev_id)
886 {
887 if ((dev_id[ATA_ID_HW_CONFIG] & 0x2000) == 0x2000)
888 return false; /* 80 wire */
889 return true;
890 }
891
atapi_cdb_len(const u16 * dev_id)892 static inline int atapi_cdb_len(const u16 *dev_id)
893 {
894 u16 tmp = dev_id[ATA_ID_CONFIG] & 0x3;
895 switch (tmp) {
896 case 0: return 12;
897 case 1: return 16;
898 default: return -1;
899 }
900 }
901
atapi_command_packet_set(const u16 * dev_id)902 static inline int atapi_command_packet_set(const u16 *dev_id)
903 {
904 return (dev_id[ATA_ID_CONFIG] >> 8) & 0x1f;
905 }
906
atapi_id_dmadir(const u16 * dev_id)907 static inline bool atapi_id_dmadir(const u16 *dev_id)
908 {
909 return ata_id_major_version(dev_id) >= 7 && (dev_id[62] & 0x8000);
910 }
911
912 /*
913 * ata_id_is_lba_capacity_ok() performs a sanity check on
914 * the claimed LBA capacity value for the device.
915 *
916 * Returns 1 if LBA capacity looks sensible, 0 otherwise.
917 *
918 * It is called only once for each device.
919 */
ata_id_is_lba_capacity_ok(u16 * id)920 static inline bool ata_id_is_lba_capacity_ok(u16 *id)
921 {
922 unsigned long lba_sects, chs_sects, head, tail;
923
924 /* No non-LBA info .. so valid! */
925 if (id[ATA_ID_CYLS] == 0)
926 return true;
927
928 lba_sects = ata_id_u32(id, ATA_ID_LBA_CAPACITY);
929
930 /*
931 * The ATA spec tells large drives to return
932 * C/H/S = 16383/16/63 independent of their size.
933 * Some drives can be jumpered to use 15 heads instead of 16.
934 * Some drives can be jumpered to use 4092 cyls instead of 16383.
935 */
936 if ((id[ATA_ID_CYLS] == 16383 ||
937 (id[ATA_ID_CYLS] == 4092 && id[ATA_ID_CUR_CYLS] == 16383)) &&
938 id[ATA_ID_SECTORS] == 63 &&
939 (id[ATA_ID_HEADS] == 15 || id[ATA_ID_HEADS] == 16) &&
940 (lba_sects >= 16383 * 63 * id[ATA_ID_HEADS]))
941 return true;
942
943 chs_sects = id[ATA_ID_CYLS] * id[ATA_ID_HEADS] * id[ATA_ID_SECTORS];
944
945 /* perform a rough sanity check on lba_sects: within 10% is OK */
946 if (lba_sects - chs_sects < chs_sects/10)
947 return true;
948
949 /* some drives have the word order reversed */
950 head = (lba_sects >> 16) & 0xffff;
951 tail = lba_sects & 0xffff;
952 lba_sects = head | (tail << 16);
953
954 if (lba_sects - chs_sects < chs_sects/10) {
955 *(__le32 *)&id[ATA_ID_LBA_CAPACITY] = __cpu_to_le32(lba_sects);
956 return true; /* LBA capacity is (now) good */
957 }
958
959 return false; /* LBA capacity value may be bad */
960 }
961
ata_id_to_hd_driveid(u16 * id)962 static inline void ata_id_to_hd_driveid(u16 *id)
963 {
964 #ifdef __BIG_ENDIAN
965 /* accessed in struct hd_driveid as 8-bit values */
966 id[ATA_ID_MAX_MULTSECT] = __cpu_to_le16(id[ATA_ID_MAX_MULTSECT]);
967 id[ATA_ID_CAPABILITY] = __cpu_to_le16(id[ATA_ID_CAPABILITY]);
968 id[ATA_ID_OLD_PIO_MODES] = __cpu_to_le16(id[ATA_ID_OLD_PIO_MODES]);
969 id[ATA_ID_OLD_DMA_MODES] = __cpu_to_le16(id[ATA_ID_OLD_DMA_MODES]);
970 id[ATA_ID_MULTSECT] = __cpu_to_le16(id[ATA_ID_MULTSECT]);
971
972 /* as 32-bit values */
973 *(u32 *)&id[ATA_ID_LBA_CAPACITY] = ata_id_u32(id, ATA_ID_LBA_CAPACITY);
974 *(u32 *)&id[ATA_ID_SPG] = ata_id_u32(id, ATA_ID_SPG);
975
976 /* as 64-bit value */
977 *(u64 *)&id[ATA_ID_LBA_CAPACITY_2] =
978 ata_id_u64(id, ATA_ID_LBA_CAPACITY_2);
979 #endif
980 }
981
982 /*
983 * Write LBA Range Entries to the buffer that will cover the extent from
984 * sector to sector + count. This is used for TRIM and for ADD LBA(S)
985 * TO NV CACHE PINNED SET.
986 */
ata_set_lba_range_entries(void * _buffer,unsigned buf_size,u64 sector,unsigned long count)987 static inline unsigned ata_set_lba_range_entries(void *_buffer,
988 unsigned buf_size, u64 sector, unsigned long count)
989 {
990 __le64 *buffer = _buffer;
991 unsigned i = 0, used_bytes;
992
993 while (i < buf_size / 8 ) { /* 6-byte LBA + 2-byte range per entry */
994 u64 entry = sector |
995 ((u64)(count > 0xffff ? 0xffff : count) << 48);
996 buffer[i++] = __cpu_to_le64(entry);
997 if (count <= 0xffff)
998 break;
999 count -= 0xffff;
1000 sector += 0xffff;
1001 }
1002
1003 used_bytes = ALIGN(i * 8, 512);
1004 memset(buffer + i, 0, used_bytes - i * 8);
1005 return used_bytes;
1006 }
1007
ata_ok(u8 status)1008 static inline bool ata_ok(u8 status)
1009 {
1010 return ((status & (ATA_BUSY | ATA_DRDY | ATA_DF | ATA_DRQ | ATA_ERR))
1011 == ATA_DRDY);
1012 }
1013
lba_28_ok(u64 block,u32 n_block)1014 static inline bool lba_28_ok(u64 block, u32 n_block)
1015 {
1016 /* check the ending block number: must be LESS THAN 0x0fffffff */
1017 return ((block + n_block) < ((1 << 28) - 1)) && (n_block <= 256);
1018 }
1019
lba_48_ok(u64 block,u32 n_block)1020 static inline bool lba_48_ok(u64 block, u32 n_block)
1021 {
1022 /* check the ending block number */
1023 return ((block + n_block - 1) < ((u64)1 << 48)) && (n_block <= 65536);
1024 }
1025
1026 #define sata_pmp_gscr_vendor(gscr) ((gscr)[SATA_PMP_GSCR_PROD_ID] & 0xffff)
1027 #define sata_pmp_gscr_devid(gscr) ((gscr)[SATA_PMP_GSCR_PROD_ID] >> 16)
1028 #define sata_pmp_gscr_rev(gscr) (((gscr)[SATA_PMP_GSCR_REV] >> 8) & 0xff)
1029 #define sata_pmp_gscr_ports(gscr) ((gscr)[SATA_PMP_GSCR_PORT_INFO] & 0xf)
1030
1031 #endif /* __LINUX_ATA_H__ */
1032