Lines Matching refs:arch
50 u64 val = vcpu->arch.vgic_cpu.vgic_v3.vgic_lr[LR_INDEX(lr)]; in vgic_v3_get_lr()
52 if (vcpu->kvm->arch.vgic.vgic_model == KVM_DEV_TYPE_ARM_VGIC_V3) in vgic_v3_get_lr()
59 vcpu->kvm->arch.vgic.vgic_model == KVM_DEV_TYPE_ARM_VGIC_V2) in vgic_v3_get_lr()
91 switch (vcpu->kvm->arch.vgic.vgic_model) { in vgic_v3_set_lr()
114 vcpu->arch.vgic_cpu.vgic_v3.vgic_lr[LR_INDEX(lr)] = lr_val; in vgic_v3_set_lr()
117 vcpu->arch.vgic_cpu.vgic_v3.vgic_elrsr |= (1U << lr); in vgic_v3_set_lr()
119 vcpu->arch.vgic_cpu.vgic_v3.vgic_elrsr &= ~(1U << lr); in vgic_v3_set_lr()
124 return vcpu->arch.vgic_cpu.vgic_v3.vgic_elrsr; in vgic_v3_get_elrsr()
129 return vcpu->arch.vgic_cpu.vgic_v3.vgic_eisr; in vgic_v3_get_eisr()
134 vcpu->arch.vgic_cpu.vgic_v3.vgic_eisr = 0; in vgic_v3_clear_eisr()
139 u32 misr = vcpu->arch.vgic_cpu.vgic_v3.vgic_misr; in vgic_v3_get_interrupt_status()
152 u32 vmcr = vcpu->arch.vgic_cpu.vgic_v3.vgic_vmcr; in vgic_v3_get_vmcr()
162 vcpu->arch.vgic_cpu.vgic_v3.vgic_hcr |= ICH_HCR_UIE; in vgic_v3_enable_underflow()
167 vcpu->arch.vgic_cpu.vgic_v3.vgic_hcr &= ~ICH_HCR_UIE; in vgic_v3_disable_underflow()
179 vcpu->arch.vgic_cpu.vgic_v3.vgic_vmcr = vmcr; in vgic_v3_set_vmcr()
184 struct vgic_v3_cpu_if *vgic_v3 = &vcpu->arch.vgic_cpu.vgic_v3; in vgic_v3_enable()
199 if (vcpu->kvm->arch.vgic.vgic_model == KVM_DEV_TYPE_ARM_VGIC_V3) in vgic_v3_enable()