164 	struct virtio_pci_cfg_cap_u32 cfg_access;  member
1298 			     struct virtio_pci_cfg_cap_u32 *cfg_access)  in valid_bar_access()  argument
1301 	if (cfg_access->cap.bar != 0)  in valid_bar_access()
1305 	if (cfg_access->cap.offset >= d->mmio_size  in valid_bar_access()
1306 	    || cfg_access->cap.offset + cfg_access->cap.length > d->mmio_size)  in valid_bar_access()
1310 	if (cfg_access->cap.length != 1  in valid_bar_access()
1311 	    && cfg_access->cap.length != 2  in valid_bar_access()
1312 	    && cfg_access->cap.length != 4)  in valid_bar_access()
1321 	if (cfg_access->cap.offset % cfg_access->cap.length != 0)  in valid_bar_access()
1402 		   == (void *)&d->config.cfg_access.cap.bar  in pci_data_iowrite()
1404 		   == &d->config.cfg_access.cap.length  in pci_data_iowrite()
1406 		   == &d->config.cfg_access.cap.offset) {  in pci_data_iowrite()
1416 	} else if (&d->config_words[reg] == &d->config.cfg_access.pci_cfg_data) {  in pci_data_iowrite()
1429 		if (!valid_bar_access(d, &d->config.cfg_access))  in pci_data_iowrite()
1432 		iowrite(portoff, val, mask, &d->config.cfg_access.pci_cfg_data);  in pci_data_iowrite()
1438 		write_mask = (1ULL<<(8*d->config.cfg_access.cap.length)) - 1;  in pci_data_iowrite()
1440 			d->config.cfg_access.pci_cfg_data, write_mask,  in pci_data_iowrite()
1441 			d->config.cfg_access.cap.bar,  in pci_data_iowrite()
1442 			d->config.cfg_access.cap.offset,  in pci_data_iowrite()
1443 			d->config.cfg_access.cap.length);  in pci_data_iowrite()
1445 		emulate_mmio_write(d, d->config.cfg_access.cap.offset,  in pci_data_iowrite()
1446 				   d->config.cfg_access.pci_cfg_data,  in pci_data_iowrite()
1472 	if (&d->config_words[reg] == &d->config.cfg_access.pci_cfg_data) {  in pci_data_ioread()
1484 		if (!valid_bar_access(d, &d->config.cfg_access))  in pci_data_ioread()
1487 			     d->config.cfg_access.cap.bar,  in pci_data_ioread()
1488 			     d->config.cfg_access.cap.offset,  in pci_data_ioread()
1489 			     d->config.cfg_access.cap.length);  in pci_data_ioread()
1495 		read_mask = (1ULL<<(8*d->config.cfg_access.cap.length))-1;  in pci_data_ioread()
1496 		d->config.cfg_access.pci_cfg_data  in pci_data_ioread()
1498 					    d->config.cfg_access.cap.offset,  in pci_data_ioread()
1501 			d->config.cfg_access.pci_cfg_data, read_mask,  in pci_data_ioread()
1502 			d->config.cfg_access.cap.bar,  in pci_data_ioread()
1503 			d->config.cfg_access.cap.offset,  in pci_data_ioread()
1504 			d->config.cfg_access.cap.length);  in pci_data_ioread()
2446 	dev->config.cfg_access.cap.cap_next  in set_device_config()
2455 	assert(dev->config.cfg_access.cap.cap_next % 4 == 0);  in set_device_config()
2593 		 offsetof(struct pci_config, cfg_access));  in init_pci_config()
2602 	init_cap(&pci->cfg_access.cap, sizeof(pci->cfg_access),  in init_pci_config()