135 	uint32_t conf, ctrl;  in jz4740_i2s_startup()  local
146 	conf = jz4740_i2s_read(i2s, JZ_REG_AIC_CONF);  in jz4740_i2s_startup()
147 	conf |= JZ_AIC_CONF_ENABLE;  in jz4740_i2s_startup()
148 	jz4740_i2s_write(i2s, JZ_REG_AIC_CONF, conf);  in jz4740_i2s_startup()
157 	uint32_t conf;  in jz4740_i2s_shutdown()  local
162 	conf = jz4740_i2s_read(i2s, JZ_REG_AIC_CONF);  in jz4740_i2s_shutdown()
163 	conf &= ~JZ_AIC_CONF_ENABLE;  in jz4740_i2s_shutdown()
164 	jz4740_i2s_write(i2s, JZ_REG_AIC_CONF, conf);  in jz4740_i2s_shutdown()
209 	uint32_t conf;  in jz4740_i2s_set_fmt()  local
211 	conf = jz4740_i2s_read(i2s, JZ_REG_AIC_CONF);  in jz4740_i2s_set_fmt()
213 	conf &= ~(JZ_AIC_CONF_BIT_CLK_MASTER | JZ_AIC_CONF_SYNC_CLK_MASTER);  in jz4740_i2s_set_fmt()
217 		conf |= JZ_AIC_CONF_BIT_CLK_MASTER | JZ_AIC_CONF_SYNC_CLK_MASTER;  in jz4740_i2s_set_fmt()
221 		conf |= JZ_AIC_CONF_SYNC_CLK_MASTER;  in jz4740_i2s_set_fmt()
224 		conf |= JZ_AIC_CONF_BIT_CLK_MASTER;  in jz4740_i2s_set_fmt()
249 	jz4740_i2s_write(i2s, JZ_REG_AIC_CONF, conf);  in jz4740_i2s_set_fmt()
336 	uint32_t conf;  in jz4740_i2s_suspend()  local
339 		conf = jz4740_i2s_read(i2s, JZ_REG_AIC_CONF);  in jz4740_i2s_suspend()
340 		conf &= ~JZ_AIC_CONF_ENABLE;  in jz4740_i2s_suspend()
341 		jz4740_i2s_write(i2s, JZ_REG_AIC_CONF, conf);  in jz4740_i2s_suspend()
354 	uint32_t conf;  in jz4740_i2s_resume()  local
361 		conf = jz4740_i2s_read(i2s, JZ_REG_AIC_CONF);  in jz4740_i2s_resume()
362 		conf |= JZ_AIC_CONF_ENABLE;  in jz4740_i2s_resume()
363 		jz4740_i2s_write(i2s, JZ_REG_AIC_CONF, conf);  in jz4740_i2s_resume()
389 	uint32_t conf;  in jz4740_i2s_dai_probe()  local
398 		conf = (7 << JZ4780_AIC_CONF_FIFO_RX_THRESHOLD_OFFSET) |  in jz4740_i2s_dai_probe()
404 		conf = (7 << JZ_AIC_CONF_FIFO_RX_THRESHOLD_OFFSET) |  in jz4740_i2s_dai_probe()
412 	jz4740_i2s_write(i2s, JZ_REG_AIC_CONF, conf);  in jz4740_i2s_dai_probe()