Lines Matching refs:u32
224 u32 entry_point;
234 u32 offset;
235 u32 size;
250 u32 parameter_id;
251 u32 param_size;
255 u32 action;
271 u32 fw_log_providers_hash;
276 u32 ring_pt_address;
277 u32 num_pages;
278 u32 ring_size;
279 u32 ring_offset;
280 u32 ring_first_pfn;
286 u32 config[SST_HSW_FW_LOG_CONFIG_DWORDS];
291 u32 log_buffer_begining;
292 u32 log_buffer_size;
297 u32 glitch_type;
298 u32 present_pos;
299 u32 write_pos;
304 u32 position;
305 u32 fw_cycle_count;
310 u32 position;
311 u32 end_of_buffer;
322 u32 channel;
323 u32 target_volume;
325 u32 curve_type;
330 u32 ssp_interface;
331 u32 clock_frequency;
332 u32 mode;
340 u32 frequency;
341 u32 bitdepth;
342 u32 map;
343 u32 config;
344 u32 style;
361 u32 number_of_notifications;
366 u32 stream_hw_id;
367 u32 mixer_hw_id; // returns rate ????
368 u32 read_position_register_address;
369 u32 presentation_position_register_address;
370 u32 peak_meter_register_address[SST_HSW_NO_CHANNELS];
371 u32 volume_register_address[SST_HSW_NO_CHANNELS];
376 u32 mixer_hw_id;
377 u32 peak_meter_register_address[SST_HSW_NO_CHANNELS];
378 u32 volume_register_address[SST_HSW_NO_CHANNELS];
389 u32 offset;
390 u32 size;
391 u32 source;
396 u32 entries_no;
404 u32 fw_offset);
408 u32 create_channel_map(enum sst_hsw_channel_config config);
412 struct sst_hsw_stream *stream, u32 stage_id, u32 channel, u32 volume);
414 struct sst_hsw_stream *stream, u32 stage_id, u32 channel, u32 *volume);
417 int sst_hsw_mixer_set_volume(struct sst_hsw *hsw, u32 stage_id, u32 channel,
418 u32 volume);
419 int sst_hsw_mixer_get_volume(struct sst_hsw *hsw, u32 stage_id, u32 channel,
420 u32 *volume);
424 u32 (*get_write_position)(struct sst_hsw_stream *stream, void *data),
436 u32 ring_pt_address, u32 num_pages,
437 u32 ring_size, u32 ring_offset, u32 ring_first_pfn);
442 u32 bits);
450 struct sst_hsw_stream *stream, u32 map,
457 struct sst_hsw_stream *stream, u32 offset, u32 size);
459 struct sst_hsw_stream *stream, u32 offset, u32 size);
479 struct sst_hsw_stream *stream, u32 *position);
481 struct sst_hsw_stream *stream, u32 *position);
482 u32 sst_hsw_get_dsp_position(struct sst_hsw *hsw,
490 enum sst_hsw_device_mode mode, u32 clock_divider);
503 bool sst_hsw_is_module_loaded(struct sst_hsw *hsw, u32 module_id);
504 bool sst_hsw_is_module_active(struct sst_hsw *hsw, u32 module_id);
505 void sst_hsw_set_module_enabled_rtd3(struct sst_hsw *hsw, u32 module_id);
506 void sst_hsw_set_module_disabled_rtd3(struct sst_hsw *hsw, u32 module_id);
507 bool sst_hsw_is_module_enabled_rtd3(struct sst_hsw *hsw, u32 module_id);
514 u32 module_id, u32 instance_id, char *name);
516 u32 module_id, u32 instance_id);
518 u32 module_id, u32 instance_id);
520 u32 module_id, u32 instance_id, u32 parameter_id,
521 u32 param_size, char *param);