Lines Matching refs:ctrl
147 struct spdif_mixer_control *ctrl = &spdif_priv->fsl_spdif_control; in spdif_irq_uqrx_full() local
154 pos = &ctrl->upos; in spdif_irq_uqrx_full()
159 pos = &ctrl->qpos; in spdif_irq_uqrx_full()
178 ctrl->subcode[*pos++] = val >> 16; in spdif_irq_uqrx_full()
179 ctrl->subcode[*pos++] = val >> 8; in spdif_irq_uqrx_full()
180 ctrl->subcode[*pos++] = val; in spdif_irq_uqrx_full()
186 struct spdif_mixer_control *ctrl = &spdif_priv->fsl_spdif_control; in spdif_irq_uq_sync() local
192 if (ctrl->qpos == 0) in spdif_irq_uq_sync()
196 ctrl->ready_buf = (ctrl->qpos - 1) / SPDIF_QSUB_SIZE + 1; in spdif_irq_uq_sync()
202 struct spdif_mixer_control *ctrl = &spdif_priv->fsl_spdif_control; in spdif_irq_uq_err() local
214 ctrl->ready_buf = 0; in spdif_irq_uq_err()
215 ctrl->upos = 0; in spdif_irq_uq_err()
216 ctrl->qpos = 0; in spdif_irq_uq_err()
327 static void spdif_set_cstatus(struct spdif_mixer_control *ctrl, in spdif_set_cstatus() argument
330 ctrl->ch_status[3] &= ~mask; in spdif_set_cstatus()
331 ctrl->ch_status[3] |= cstatus & mask; in spdif_set_cstatus()
336 struct spdif_mixer_control *ctrl = &spdif_priv->fsl_spdif_control; in spdif_write_channel_status() local
341 ch_status = (bitrev8(ctrl->ch_status[0]) << 16) | in spdif_write_channel_status()
342 (bitrev8(ctrl->ch_status[1]) << 8) | in spdif_write_channel_status()
343 bitrev8(ctrl->ch_status[2]); in spdif_write_channel_status()
348 ch_status = bitrev8(ctrl->ch_status[3]) << 16; in spdif_write_channel_status()
376 struct spdif_mixer_control *ctrl = &spdif_priv->fsl_spdif_control; in spdif_set_sample_rate() local
443 spdif_set_cstatus(ctrl, IEC958_AES3_CON_FS, csfs); in spdif_set_sample_rate()
561 struct spdif_mixer_control *ctrl = &spdif_priv->fsl_spdif_control; in fsl_spdif_hw_params() local
573 spdif_set_cstatus(ctrl, IEC958_AES3_CON_CLOCK, in fsl_spdif_hw_params()
646 struct spdif_mixer_control *ctrl = &spdif_priv->fsl_spdif_control; in fsl_spdif_pb_get() local
648 uvalue->value.iec958.status[0] = ctrl->ch_status[0]; in fsl_spdif_pb_get()
649 uvalue->value.iec958.status[1] = ctrl->ch_status[1]; in fsl_spdif_pb_get()
650 uvalue->value.iec958.status[2] = ctrl->ch_status[2]; in fsl_spdif_pb_get()
651 uvalue->value.iec958.status[3] = ctrl->ch_status[3]; in fsl_spdif_pb_get()
661 struct spdif_mixer_control *ctrl = &spdif_priv->fsl_spdif_control; in fsl_spdif_pb_put() local
663 ctrl->ch_status[0] = uvalue->value.iec958.status[0]; in fsl_spdif_pb_put()
664 ctrl->ch_status[1] = uvalue->value.iec958.status[1]; in fsl_spdif_pb_put()
665 ctrl->ch_status[2] = uvalue->value.iec958.status[2]; in fsl_spdif_pb_put()
666 ctrl->ch_status[3] = uvalue->value.iec958.status[3]; in fsl_spdif_pb_put()
711 struct spdif_mixer_control *ctrl = &spdif_priv->fsl_spdif_control; in fsl_spdif_subcode_get() local
715 spin_lock_irqsave(&ctrl->ctl_lock, flags); in fsl_spdif_subcode_get()
716 if (ctrl->ready_buf) { in fsl_spdif_subcode_get()
717 int idx = (ctrl->ready_buf - 1) * SPDIF_UBITS_SIZE; in fsl_spdif_subcode_get()
719 &ctrl->subcode[idx], SPDIF_UBITS_SIZE); in fsl_spdif_subcode_get()
722 spin_unlock_irqrestore(&ctrl->ctl_lock, flags); in fsl_spdif_subcode_get()
743 struct spdif_mixer_control *ctrl = &spdif_priv->fsl_spdif_control; in fsl_spdif_qget() local
747 spin_lock_irqsave(&ctrl->ctl_lock, flags); in fsl_spdif_qget()
748 if (ctrl->ready_buf) { in fsl_spdif_qget()
749 int idx = (ctrl->ready_buf - 1) * SPDIF_QSUB_SIZE; in fsl_spdif_qget()
751 &ctrl->qsub[idx], SPDIF_QSUB_SIZE); in fsl_spdif_qget()
754 spin_unlock_irqrestore(&ctrl->ctl_lock, flags); in fsl_spdif_qget()
1206 struct spdif_mixer_control *ctrl; in fsl_spdif_probe() local
1279 ctrl = &spdif_priv->fsl_spdif_control; in fsl_spdif_probe()
1280 spin_lock_init(&ctrl->ctl_lock); in fsl_spdif_probe()
1283 ctrl->ch_status[0] = IEC958_AES0_CON_NOT_COPYRIGHT | in fsl_spdif_probe()
1285 ctrl->ch_status[1] = IEC958_AES1_CON_DIGDIGCONV_ID; in fsl_spdif_probe()
1286 ctrl->ch_status[2] = 0x00; in fsl_spdif_probe()
1287 ctrl->ch_status[3] = IEC958_AES3_CON_FS_44100 | in fsl_spdif_probe()