53 	struct regmap *regmap;  member
75 	regmap_read(esai_priv->regmap, REG_ESAI_ESR, &esr);  in esai_isr()
184 	regmap_update_bits(esai_priv->regmap, REG_ESAI_xCCR(tx),  in fsl_esai_divisor_cal()
193 	regmap_update_bits(esai_priv->regmap, REG_ESAI_xCCR(tx),  in fsl_esai_divisor_cal()
229 	regmap_update_bits(esai_priv->regmap, REG_ESAI_xCCR(tx),  in fsl_esai_set_dai_sysclk()
293 	regmap_update_bits(esai_priv->regmap, REG_ESAI_ECR,  in fsl_esai_set_dai_sysclk()
350 	regmap_update_bits(esai_priv->regmap, REG_ESAI_TCCR,  in fsl_esai_set_dai_tdm_slot()
353 	regmap_update_bits(esai_priv->regmap, REG_ESAI_TSMA,  in fsl_esai_set_dai_tdm_slot()
355 	regmap_update_bits(esai_priv->regmap, REG_ESAI_TSMB,  in fsl_esai_set_dai_tdm_slot()
358 	regmap_update_bits(esai_priv->regmap, REG_ESAI_RCCR,  in fsl_esai_set_dai_tdm_slot()
361 	regmap_update_bits(esai_priv->regmap, REG_ESAI_RSMA,  in fsl_esai_set_dai_tdm_slot()
363 	regmap_update_bits(esai_priv->regmap, REG_ESAI_RSMB,  in fsl_esai_set_dai_tdm_slot()
448 	regmap_update_bits(esai_priv->regmap, REG_ESAI_TCR, mask, xcr);  in fsl_esai_set_dai_fmt()
449 	regmap_update_bits(esai_priv->regmap, REG_ESAI_RCR, mask, xcr);  in fsl_esai_set_dai_fmt()
453 	regmap_update_bits(esai_priv->regmap, REG_ESAI_TCCR, mask, xccr);  in fsl_esai_set_dai_fmt()
454 	regmap_update_bits(esai_priv->regmap, REG_ESAI_RCCR, mask, xccr);  in fsl_esai_set_dai_fmt()
485 		regmap_update_bits(esai_priv->regmap, REG_ESAI_SAICR,  in fsl_esai_startup()
490 		regmap_update_bits(esai_priv->regmap, REG_ESAI_TCCR,  in fsl_esai_startup()
492 		regmap_update_bits(esai_priv->regmap, REG_ESAI_RCCR,  in fsl_esai_startup()
531 	regmap_update_bits(esai_priv->regmap, REG_ESAI_xCR(tx),  in fsl_esai_hw_params()
535 	regmap_update_bits(esai_priv->regmap, REG_ESAI_xFCR(tx),  in fsl_esai_hw_params()
543 	regmap_update_bits(esai_priv->regmap, REG_ESAI_xFCR(tx), mask, val);  in fsl_esai_hw_params()
548 	regmap_update_bits(esai_priv->regmap, REG_ESAI_xCR(tx), mask, val);  in fsl_esai_hw_params()
551 	regmap_update_bits(esai_priv->regmap, REG_ESAI_PRRC,  in fsl_esai_hw_params()
553 	regmap_update_bits(esai_priv->regmap, REG_ESAI_PCRC,  in fsl_esai_hw_params()
582 		regmap_update_bits(esai_priv->regmap, REG_ESAI_xFCR(tx),  in fsl_esai_trigger()
587 			regmap_write(esai_priv->regmap, REG_ESAI_ETDR, 0x0);  in fsl_esai_trigger()
589 		regmap_update_bits(esai_priv->regmap, REG_ESAI_xCR(tx),  in fsl_esai_trigger()
596 		regmap_update_bits(esai_priv->regmap, REG_ESAI_xCR(tx),  in fsl_esai_trigger()
600 		regmap_update_bits(esai_priv->regmap, REG_ESAI_xFCR(tx),  in fsl_esai_trigger()
602 		regmap_update_bits(esai_priv->regmap, REG_ESAI_xFCR(tx),  in fsl_esai_trigger()
797 	esai_priv->regmap = devm_regmap_init_mmio_clk(&pdev->dev,  in fsl_esai_probe()
799 	if (IS_ERR(esai_priv->regmap)) {  in fsl_esai_probe()
801 				PTR_ERR(esai_priv->regmap));  in fsl_esai_probe()
802 		return PTR_ERR(esai_priv->regmap);  in fsl_esai_probe()
866 	ret = regmap_write(esai_priv->regmap, REG_ESAI_ECR, ESAI_ECR_ERST);  in fsl_esai_probe()
876 	ret = regmap_write(esai_priv->regmap, REG_ESAI_ECR, ESAI_ECR_ESAIEN);  in fsl_esai_probe()
908 	regcache_cache_only(esai->regmap, true);  in fsl_esai_suspend()
909 	regcache_mark_dirty(esai->regmap);  in fsl_esai_suspend()
919 	regcache_cache_only(esai->regmap, false);  in fsl_esai_resume()
922 	regmap_update_bits(esai->regmap, REG_ESAI_TFCR,  in fsl_esai_resume()
924 	regmap_update_bits(esai->regmap, REG_ESAI_RFCR,  in fsl_esai_resume()
927 	ret = regcache_sync(esai->regmap);  in fsl_esai_resume()
932 	regmap_update_bits(esai->regmap, REG_ESAI_TFCR, ESAI_xFCR_xFR, 0);  in fsl_esai_resume()
933 	regmap_update_bits(esai->regmap, REG_ESAI_RFCR, ESAI_xFCR_xFR, 0);  in fsl_esai_resume()