Lines Matching refs:regmap
143 regmap_update_bits(asrc_priv->regmap, REG_ASRCTR, in fsl_asrc_release_pair()
163 regmap_update_bits(asrc_priv->regmap, REG_ASRMCR(index), in fsl_asrc_set_watermarks()
225 regmap_write(asrc_priv->regmap, REG_ASRIDRL(index), ratio); in fsl_asrc_set_ideal_ratio()
226 regmap_write(asrc_priv->regmap, REG_ASRIDRH(index), ratio >> 24); in fsl_asrc_set_ideal_ratio()
324 regmap_update_bits(asrc_priv->regmap, REG_ASRCNCR, in fsl_asrc_config_pair()
329 regmap_update_bits(asrc_priv->regmap, REG_ASRCTR, in fsl_asrc_config_pair()
331 regmap_update_bits(asrc_priv->regmap, REG_ASRCTR, in fsl_asrc_config_pair()
335 regmap_update_bits(asrc_priv->regmap, REG_ASRCSR, in fsl_asrc_config_pair()
345 regmap_update_bits(asrc_priv->regmap, REG_ASRCDR(index), in fsl_asrc_config_pair()
351 regmap_update_bits(asrc_priv->regmap, REG_ASRMCR1(index), in fsl_asrc_config_pair()
357 regmap_update_bits(asrc_priv->regmap, REG_ASRMCR(index), in fsl_asrc_config_pair()
369 regmap_update_bits(asrc_priv->regmap, REG_ASRCTR, in fsl_asrc_config_pair()
373 regmap_update_bits(asrc_priv->regmap, REG_ASRCTR, in fsl_asrc_config_pair()
378 regmap_update_bits(asrc_priv->regmap, REG_ASRCFG, in fsl_asrc_config_pair()
398 regmap_update_bits(asrc_priv->regmap, REG_ASRCTR, in fsl_asrc_start_pair()
404 regmap_read(asrc_priv->regmap, REG_ASRCFG, ®); in fsl_asrc_start_pair()
409 regmap_read(asrc_priv->regmap, REG_ASRCNCR, ®); in fsl_asrc_start_pair()
411 regmap_write(asrc_priv->regmap, REG_ASRDI(index), 0); in fsl_asrc_start_pair()
414 regmap_write(asrc_priv->regmap, REG_ASRIER, ASRIER_AOLIE); in fsl_asrc_start_pair()
426 regmap_update_bits(asrc_priv->regmap, REG_ASRCTR, in fsl_asrc_stop_pair()
731 regmap_write(asrc_priv->regmap, REG_ASRCTR, ASRCTR_ASRCEN); in fsl_asrc_init()
734 regmap_write(asrc_priv->regmap, REG_ASRIER, 0x0); in fsl_asrc_init()
737 regmap_write(asrc_priv->regmap, REG_ASRPM1, 0x7fffff); in fsl_asrc_init()
738 regmap_write(asrc_priv->regmap, REG_ASRPM2, 0x255555); in fsl_asrc_init()
739 regmap_write(asrc_priv->regmap, REG_ASRPM3, 0xff7280); in fsl_asrc_init()
740 regmap_write(asrc_priv->regmap, REG_ASRPM4, 0xff7280); in fsl_asrc_init()
741 regmap_write(asrc_priv->regmap, REG_ASRPM5, 0xff7280); in fsl_asrc_init()
744 regmap_update_bits(asrc_priv->regmap, REG_ASRTFR1, in fsl_asrc_init()
748 regmap_write(asrc_priv->regmap, REG_ASR76K, 0x06D6); in fsl_asrc_init()
751 return regmap_write(asrc_priv->regmap, REG_ASR56K, 0x0947); in fsl_asrc_init()
764 regmap_read(asrc_priv->regmap, REG_ASRSTR, &status); in fsl_asrc_isr()
767 regmap_write(asrc_priv->regmap, REG_ASRSTR, ASRSTR_AOLE); in fsl_asrc_isr()
830 asrc_priv->regmap = devm_regmap_init_mmio_clk(&pdev->dev, "mem", regs, in fsl_asrc_probe()
832 if (IS_ERR(asrc_priv->regmap)) { in fsl_asrc_probe()
834 return PTR_ERR(asrc_priv->regmap); in fsl_asrc_probe()
978 regcache_cache_only(asrc_priv->regmap, true); in fsl_asrc_suspend()
979 regcache_mark_dirty(asrc_priv->regmap); in fsl_asrc_suspend()
990 regmap_read(asrc_priv->regmap, REG_ASRCTR, &asrctr); in fsl_asrc_resume()
991 regmap_update_bits(asrc_priv->regmap, REG_ASRCTR, in fsl_asrc_resume()
995 regcache_cache_only(asrc_priv->regmap, false); in fsl_asrc_resume()
996 regcache_sync(asrc_priv->regmap); in fsl_asrc_resume()
999 regmap_update_bits(asrc_priv->regmap, REG_ASRCTR, in fsl_asrc_resume()