Lines Matching refs:SGTL5000_CHIP_ANA_POWER
55 { SGTL5000_CHIP_ANA_POWER, 0x7060 },
190 snd_soc_update_bits(codec, SGTL5000_CHIP_ANA_POWER, in power_vag_event()
201 if ((snd_soc_read(codec, SGTL5000_CHIP_ANA_POWER) & in power_vag_event()
203 snd_soc_update_bits(codec, SGTL5000_CHIP_ANA_POWER, in power_vag_event()
250 SND_SOC_DAPM_PGA("HP", SGTL5000_CHIP_ANA_POWER, 4, 0, NULL, 0),
251 SND_SOC_DAPM_PGA("LO", SGTL5000_CHIP_ANA_POWER, 0, 0, NULL, 0),
266 SND_SOC_DAPM_ADC("ADC", "Capture", SGTL5000_CHIP_ANA_POWER, 1, 0),
267 SND_SOC_DAPM_DAC("DAC", "Playback", SGTL5000_CHIP_ANA_POWER, 3, 0),
690 snd_soc_update_bits(codec, SGTL5000_CHIP_ANA_POWER, in sgtl5000_set_clock()
701 snd_soc_update_bits(codec, SGTL5000_CHIP_ANA_POWER, in sgtl5000_set_clock()
736 snd_soc_update_bits(codec, SGTL5000_CHIP_ANA_POWER, stereo, in sgtl5000_pcm_hw_params()
809 snd_soc_update_bits(codec, SGTL5000_CHIP_ANA_POWER, in ldo_regulator_enable()
814 snd_soc_update_bits(codec, SGTL5000_CHIP_ANA_POWER, in ldo_regulator_enable()
827 snd_soc_update_bits(codec, SGTL5000_CHIP_ANA_POWER, in ldo_regulator_disable()
1052 case SGTL5000_CHIP_ANA_POWER: in sgtl5000_readable()
1156 ana_pwr = snd_soc_read(codec, SGTL5000_CHIP_ANA_POWER); in sgtl5000_set_power_regs()
1179 snd_soc_write(codec, SGTL5000_CHIP_ANA_POWER, ana_pwr); in sgtl5000_set_power_regs()
1191 snd_soc_update_bits(codec, SGTL5000_CHIP_ANA_POWER, in sgtl5000_set_power_regs()
1195 snd_soc_update_bits(codec, SGTL5000_CHIP_ANA_POWER, in sgtl5000_set_power_regs()