237 	u32 areg;     /* cached additional register value */  member
505 			rme96->areg |= RME96_AR_CDATA;  in snd_rme96_write_SPI()
507 			rme96->areg &= ~RME96_AR_CDATA;  in snd_rme96_write_SPI()
509 		rme96->areg &= ~(RME96_AR_CCLK | RME96_AR_CLATCH);  in snd_rme96_write_SPI()
510 		writel(rme96->areg, rme96->iobase + RME96_IO_ADDITIONAL_REG);  in snd_rme96_write_SPI()
512 		rme96->areg |= RME96_AR_CCLK;  in snd_rme96_write_SPI()
513 		writel(rme96->areg, rme96->iobase + RME96_IO_ADDITIONAL_REG);  in snd_rme96_write_SPI()
517 	rme96->areg &= ~(RME96_AR_CCLK | RME96_AR_CDATA);  in snd_rme96_write_SPI()
518 	rme96->areg |= RME96_AR_CLATCH;  in snd_rme96_write_SPI()
519 	writel(rme96->areg, rme96->iobase + RME96_IO_ADDITIONAL_REG);  in snd_rme96_write_SPI()
521 	rme96->areg &= ~RME96_AR_CLATCH;  in snd_rme96_write_SPI()
522 	writel(rme96->areg, rme96->iobase + RME96_IO_ADDITIONAL_REG);  in snd_rme96_write_SPI()
612 	if (rme96->areg & RME96_AR_ANALOG) {  in snd_rme96_capture_getrate()
614 		n = ((rme96->areg >> RME96_AR_BITPOS_F0) & 1) +  in snd_rme96_capture_getrate()
615 			(((rme96->areg >> RME96_AR_BITPOS_F1) & 1) << 1);  in snd_rme96_capture_getrate()
629 		return (rme96->areg & RME96_AR_BITPOS_F2) ? rate << 1 : rate;  in snd_rme96_capture_getrate()
757 		rme96->areg = ((rme96->areg | RME96_AR_FREQPAD_0) &  in snd_rme96_capture_analog_setrate()
761 		rme96->areg = ((rme96->areg & ~RME96_AR_FREQPAD_0) |  in snd_rme96_capture_analog_setrate()
765 		rme96->areg = ((rme96->areg | RME96_AR_FREQPAD_0) |  in snd_rme96_capture_analog_setrate()
772 		rme96->areg = ((rme96->areg | RME96_AR_FREQPAD_0) &  in snd_rme96_capture_analog_setrate()
779 		rme96->areg = ((rme96->areg & ~RME96_AR_FREQPAD_0) |  in snd_rme96_capture_analog_setrate()
783 		rme96->areg = ((rme96->areg | RME96_AR_FREQPAD_0) |  in snd_rme96_capture_analog_setrate()
789 	writel(rme96->areg, rme96->iobase + RME96_IO_ADDITIONAL_REG);  in snd_rme96_capture_analog_setrate()
801 		rme96->areg &= ~RME96_AR_WSEL;  in snd_rme96_setclockmode()
806 		rme96->areg &= ~RME96_AR_WSEL;  in snd_rme96_setclockmode()
811 		rme96->areg |= RME96_AR_WSEL;  in snd_rme96_setclockmode()
817 	writel(rme96->areg, rme96->iobase + RME96_IO_ADDITIONAL_REG);  in snd_rme96_setclockmode()
824 	if (rme96->areg & RME96_AR_WSEL) {  in snd_rme96_getclockmode()
866 		rme96->areg |= RME96_AR_ANALOG;  in snd_rme96_setinputtype()
867 		writel(rme96->areg, rme96->iobase + RME96_IO_ADDITIONAL_REG);  in snd_rme96_setinputtype()
885 		rme96->areg &= ~RME96_AR_ANALOG;  in snd_rme96_setinputtype()
886 		writel(rme96->areg, rme96->iobase + RME96_IO_ADDITIONAL_REG);  in snd_rme96_setinputtype()
895 	if (rme96->areg & RME96_AR_ANALOG) {  in snd_rme96_getinputtype()
1568 		rme96->areg &= ~RME96_AR_DAC_EN;  in snd_rme96_free()
1569 		writel(rme96->areg, rme96->iobase + RME96_IO_ADDITIONAL_REG);  in snd_rme96_free()
1682 	rme96->areg = RME96_AR_FREQPAD_1; /* set 44.1 kHz analog capture */  in snd_rme96_create()
1685 	writel(rme96->areg, rme96->iobase + RME96_IO_ADDITIONAL_REG);  in snd_rme96_create()
1688 	writel(rme96->areg | RME96_AR_PD2,  in snd_rme96_create()
1690 	writel(rme96->areg, rme96->iobase + RME96_IO_ADDITIONAL_REG);	  in snd_rme96_create()
1694 	rme96->areg |= RME96_AR_DAC_EN;  in snd_rme96_create()
1695 	writel(rme96->areg, rme96->iobase + RME96_IO_ADDITIONAL_REG);  in snd_rme96_create()
1790 	if (rme96->areg & RME96_AR_WSEL) {  in snd_rme96_proc_read()
2389 	rme96->areg &= ~RME96_AR_DAC_EN;  in rme96_suspend()
2390 	writel(rme96->areg, rme96->iobase + RME96_IO_ADDITIONAL_REG);  in rme96_suspend()
2412 	writel(rme96->areg | RME96_AR_PD2,  in rme96_resume()
2414 	writel(rme96->areg, rme96->iobase + RME96_IO_ADDITIONAL_REG);  in rme96_resume()
2418 	rme96->areg |= RME96_AR_DAC_EN;  in rme96_resume()
2419 	writel(rme96->areg, rme96->iobase + RME96_IO_ADDITIONAL_REG);  in rme96_resume()