155 			 u8 reg, u8 value)  in ak4396_write()  argument
168 			 AK4396_WRITE | (reg << 8) | value);  in ak4396_write()
169 	data->ak4396_regs[codec][reg] = value;  in ak4396_write()
173 				u8 reg, u8 value)  in ak4396_write_cached()  argument
177 	if (value != data->ak4396_regs[codec][reg])  in ak4396_write_cached()
178 		ak4396_write(chip, codec, reg, value);  in ak4396_write_cached()
181 static void wm8785_write(struct oxygen *chip, u8 reg, unsigned int value)  in wm8785_write()  argument
190 			 (reg << 9) | value);  in wm8785_write()
192 		data->wm8785_regs[reg] = value;  in wm8785_write()
350 	u8 value;  in set_ak4396_params()  local
352 	value = data->ak4396_regs[0][AK4396_CONTROL_2] & ~AK4396_DFS_MASK;  in set_ak4396_params()
354 		value |= AK4396_DFS_NORMAL;  in set_ak4396_params()
356 		value |= AK4396_DFS_DOUBLE;  in set_ak4396_params()
358 		value |= AK4396_DFS_QUAD;  in set_ak4396_params()
362 	if (value != data->ak4396_regs[0][AK4396_CONTROL_2]) {  in set_ak4396_params()
366 			ak4396_write(chip, i, AK4396_CONTROL_2, value);  in set_ak4396_params()
390 	u8 value;  in update_ak4396_mute()  local
392 	value = data->ak4396_regs[0][AK4396_CONTROL_2] & ~AK4396_SMUTE;  in update_ak4396_mute()
394 		value |= AK4396_SMUTE;  in update_ak4396_mute()
396 		ak4396_write_cached(chip, i, AK4396_CONTROL_2, value);  in update_ak4396_mute()
403 	unsigned int value;  in set_wm8785_params()  local
405 	value = WM8785_MCR_SLAVE | WM8785_FORMAT_LJUST;  in set_wm8785_params()
407 		value |= WM8785_OSR_SINGLE;  in set_wm8785_params()
409 		value |= WM8785_OSR_DOUBLE;  in set_wm8785_params()
411 		value |= WM8785_OSR_QUAD;  in set_wm8785_params()
412 	if (value != data->wm8785_regs[0]) {  in set_wm8785_params()
414 		wm8785_write(chip, WM8785_R0, value);  in set_wm8785_params()
422 	unsigned int value;  in set_ak5385_params()  local
425 		value = GPIO_AK5385_DFS_NORMAL;  in set_ak5385_params()
427 		value = GPIO_AK5385_DFS_DOUBLE;  in set_ak5385_params()
429 		value = GPIO_AK5385_DFS_QUAD;  in set_ak5385_params()
431 			      value, GPIO_AK5385_DFS_MASK);  in set_ak5385_params()
449 		       struct snd_ctl_elem_value *value)  in rolloff_get()  argument
454 	value->value.enumerated.item[0] =  in rolloff_get()
460 		       struct snd_ctl_elem_value *value)  in rolloff_put()  argument
470 	if (value->value.enumerated.item[0])  in rolloff_put()
500 static int hpf_get(struct snd_kcontrol *ctl, struct snd_ctl_elem_value *value)  in hpf_get()  argument
505 	value->value.enumerated.item[0] =  in hpf_get()
510 static int hpf_put(struct snd_kcontrol *ctl, struct snd_ctl_elem_value *value)  in hpf_put()  argument
519 	if (value->value.enumerated.item[0])  in hpf_put()
553 				   struct snd_ctl_elem_value *value)  in meridian_dig_source_get()  argument
557 	value->value.enumerated.item[0] =  in meridian_dig_source_get()
564 				struct snd_ctl_elem_value *value)  in claro_dig_source_get()  argument
568 	value->value.enumerated.item[0] =  in claro_dig_source_get()
575 				   struct snd_ctl_elem_value *value)  in meridian_dig_source_put()  argument
584 	if (value->value.enumerated.item[0] == 0)  in meridian_dig_source_put()
596 				struct snd_ctl_elem_value *value)  in claro_dig_source_put()  argument
605 	if (value->value.enumerated.item[0])  in claro_dig_source_put()