Lines Matching refs:reg

334 snd_azf3328_io_reg_setb(unsigned reg, u8 mask, bool do_set)  in snd_azf3328_io_reg_setb()  argument
339 u8 prev = inb(reg), new; in snd_azf3328_io_reg_setb()
344 outb(new, reg); in snd_azf3328_io_reg_setb()
353 unsigned reg, in snd_azf3328_codec_outb() argument
357 outb(value, codec->io_base + reg); in snd_azf3328_codec_outb()
361 snd_azf3328_codec_inb(const struct snd_azf3328_codec_data *codec, unsigned reg) in snd_azf3328_codec_inb() argument
363 return inb(codec->io_base + reg); in snd_azf3328_codec_inb()
368 unsigned reg, in snd_azf3328_codec_outw() argument
372 outw(value, codec->io_base + reg); in snd_azf3328_codec_outw()
376 snd_azf3328_codec_inw(const struct snd_azf3328_codec_data *codec, unsigned reg) in snd_azf3328_codec_inw() argument
378 return inw(codec->io_base + reg); in snd_azf3328_codec_inw()
383 unsigned reg, in snd_azf3328_codec_outl() argument
387 outl(value, codec->io_base + reg); in snd_azf3328_codec_outl()
392 unsigned reg, const void *buffer, int count in snd_azf3328_codec_outl_multi() argument
395 unsigned long addr = codec->io_base + reg; in snd_azf3328_codec_outl_multi()
406 snd_azf3328_codec_inl(const struct snd_azf3328_codec_data *codec, unsigned reg) in snd_azf3328_codec_inl() argument
408 return inl(codec->io_base + reg); in snd_azf3328_codec_inl()
412 snd_azf3328_ctrl_outb(const struct snd_azf3328 *chip, unsigned reg, u8 value) in snd_azf3328_ctrl_outb() argument
414 outb(value, chip->ctrl_io + reg); in snd_azf3328_ctrl_outb()
418 snd_azf3328_ctrl_inb(const struct snd_azf3328 *chip, unsigned reg) in snd_azf3328_ctrl_inb() argument
420 return inb(chip->ctrl_io + reg); in snd_azf3328_ctrl_inb()
424 snd_azf3328_ctrl_inw(const struct snd_azf3328 *chip, unsigned reg) in snd_azf3328_ctrl_inw() argument
426 return inw(chip->ctrl_io + reg); in snd_azf3328_ctrl_inw()
430 snd_azf3328_ctrl_outw(const struct snd_azf3328 *chip, unsigned reg, u16 value) in snd_azf3328_ctrl_outw() argument
432 outw(value, chip->ctrl_io + reg); in snd_azf3328_ctrl_outw()
436 snd_azf3328_ctrl_outl(const struct snd_azf3328 *chip, unsigned reg, u32 value) in snd_azf3328_ctrl_outl() argument
438 outl(value, chip->ctrl_io + reg); in snd_azf3328_ctrl_outl()
442 snd_azf3328_game_outb(const struct snd_azf3328 *chip, unsigned reg, u8 value) in snd_azf3328_game_outb() argument
444 outb(value, chip->game_io + reg); in snd_azf3328_game_outb()
448 snd_azf3328_game_outw(const struct snd_azf3328 *chip, unsigned reg, u16 value) in snd_azf3328_game_outw() argument
450 outw(value, chip->game_io + reg); in snd_azf3328_game_outw()
454 snd_azf3328_game_inb(const struct snd_azf3328 *chip, unsigned reg) in snd_azf3328_game_inb() argument
456 return inb(chip->game_io + reg); in snd_azf3328_game_inb()
460 snd_azf3328_game_inw(const struct snd_azf3328 *chip, unsigned reg) in snd_azf3328_game_inw() argument
462 return inw(chip->game_io + reg); in snd_azf3328_game_inw()
466 snd_azf3328_mixer_outw(const struct snd_azf3328 *chip, unsigned reg, u16 value) in snd_azf3328_mixer_outw() argument
468 outw(value, chip->mixer_io + reg); in snd_azf3328_mixer_outw()
472 snd_azf3328_mixer_inw(const struct snd_azf3328 *chip, unsigned reg) in snd_azf3328_mixer_inw() argument
474 return inw(chip->mixer_io + reg); in snd_azf3328_mixer_inw()
481 unsigned reg, bool do_mute in snd_azf3328_mixer_mute_control() argument
484 unsigned long portbase = chip->mixer_io + reg + 1; in snd_azf3328_mixer_mute_control()
533 unsigned short reg, const char *mode) in snd_azf3328_mixer_ac97_map_unsupported() argument
538 mode, reg); in snd_azf3328_mixer_ac97_map_unsupported()
556 snd_azf3328_mixer_ac97_map_reg_idx(unsigned short reg) in snd_azf3328_mixer_ac97_map_reg_idx() argument
599 if (reg <= AC97_3D_CONTROL) { in snd_azf3328_mixer_ac97_map_reg_idx()
600 unsigned short reg_idx = reg / 2; in snd_azf3328_mixer_ac97_map_reg_idx()
606 switch (reg) { in snd_azf3328_mixer_ac97_map_reg_idx()
812 unsigned reg, in snd_azf3328_mixer_write_volume_gradually() argument
818 unsigned long portbase = chip->mixer_io + reg; in snd_azf3328_mixer_write_volume_gradually()
868 unsigned reg; member
876 #define COMPOSE_MIXER_REG(reg,lchan_shift,rchan_shift,mask,invert,stereo,enum_c) \ argument
877 ((reg) | (lchan_shift << 8) | (rchan_shift << 12) | \
885 r->reg = val & 0xff; in snd_azf3328_mixer_reg_decode()
898 #define AZF3328_MIXER_SWITCH(xname, reg, shift, invert) \ argument
902 .private_value = COMPOSE_MIXER_REG(reg, shift, 0, 0x1, invert, 0, 0), \
905 #define AZF3328_MIXER_VOL_STEREO(xname, reg, mask, invert) \ argument
909 .private_value = COMPOSE_MIXER_REG(reg, 8, 0, mask, invert, 1, 0), \
912 #define AZF3328_MIXER_VOL_MONO(xname, reg, mask, is_right_chan) \ argument
916 .private_value = COMPOSE_MIXER_REG(reg, is_right_chan ? 0 : 8, 0, mask, 1, 0, 0), \
919 #define AZF3328_MIXER_VOL_SPECIAL(xname, reg, mask, shift, invert) \ argument
923 .private_value = COMPOSE_MIXER_REG(reg, shift, 0, mask, invert, 0, 0), \
926 #define AZF3328_MIXER_ENUM(xname, reg, enum_c, shift) \ argument
930 .private_value = COMPOSE_MIXER_REG(reg, shift, 0, 0, 0, 0, enum_c), \
937 struct azf3328_mixer_reg reg; in snd_azf3328_info_mixer() local
939 snd_azf3328_mixer_reg_decode(&reg, kcontrol->private_value); in snd_azf3328_info_mixer()
940 uinfo->type = reg.mask == 1 ? in snd_azf3328_info_mixer()
942 uinfo->count = reg.stereo + 1; in snd_azf3328_info_mixer()
944 uinfo->value.integer.max = reg.mask; in snd_azf3328_info_mixer()
953 struct azf3328_mixer_reg reg; in snd_azf3328_get_mixer() local
956 snd_azf3328_mixer_reg_decode(&reg, kcontrol->private_value); in snd_azf3328_get_mixer()
958 oreg = snd_azf3328_mixer_inw(chip, reg.reg); in snd_azf3328_get_mixer()
959 val = (oreg >> reg.lchan_shift) & reg.mask; in snd_azf3328_get_mixer()
960 if (reg.invert) in snd_azf3328_get_mixer()
961 val = reg.mask - val; in snd_azf3328_get_mixer()
963 if (reg.stereo) { in snd_azf3328_get_mixer()
964 val = (oreg >> reg.rchan_shift) & reg.mask; in snd_azf3328_get_mixer()
965 if (reg.invert) in snd_azf3328_get_mixer()
966 val = reg.mask - val; in snd_azf3328_get_mixer()
971 reg.reg, oreg, in snd_azf3328_get_mixer()
973 reg.lchan_shift, reg.rchan_shift, reg.mask, reg.invert, reg.stereo); in snd_azf3328_get_mixer()
982 struct azf3328_mixer_reg reg; in snd_azf3328_put_mixer() local
985 snd_azf3328_mixer_reg_decode(&reg, kcontrol->private_value); in snd_azf3328_put_mixer()
986 oreg = snd_azf3328_mixer_inw(chip, reg.reg); in snd_azf3328_put_mixer()
987 val = ucontrol->value.integer.value[0] & reg.mask; in snd_azf3328_put_mixer()
988 if (reg.invert) in snd_azf3328_put_mixer()
989 val = reg.mask - val; in snd_azf3328_put_mixer()
990 nreg = oreg & ~(reg.mask << reg.lchan_shift); in snd_azf3328_put_mixer()
991 nreg |= (val << reg.lchan_shift); in snd_azf3328_put_mixer()
992 if (reg.stereo) { in snd_azf3328_put_mixer()
993 val = ucontrol->value.integer.value[1] & reg.mask; in snd_azf3328_put_mixer()
994 if (reg.invert) in snd_azf3328_put_mixer()
995 val = reg.mask - val; in snd_azf3328_put_mixer()
996 nreg &= ~(reg.mask << reg.rchan_shift); in snd_azf3328_put_mixer()
997 nreg |= (val << reg.rchan_shift); in snd_azf3328_put_mixer()
999 if (reg.mask >= 0x07) /* it's a volume control, so better take care */ in snd_azf3328_put_mixer()
1001 chip, reg.reg, nreg >> 8, nreg & 0xff, in snd_azf3328_put_mixer()
1006 snd_azf3328_mixer_outw(chip, reg.reg, nreg); in snd_azf3328_put_mixer()
1010 reg.reg, ucontrol->value.integer.value[0], ucontrol->value.integer.value[1], in snd_azf3328_put_mixer()
1011 oreg, reg.lchan_shift, reg.rchan_shift, in snd_azf3328_put_mixer()
1012 nreg, snd_azf3328_mixer_inw(chip, reg.reg)); in snd_azf3328_put_mixer()
1033 struct azf3328_mixer_reg reg; in snd_azf3328_info_mixer_enum() local
1036 snd_azf3328_mixer_reg_decode(&reg, kcontrol->private_value); in snd_azf3328_info_mixer_enum()
1037 if (reg.reg == IDX_MIXER_ADVCTL2) { in snd_azf3328_info_mixer_enum()
1038 switch(reg.lchan_shift) { in snd_azf3328_info_mixer_enum()
1049 } else if (reg.reg == IDX_MIXER_REC_SELECT) in snd_azf3328_info_mixer_enum()
1053 (reg.reg == IDX_MIXER_REC_SELECT) ? 2 : 1, in snd_azf3328_info_mixer_enum()
1054 reg.enum_c, p); in snd_azf3328_info_mixer_enum()
1062 struct azf3328_mixer_reg reg; in snd_azf3328_get_mixer_enum() local
1065 snd_azf3328_mixer_reg_decode(&reg, kcontrol->private_value); in snd_azf3328_get_mixer_enum()
1066 val = snd_azf3328_mixer_inw(chip, reg.reg); in snd_azf3328_get_mixer_enum()
1067 if (reg.reg == IDX_MIXER_REC_SELECT) { in snd_azf3328_get_mixer_enum()
1068 ucontrol->value.enumerated.item[0] = (val >> 8) & (reg.enum_c - 1); in snd_azf3328_get_mixer_enum()
1069 ucontrol->value.enumerated.item[1] = (val >> 0) & (reg.enum_c - 1); in snd_azf3328_get_mixer_enum()
1071 ucontrol->value.enumerated.item[0] = (val >> reg.lchan_shift) & (reg.enum_c - 1); in snd_azf3328_get_mixer_enum()
1075 reg.reg, val, ucontrol->value.enumerated.item[0], ucontrol->value.enumerated.item[1], in snd_azf3328_get_mixer_enum()
1076 reg.lchan_shift, reg.enum_c); in snd_azf3328_get_mixer_enum()
1085 struct azf3328_mixer_reg reg; in snd_azf3328_put_mixer_enum() local
1088 snd_azf3328_mixer_reg_decode(&reg, kcontrol->private_value); in snd_azf3328_put_mixer_enum()
1089 oreg = snd_azf3328_mixer_inw(chip, reg.reg); in snd_azf3328_put_mixer_enum()
1091 if (reg.reg == IDX_MIXER_REC_SELECT) { in snd_azf3328_put_mixer_enum()
1092 if (ucontrol->value.enumerated.item[0] > reg.enum_c - 1U || in snd_azf3328_put_mixer_enum()
1093 ucontrol->value.enumerated.item[1] > reg.enum_c - 1U) in snd_azf3328_put_mixer_enum()
1098 if (ucontrol->value.enumerated.item[0] > reg.enum_c - 1U) in snd_azf3328_put_mixer_enum()
1100 val &= ~((reg.enum_c - 1) << reg.lchan_shift); in snd_azf3328_put_mixer_enum()
1101 val |= (ucontrol->value.enumerated.item[0] << reg.lchan_shift); in snd_azf3328_put_mixer_enum()
1103 snd_azf3328_mixer_outw(chip, reg.reg, val); in snd_azf3328_put_mixer_enum()
1107 "put_enum: %02x to %04x, oreg %04x\n", reg.reg, val, oreg); in snd_azf3328_put_mixer_enum()
2319 snd_azf3328_test_bit(unsigned unsigned reg, int bit)
2323 val = inb(reg);
2325 outb(val & ~(1 << bit), reg);
2326 valoff = inb(reg);
2328 outb(val|(1 << bit), reg);
2329 valon = inb(reg);
2331 outb(val, reg);
2334 reg, bit, val, valoff, valon
2633 unsigned reg; in snd_azf3328_suspend_regs() local
2635 for (reg = 0; reg < count; ++reg) { in snd_azf3328_suspend_regs()
2651 unsigned reg; in snd_azf3328_resume_regs() local
2653 for (reg = 0; reg < count; ++reg) { in snd_azf3328_resume_regs()