Lines Matching refs:s
98 static void stop_dac(struct cs4297a_state *s);
99 static void stop_adc(struct cs4297a_state *s);
100 static void start_dac(struct cs4297a_state *s);
101 static void start_adc(struct cs4297a_state *s);
195 #define VALIDATE_STATE(s) \ argument
197 if (!(s) || (s)->magic != CS4297a_MAGIC) { \
333 static int prog_dmabuf_adc(struct cs4297a_state *s) in prog_dmabuf_adc() argument
335 s->dma_adc.ready = 1; in prog_dmabuf_adc()
340 static int prog_dmabuf_dac(struct cs4297a_state *s) in prog_dmabuf_dac() argument
342 s->dma_dac.ready = 1; in prog_dmabuf_dac()
575 static int ser_init(struct cs4297a_state *s) in ser_init() argument
673 static int dma_init(struct cs4297a_state *s) in dma_init() argument
680 if (init_serdma(&s->dma_adc) || in dma_init()
681 init_serdma(&s->dma_dac)) in dma_init()
692 s->dma_dac.descrtab[i].descr_a = M_DMA_SERRX_SOP | V_DMA_DSCRA_A_SIZE(1) | in dma_init()
693 (s->dma_dac.dma_buf_phys + i*FRAME_BYTES); in dma_init()
694 s->dma_dac.descrtab[i].descr_b = V_DMA_DSCRB_PKT_SIZE(FRAME_BYTES); in dma_init()
695 s->dma_adc.descrtab[i].descr_a = V_DMA_DSCRA_A_SIZE(1) | in dma_init()
696 (s->dma_adc.dma_buf_phys + i*FRAME_BYTES); in dma_init()
697 s->dma_adc.descrtab[i].descr_b = 0; in dma_init()
704 __raw_writeq(s->dma_adc.descrtab_phys, SS_CSR(R_SER_DMA_DSCR_BASE_RX)); in dma_init()
708 __raw_writeq(s->dma_dac.descrtab_phys, SS_CSR(R_SER_DMA_DSCR_BASE_TX)); in dma_init()
736 static int serdma_reg_access(struct cs4297a_state *s, u64 data) in serdma_reg_access() argument
738 serdma_t *d = &s->dma_dac; in serdma_reg_access()
744 if (s->reg_request) { in serdma_reg_access()
749 if (s->ena & FMODE_WRITE) { in serdma_reg_access()
752 s->reg_request = data; in serdma_reg_access()
753 oss_broken_sleep_on(&s->dma_dac.reg_wait, MAX_SCHEDULE_TIMEOUT); in serdma_reg_access()
758 spin_lock_irqsave(&s->lock, flags); in serdma_reg_access()
762 spin_unlock_irqrestore(&s->lock, flags); in serdma_reg_access()
767 spin_unlock_irqrestore(&s->lock, flags); in serdma_reg_access()
787 static int cs4297a_read_ac97(struct cs4297a_state *s, u32 offset, in cs4297a_read_ac97() argument
792 if (serdma_reg_access(s, (0xCLL << 60) | (1LL << 47) | ((u64)(offset & 0x7F) << 40))) in cs4297a_read_ac97()
795 oss_broken_sleep_on(&s->dma_adc.reg_wait, MAX_SCHEDULE_TIMEOUT); in cs4297a_read_ac97()
796 *value = s->read_value; in cs4297a_read_ac97()
798 printk(KERN_INFO "cs4297a: rdr reg %x -> %x\n", s->read_reg, s->read_value)); in cs4297a_read_ac97()
807 static int cs4297a_write_ac97(struct cs4297a_state *s, u32 offset, in cs4297a_write_ac97() argument
812 …return (serdma_reg_access(s, (0xELL << 60) | ((u64)(offset & 0x7F) << 40) | ((value & 0xffff) << 1… in cs4297a_write_ac97()
815 static void stop_dac(struct cs4297a_state *s) in stop_dac() argument
820 spin_lock_irqsave(&s->lock, flags); in stop_dac()
821 s->ena &= ~FMODE_WRITE; in stop_dac()
826 __raw_writeq((s->ena & FMODE_READ) ? M_SYNCSER_DMA_RX_EN : 0, in stop_dac()
830 spin_unlock_irqrestore(&s->lock, flags); in stop_dac()
834 static void start_dac(struct cs4297a_state *s) in start_dac() argument
839 spin_lock_irqsave(&s->lock, flags); in start_dac()
840 if (!(s->ena & FMODE_WRITE) && (s->dma_dac.mapped || in start_dac()
841 (s->dma_dac.count > 0 in start_dac()
842 && s->dma_dac.ready))) { in start_dac()
843 s->ena |= FMODE_WRITE; in start_dac()
853 spin_unlock_irqrestore(&s->lock, flags); in start_dac()
859 static void stop_adc(struct cs4297a_state *s) in stop_adc() argument
866 spin_lock_irqsave(&s->lock, flags); in stop_adc()
867 s->ena &= ~FMODE_READ; in stop_adc()
869 if (s->conversion == 1) { in stop_adc()
870 s->conversion = 0; in stop_adc()
871 s->prop_adc.fmt = s->prop_adc.fmt_original; in stop_adc()
875 spin_unlock_irqrestore(&s->lock, flags); in stop_adc()
881 static void start_adc(struct cs4297a_state *s) in start_adc() argument
888 if (!(s->ena & FMODE_READ) && in start_adc()
889 (s->dma_adc.mapped || s->dma_adc.count <= in start_adc()
890 (signed) (s->dma_adc.sbufsz - 2 * s->dma_adc.fragsize)) in start_adc()
891 && s->dma_adc.ready) { in start_adc()
892 if (s->prop_adc.fmt & AFMT_S8 || s->prop_adc.fmt & AFMT_U8) { in start_adc()
899 s->prop_adc.fmt_original = s->prop_adc.fmt; in start_adc()
900 if (s->prop_adc.fmt & AFMT_S8) { in start_adc()
901 s->prop_adc.fmt &= ~AFMT_S8; in start_adc()
902 s->prop_adc.fmt |= AFMT_S16_LE; in start_adc()
904 if (s->prop_adc.fmt & AFMT_U8) { in start_adc()
905 s->prop_adc.fmt &= ~AFMT_U8; in start_adc()
906 s->prop_adc.fmt |= AFMT_U16_LE; in start_adc()
912 prog_codec(s, CS_TYPE_ADC); in start_adc()
914 prog_dmabuf_adc(s); in start_adc()
915 s->conversion = 1; in start_adc()
917 spin_lock_irqsave(&s->lock, flags); in start_adc()
918 s->ena |= FMODE_READ; in start_adc()
922 spin_unlock_irqrestore(&s->lock, flags); in start_adc()
934 static void cs4297a_update_ptr(struct cs4297a_state *s, int intflag) in cs4297a_update_ptr() argument
947 if ((s->ena & FMODE_READ) || (status & (M_SYNCSER_RX_EOP_COUNT))) { in cs4297a_update_ptr()
948 d = &s->dma_adc; in cs4297a_update_ptr()
952 if (s->ena & FMODE_READ) { in cs4297a_update_ptr()
974 s->stats.rx_bad++; in cs4297a_update_ptr()
978 s->stats.rx_good++; in cs4297a_update_ptr()
980 s->read_value = (data >> 12) & 0xffff; in cs4297a_update_ptr()
981 s->read_reg = (data >> 40) & 0x7f; in cs4297a_update_ptr()
985 s->stats.rx_overflow++; in cs4297a_update_ptr()
1000 s_ptr = (u32 *)s->dma_adc.dma_buf; in cs4297a_update_ptr()
1048 s->stats.rx_bad++; in cs4297a_update_ptr()
1051 s->stats.rx_good++; in cs4297a_update_ptr()
1053 s->read_value = (data >> 12) & 0xffff; in cs4297a_update_ptr()
1054 s->read_reg = (data >> 40) & 0x7f; in cs4297a_update_ptr()
1077 (unsigned)s, d->hwptr, in cs4297a_update_ptr()
1090 if (s->ena & FMODE_WRITE) { in cs4297a_update_ptr()
1091 serdma_t *d = &s->dma_dac; in cs4297a_update_ptr()
1118 (unsigned)(s->prop_dac.fmt & in cs4297a_update_ptr()
1125 s->stats.tx_underrun++; in cs4297a_update_ptr()
1151 (unsigned) s, d->hwptr, in cs4297a_update_ptr()
1156 static int mixer_ioctl(struct cs4297a_state *s, unsigned int cmd, in mixer_ioctl() argument
1193 VALIDATE_STATE(s); in mixer_ioctl()
1196 (unsigned) s, cmd)); in mixer_ioctl()
1245 cs4297a_write_ac97(s, AC97_3D_CONTROL, temp1); in mixer_ioctl()
1246 cs4297a_read_ac97(s, AC97_GENERAL_PURPOSE, in mixer_ioctl()
1248 cs4297a_write_ac97(s, AC97_GENERAL_PURPOSE, in mixer_ioctl()
1251 cs4297a_read_ac97(s, AC97_3D_CONTROL, &temp1); in mixer_ioctl()
1259 info.modify_counter = s->mix.modcnt; in mixer_ioctl()
1284 cs4297a_read_ac97(s, AC97_RECORD_SELECT, in mixer_ioctl()
1310 return put_user(s->mix.vol[vidx - 1], (int *) arg); in mixer_ioctl()
1319 s->mix.modcnt++; in mixer_ioctl()
1333 cs4297a_write_ac97(s, in mixer_ioctl()
1369 cs4297a_write_ac97(s, AC97_MASTER_VOL_STEREO, temp1); in mixer_ioctl()
1370 cs4297a_write_ac97(s, AC97_PHONE_VOL, temp1); in mixer_ioctl()
1373 s->mix.vol[8] = ((unsigned int) r << 8) | l; in mixer_ioctl()
1375 s->mix.vol[8] = val; in mixer_ioctl()
1377 return put_user(s->mix.vol[8], (int *) arg); in mixer_ioctl()
1400 cs4297a_write_ac97(s, AC97_PCBEEP_VOL, temp1); in mixer_ioctl()
1403 s->mix.vol[6] = l << 8; in mixer_ioctl()
1405 s->mix.vol[6] = val; in mixer_ioctl()
1407 return put_user(s->mix.vol[6], (int *) arg); in mixer_ioctl()
1426 cs4297a_write_ac97(s, AC97_RECORD_GAIN, temp1); in mixer_ioctl()
1429 s->mix.vol[7] = ((unsigned int) r << 8) | l; in mixer_ioctl()
1431 s->mix.vol[7] = val; in mixer_ioctl()
1433 return put_user(s->mix.vol[7], (int *) arg); in mixer_ioctl()
1448 cs4297a_read_ac97(s, AC97_MIC_VOL, &temp1); in mixer_ioctl()
1456 cs4297a_write_ac97(s, AC97_MIC_VOL, temp1); in mixer_ioctl()
1459 s->mix.vol[5] = val << 8; in mixer_ioctl()
1461 s->mix.vol[5] = val; in mixer_ioctl()
1463 return put_user(s->mix.vol[5], (int *) arg); in mixer_ioctl()
1494 s->mix.vol[4] = (r << 8) | l; in mixer_ioctl()
1496 s->mix.vol[4] = val; in mixer_ioctl()
1498 return put_user(s->mix.vol[4], (int *) arg); in mixer_ioctl()
1532 cs4297a_write_ac97(s, mixreg[vidx - 1], temp1); in mixer_ioctl()
1535 s->mix.vol[vidx - 1] = ((unsigned int) r << 8) | l; in mixer_ioctl()
1537 s->mix.vol[vidx - 1] = val; in mixer_ioctl()
1539 return put_user(s->mix.vol[vidx - 1], (int *) arg); in mixer_ioctl()
1549 struct cs4297a_state *s=NULL; in cs4297a_open_mixdev() local
1558 s = list_entry(entry, struct cs4297a_state, list); in cs4297a_open_mixdev()
1559 if(s->dev_mixer == minor) in cs4297a_open_mixdev()
1562 if (!s) in cs4297a_open_mixdev()
1570 VALIDATE_STATE(s); in cs4297a_open_mixdev()
1571 file->private_data = s; in cs4297a_open_mixdev()
1583 struct cs4297a_state *s = in cs4297a_release_mixdev() local
1586 VALIDATE_STATE(s); in cs4297a_release_mixdev()
1617 static int drain_adc(struct cs4297a_state *s, int nonblock) in drain_adc() argument
1626 static int drain_dac(struct cs4297a_state *s, int nonblock) in drain_dac() argument
1634 if (s->dma_dac.mapped) in drain_dac()
1638 add_wait_queue(&s->dma_dac.wait, &wait); in drain_dac()
1640 (s->dma_dac.count > 0)) { in drain_dac()
1650 spin_lock_irqsave(&s->lock, flags); in drain_dac()
1653 s->dma_dac.descrtab_phys) / sizeof(serdma_descr_t)); in drain_dac()
1654 s->dma_dac.hwptr = s->dma_dac.swptr = hwptr; in drain_dac()
1655 spin_unlock_irqrestore(&s->lock, flags); in drain_dac()
1656 remove_wait_queue(&s->dma_dac.wait, &wait); in drain_dac()
1667 struct cs4297a_state *s = in cs4297a_read() local
1677 VALIDATE_STATE(s); in cs4297a_read()
1678 if (s->dma_adc.mapped) in cs4297a_read()
1680 if (!s->dma_adc.ready && (ret = prog_dmabuf_adc(s))) in cs4297a_read()
1697 count, s->dma_adc.count, in cs4297a_read()
1698 s->dma_adc.swptr, s->dma_adc.hwptr)); in cs4297a_read()
1699 spin_lock_irqsave(&s->lock, flags); in cs4297a_read()
1704 cnt = (s->dma_adc.sb_end - s->dma_adc.sb_swptr) / 2; in cs4297a_read()
1705 count_fr = s->dma_adc.count / FRAME_SAMPLE_BYTES; in cs4297a_read()
1716 spin_unlock_irqrestore(&s->lock, flags); in cs4297a_read()
1721 if (s->conversion) { in cs4297a_read()
1742 start_adc(s); in cs4297a_read()
1745 oss_broken_sleep_on(&s->dma_adc.wait, MAX_SCHEDULE_TIMEOUT); in cs4297a_read()
1760 s->dma_adc.sbufsz, s->dma_adc.count, in cs4297a_read()
1763 if (copy_to_user (buffer, ((void *)s->dma_adc.sb_swptr), cnt_by)) in cs4297a_read()
1768 spin_lock_irqsave(&s->lock, flags); in cs4297a_read()
1770 … printk(KERN_INFO "cs4297a: upd_rcv sw->hw %x/%x\n", s->dma_adc.swptr, s->dma_adc.hwptr)); in cs4297a_read()
1771 s->dma_adc.count -= cnt_by; in cs4297a_read()
1772 s->dma_adc.sb_swptr += cnt * 2; in cs4297a_read()
1773 if (s->dma_adc.sb_swptr == s->dma_adc.sb_end) in cs4297a_read()
1774 s->dma_adc.sb_swptr = s->dma_adc.sample_buf; in cs4297a_read()
1775 spin_unlock_irqrestore(&s->lock, flags); in cs4297a_read()
1779 start_adc(s); in cs4297a_read()
1790 struct cs4297a_state *s = in cs4297a_write() local
1800 VALIDATE_STATE(s); in cs4297a_write()
1802 if (s->dma_dac.mapped) in cs4297a_write()
1804 if (!s->dma_dac.ready && (ret = prog_dmabuf_dac(s))) in cs4297a_write()
1810 serdma_t *d = &s->dma_dac; in cs4297a_write()
1815 int swap = (s->prop_dac.fmt == AFMT_S16_LE) || (s->prop_dac.fmt == AFMT_U16_LE); in cs4297a_write()
1818 spin_lock_irqsave(&s->lock, flags); in cs4297a_write()
1834 spin_unlock_irqrestore(&s->lock, flags); in cs4297a_write()
1838 start_dac(s); in cs4297a_write()
1876 if (s->reg_request) { in cs4297a_write()
1878 cpu_to_be64(s->reg_request); in cs4297a_write()
1879 s->reg_request = 0; in cs4297a_write()
1880 wake_up(&s->dma_dac.reg_wait); in cs4297a_write()
1889 spin_lock_irqsave(&s->lock, flags); in cs4297a_write()
1893 spin_unlock_irqrestore(&s->lock, flags); in cs4297a_write()
1897 start_dac(s); in cs4297a_write()
1908 struct cs4297a_state *s = in cs4297a_poll() local
1915 VALIDATE_STATE(s); in cs4297a_poll()
1920 if(!s->dma_dac.ready && prog_dmabuf_dac(s)) in cs4297a_poll()
1922 poll_wait(file, &s->dma_dac.wait, wait); in cs4297a_poll()
1928 if(!s->dma_dac.ready && prog_dmabuf_adc(s)) in cs4297a_poll()
1930 poll_wait(file, &s->dma_adc.wait, wait); in cs4297a_poll()
1932 spin_lock_irqsave(&s->lock, flags); in cs4297a_poll()
1933 cs4297a_update_ptr(s,CS_FALSE); in cs4297a_poll()
1935 if (s->dma_dac.mapped) { in cs4297a_poll()
1936 if (s->dma_dac.count >= in cs4297a_poll()
1937 (signed) s->dma_dac.fragsize) { in cs4297a_poll()
1938 if (s->dma_dac.wakeup) in cs4297a_poll()
1942 s->dma_dac.wakeup = 0; in cs4297a_poll()
1945 if ((signed) (s->dma_dac.sbufsz/2) >= s->dma_dac.count) in cs4297a_poll()
1949 if (s->dma_adc.mapped) { in cs4297a_poll()
1950 if (s->dma_adc.count >= (signed) s->dma_adc.fragsize) in cs4297a_poll()
1953 if (s->dma_adc.count > 0) in cs4297a_poll()
1957 spin_unlock_irqrestore(&s->lock, flags); in cs4297a_poll()
1976 struct cs4297a_state *s = in cs4297a_ioctl() local
1989 VALIDATE_STATE(s); in cs4297a_ioctl()
1990 mapped = ((file->f_mode & FMODE_WRITE) && s->dma_dac.mapped) || in cs4297a_ioctl()
1991 ((file->f_mode & FMODE_READ) && s->dma_adc.mapped); in cs4297a_ioctl()
2003 return drain_dac(s, in cs4297a_ioctl()
2020 stop_dac(s); in cs4297a_ioctl()
2021 synchronize_irq(s->irq); in cs4297a_ioctl()
2022 s->dma_dac.count = s->dma_dac.total_bytes = in cs4297a_ioctl()
2023 s->dma_dac.blocks = s->dma_dac.wakeup = 0; in cs4297a_ioctl()
2024 s->dma_dac.swptr = s->dma_dac.hwptr = in cs4297a_ioctl()
2026 s->dma_dac.descrtab_phys) / sizeof(serdma_descr_t)); in cs4297a_ioctl()
2029 stop_adc(s); in cs4297a_ioctl()
2030 synchronize_irq(s->irq); in cs4297a_ioctl()
2031 s->dma_adc.count = s->dma_adc.total_bytes = in cs4297a_ioctl()
2032 s->dma_adc.blocks = s->dma_dac.wakeup = 0; in cs4297a_ioctl()
2033 s->dma_adc.swptr = s->dma_adc.hwptr = in cs4297a_ioctl()
2035 s->dma_adc.descrtab_phys) / sizeof(serdma_descr_t)); in cs4297a_ioctl()
2053 stop_adc(s); in cs4297a_ioctl()
2054 s->dma_adc.ready = 0; in cs4297a_ioctl()
2055 s->prop_adc.channels = val ? 2 : 1; in cs4297a_ioctl()
2058 stop_dac(s); in cs4297a_ioctl()
2059 s->dma_dac.ready = 0; in cs4297a_ioctl()
2060 s->prop_dac.channels = val ? 2 : 1; in cs4297a_ioctl()
2072 stop_adc(s); in cs4297a_ioctl()
2073 s->dma_adc.ready = 0; in cs4297a_ioctl()
2075 s->prop_adc.channels = 2; in cs4297a_ioctl()
2077 s->prop_adc.channels = 1; in cs4297a_ioctl()
2080 stop_dac(s); in cs4297a_ioctl()
2081 s->dma_dac.ready = 0; in cs4297a_ioctl()
2083 s->prop_dac.channels = 2; in cs4297a_ioctl()
2085 s->prop_dac.channels = 1; in cs4297a_ioctl()
2090 val = s->prop_dac.channels; in cs4297a_ioctl()
2092 val = s->prop_adc.channels; in cs4297a_ioctl()
2112 stop_adc(s); in cs4297a_ioctl()
2113 s->dma_adc.ready = 0; in cs4297a_ioctl()
2118 s->prop_adc.fmt = val; in cs4297a_ioctl()
2119 s->prop_adc.fmt_original = s->prop_adc.fmt; in cs4297a_ioctl()
2122 stop_dac(s); in cs4297a_ioctl()
2123 s->dma_dac.ready = 0; in cs4297a_ioctl()
2128 s->prop_dac.fmt = val; in cs4297a_ioctl()
2129 s->prop_dac.fmt_original = s->prop_dac.fmt; in cs4297a_ioctl()
2133 val = s->prop_dac.fmt_original; in cs4297a_ioctl()
2135 val = s->prop_adc.fmt_original; in cs4297a_ioctl()
2149 if (file->f_mode & s->ena & FMODE_READ) in cs4297a_ioctl()
2151 if (file->f_mode & s->ena & FMODE_WRITE) in cs4297a_ioctl()
2160 if (!s->dma_adc.ready in cs4297a_ioctl()
2161 && (ret = prog_dmabuf_adc(s))) in cs4297a_ioctl()
2163 start_adc(s); in cs4297a_ioctl()
2165 stop_adc(s); in cs4297a_ioctl()
2169 if (!s->dma_dac.ready in cs4297a_ioctl()
2170 && (ret = prog_dmabuf_dac(s))) in cs4297a_ioctl()
2172 start_dac(s); in cs4297a_ioctl()
2174 stop_dac(s); in cs4297a_ioctl()
2181 if (!s->dma_dac.ready && (val = prog_dmabuf_dac(s))) in cs4297a_ioctl()
2183 spin_lock_irqsave(&s->lock, flags); in cs4297a_ioctl()
2184 cs4297a_update_ptr(s,CS_FALSE); in cs4297a_ioctl()
2185 abinfo.fragsize = s->dma_dac.fragsize; in cs4297a_ioctl()
2186 if (s->dma_dac.mapped) in cs4297a_ioctl()
2187 abinfo.bytes = s->dma_dac.sbufsz; in cs4297a_ioctl()
2190 s->dma_dac.sbufsz - s->dma_dac.count; in cs4297a_ioctl()
2191 abinfo.fragstotal = s->dma_dac.numfrag; in cs4297a_ioctl()
2192 abinfo.fragments = abinfo.bytes >> s->dma_dac.fragshift; in cs4297a_ioctl()
2197 spin_unlock_irqrestore(&s->lock, flags); in cs4297a_ioctl()
2204 if (!s->dma_adc.ready && (val = prog_dmabuf_adc(s))) in cs4297a_ioctl()
2206 spin_lock_irqsave(&s->lock, flags); in cs4297a_ioctl()
2207 cs4297a_update_ptr(s,CS_FALSE); in cs4297a_ioctl()
2208 if (s->conversion) { in cs4297a_ioctl()
2209 abinfo.fragsize = s->dma_adc.fragsize / 2; in cs4297a_ioctl()
2210 abinfo.bytes = s->dma_adc.count / 2; in cs4297a_ioctl()
2211 abinfo.fragstotal = s->dma_adc.numfrag; in cs4297a_ioctl()
2213 abinfo.bytes >> (s->dma_adc.fragshift - 1); in cs4297a_ioctl()
2215 abinfo.fragsize = s->dma_adc.fragsize; in cs4297a_ioctl()
2216 abinfo.bytes = s->dma_adc.count; in cs4297a_ioctl()
2217 abinfo.fragstotal = s->dma_adc.numfrag; in cs4297a_ioctl()
2219 abinfo.bytes >> s->dma_adc.fragshift; in cs4297a_ioctl()
2221 spin_unlock_irqrestore(&s->lock, flags); in cs4297a_ioctl()
2234 if(!s->dma_dac.ready && prog_dmabuf_dac(s)) in cs4297a_ioctl()
2236 spin_lock_irqsave(&s->lock, flags); in cs4297a_ioctl()
2237 cs4297a_update_ptr(s,CS_FALSE); in cs4297a_ioctl()
2238 val = s->dma_dac.count; in cs4297a_ioctl()
2239 spin_unlock_irqrestore(&s->lock, flags); in cs4297a_ioctl()
2245 if(!s->dma_adc.ready && prog_dmabuf_adc(s)) in cs4297a_ioctl()
2247 spin_lock_irqsave(&s->lock, flags); in cs4297a_ioctl()
2248 cs4297a_update_ptr(s,CS_FALSE); in cs4297a_ioctl()
2249 cinfo.bytes = s->dma_adc.total_bytes; in cs4297a_ioctl()
2250 if (s->dma_adc.mapped) { in cs4297a_ioctl()
2252 (cinfo.bytes >> s->dma_adc.fragshift) - in cs4297a_ioctl()
2253 s->dma_adc.blocks; in cs4297a_ioctl()
2254 s->dma_adc.blocks = in cs4297a_ioctl()
2255 cinfo.bytes >> s->dma_adc.fragshift; in cs4297a_ioctl()
2257 if (s->conversion) { in cs4297a_ioctl()
2259 s->dma_adc.count / in cs4297a_ioctl()
2260 2 >> (s->dma_adc.fragshift - 1); in cs4297a_ioctl()
2263 s->dma_adc.count >> s->dma_adc. in cs4297a_ioctl()
2266 if (s->conversion) in cs4297a_ioctl()
2267 cinfo.ptr = s->dma_adc.hwptr / 2; in cs4297a_ioctl()
2269 cinfo.ptr = s->dma_adc.hwptr; in cs4297a_ioctl()
2270 if (s->dma_adc.mapped) in cs4297a_ioctl()
2271 s->dma_adc.count &= s->dma_adc.fragsize - 1; in cs4297a_ioctl()
2272 spin_unlock_irqrestore(&s->lock, flags); in cs4297a_ioctl()
2278 if(!s->dma_dac.ready && prog_dmabuf_dac(s)) in cs4297a_ioctl()
2280 spin_lock_irqsave(&s->lock, flags); in cs4297a_ioctl()
2281 cs4297a_update_ptr(s,CS_FALSE); in cs4297a_ioctl()
2282 cinfo.bytes = s->dma_dac.total_bytes; in cs4297a_ioctl()
2283 if (s->dma_dac.mapped) { in cs4297a_ioctl()
2285 (cinfo.bytes >> s->dma_dac.fragshift) - in cs4297a_ioctl()
2286 s->dma_dac.blocks; in cs4297a_ioctl()
2287 s->dma_dac.blocks = in cs4297a_ioctl()
2288 cinfo.bytes >> s->dma_dac.fragshift; in cs4297a_ioctl()
2291 s->dma_dac.count >> s->dma_dac.fragshift; in cs4297a_ioctl()
2293 cinfo.ptr = s->dma_dac.hwptr; in cs4297a_ioctl()
2294 if (s->dma_dac.mapped) in cs4297a_ioctl()
2295 s->dma_dac.count &= s->dma_dac.fragsize - 1; in cs4297a_ioctl()
2296 spin_unlock_irqrestore(&s->lock, flags); in cs4297a_ioctl()
2301 if ((val = prog_dmabuf_dac(s))) in cs4297a_ioctl()
2303 return put_user(s->dma_dac.fragsize, (int *) arg); in cs4297a_ioctl()
2305 if ((val = prog_dmabuf_adc(s))) in cs4297a_ioctl()
2307 if (s->conversion) in cs4297a_ioctl()
2308 return put_user(s->dma_adc.fragsize / 2, in cs4297a_ioctl()
2311 return put_user(s->dma_adc.fragsize, (int *) arg); in cs4297a_ioctl()
2319 if ((file->f_mode & FMODE_READ && s->dma_adc.subdivision) in cs4297a_ioctl()
2321 && s->dma_dac.subdivision)) return -EINVAL; in cs4297a_ioctl()
2327 s->dma_adc.subdivision = val; in cs4297a_ioctl()
2329 s->dma_dac.subdivision = val; in cs4297a_ioctl()
2334 return put_user(s->prop_adc.rate, (int *) arg); in cs4297a_ioctl()
2336 return put_user(s->prop_dac.rate, (int *) arg); in cs4297a_ioctl()
2340 return put_user(s->prop_adc.channels, (int *) arg); in cs4297a_ioctl()
2342 return put_user(s->prop_dac.channels, (int *) arg); in cs4297a_ioctl()
2348 (s->prop_adc. in cs4297a_ioctl()
2354 (s->prop_dac. in cs4297a_ioctl()
2363 return mixer_ioctl(s, cmd, arg); in cs4297a_ioctl()
2379 struct cs4297a_state *s = in cs4297a_release() local
2385 VALIDATE_STATE(s); in cs4297a_release()
2388 drain_dac(s, file->f_flags & O_NONBLOCK); in cs4297a_release()
2389 mutex_lock(&s->open_sem_dac); in cs4297a_release()
2390 stop_dac(s); in cs4297a_release()
2391 dealloc_dmabuf(s, &s->dma_dac); in cs4297a_release()
2392 s->open_mode &= ~FMODE_WRITE; in cs4297a_release()
2393 mutex_unlock(&s->open_sem_dac); in cs4297a_release()
2394 wake_up(&s->open_wait_dac); in cs4297a_release()
2397 drain_adc(s, file->f_flags & O_NONBLOCK); in cs4297a_release()
2398 mutex_lock(&s->open_sem_adc); in cs4297a_release()
2399 stop_adc(s); in cs4297a_release()
2400 dealloc_dmabuf(s, &s->dma_adc); in cs4297a_release()
2401 s->open_mode &= ~FMODE_READ; in cs4297a_release()
2402 mutex_unlock(&s->open_sem_adc); in cs4297a_release()
2403 wake_up(&s->open_wait_adc); in cs4297a_release()
2411 struct cs4297a_state *s=NULL; in cs4297a_locked_open() local
2422 s = list_entry(entry, struct cs4297a_state, list); in cs4297a_locked_open()
2424 if (!((s->dev_audio ^ minor) & ~0xf)) in cs4297a_locked_open()
2429 if (!s) { in cs4297a_locked_open()
2434 VALIDATE_STATE(s); in cs4297a_locked_open()
2435 file->private_data = s; in cs4297a_locked_open()
2450 mutex_lock(&s->open_sem_dac); in cs4297a_locked_open()
2451 while (s->open_mode & FMODE_WRITE) { in cs4297a_locked_open()
2453 mutex_unlock(&s->open_sem_dac); in cs4297a_locked_open()
2456 mutex_unlock(&s->open_sem_dac); in cs4297a_locked_open()
2457 oss_broken_sleep_on(&s->open_wait_dac, MAX_SCHEDULE_TIMEOUT); in cs4297a_locked_open()
2463 mutex_lock(&s->open_sem_dac); in cs4297a_locked_open()
2467 mutex_lock(&s->open_sem_adc); in cs4297a_locked_open()
2468 while (s->open_mode & FMODE_READ) { in cs4297a_locked_open()
2470 mutex_unlock(&s->open_sem_adc); in cs4297a_locked_open()
2473 mutex_unlock(&s->open_sem_adc); in cs4297a_locked_open()
2474 oss_broken_sleep_on(&s->open_wait_adc, MAX_SCHEDULE_TIMEOUT); in cs4297a_locked_open()
2480 mutex_lock(&s->open_sem_adc); in cs4297a_locked_open()
2483 s->open_mode |= file->f_mode & (FMODE_READ | FMODE_WRITE); in cs4297a_locked_open()
2485 s->prop_adc.fmt = AFMT_S16_BE; in cs4297a_locked_open()
2486 s->prop_adc.fmt_original = s->prop_adc.fmt; in cs4297a_locked_open()
2487 s->prop_adc.channels = 2; in cs4297a_locked_open()
2488 s->prop_adc.rate = 48000; in cs4297a_locked_open()
2489 s->conversion = 0; in cs4297a_locked_open()
2490 s->ena &= ~FMODE_READ; in cs4297a_locked_open()
2491 s->dma_adc.ossfragshift = s->dma_adc.ossmaxfrags = in cs4297a_locked_open()
2492 s->dma_adc.subdivision = 0; in cs4297a_locked_open()
2493 mutex_unlock(&s->open_sem_adc); in cs4297a_locked_open()
2495 if (prog_dmabuf_adc(s)) { in cs4297a_locked_open()
2503 s->prop_dac.fmt = AFMT_S16_BE; in cs4297a_locked_open()
2504 s->prop_dac.fmt_original = s->prop_dac.fmt; in cs4297a_locked_open()
2505 s->prop_dac.channels = 2; in cs4297a_locked_open()
2506 s->prop_dac.rate = 48000; in cs4297a_locked_open()
2507 s->conversion = 0; in cs4297a_locked_open()
2508 s->ena &= ~FMODE_WRITE; in cs4297a_locked_open()
2509 s->dma_dac.ossfragshift = s->dma_dac.ossmaxfrags = in cs4297a_locked_open()
2510 s->dma_dac.subdivision = 0; in cs4297a_locked_open()
2511 mutex_unlock(&s->open_sem_dac); in cs4297a_locked_open()
2513 if (prog_dmabuf_dac(s)) { in cs4297a_locked_open()
2553 struct cs4297a_state *s = (struct cs4297a_state *) dev_id; in cs4297a_interrupt() local
2578 s->stats.rx_ovrrn++; in cs4297a_interrupt()
2586 s->dma_adc.descrtab_phys) / sizeof(serdma_descr_t)); in cs4297a_interrupt()
2588 s->dma_adc.descrtab[i].descr_a &= ~M_DMA_SERRX_SOP; in cs4297a_interrupt()
2590 s->dma_adc.swptr = s->dma_adc.hwptr = newptr; in cs4297a_interrupt()
2591 s->dma_adc.count = 0; in cs4297a_interrupt()
2592 s->dma_adc.sb_swptr = s->dma_adc.sb_hwptr = s->dma_adc.sample_buf; in cs4297a_interrupt()
2596 spin_lock(&s->lock); in cs4297a_interrupt()
2597 cs4297a_update_ptr(s,CS_TRUE); in cs4297a_interrupt()
2598 spin_unlock(&s->lock); in cs4297a_interrupt()
2624 struct cs4297a_state *s; in cs4297a_init() local
2660 if (!(s = kzalloc(sizeof(struct cs4297a_state), GFP_KERNEL))) { in cs4297a_init()
2665 s->magic = CS4297a_MAGIC; in cs4297a_init()
2666 init_waitqueue_head(&s->dma_adc.wait); in cs4297a_init()
2667 init_waitqueue_head(&s->dma_dac.wait); in cs4297a_init()
2668 init_waitqueue_head(&s->dma_adc.reg_wait); in cs4297a_init()
2669 init_waitqueue_head(&s->dma_dac.reg_wait); in cs4297a_init()
2670 init_waitqueue_head(&s->open_wait); in cs4297a_init()
2671 init_waitqueue_head(&s->open_wait_adc); in cs4297a_init()
2672 init_waitqueue_head(&s->open_wait_dac); in cs4297a_init()
2673 mutex_init(&s->open_sem_adc); in cs4297a_init()
2674 mutex_init(&s->open_sem_dac); in cs4297a_init()
2675 spin_lock_init(&s->lock); in cs4297a_init()
2677 s->irq = K_INT_SER_1; in cs4297a_init()
2680 (s->irq, cs4297a_interrupt, 0, "Crystal CS4297a", s)) { in cs4297a_init()
2682 printk(KERN_ERR "cs4297a: irq %u in use\n", s->irq)); in cs4297a_init()
2685 if ((s->dev_audio = register_sound_dsp(&cs4297a_audio_fops, -1)) < in cs4297a_init()
2691 if ((s->dev_mixer = register_sound_mixer(&cs4297a_mixer_fops, -1)) < in cs4297a_init()
2698 if (ser_init(s) || dma_init(s)) { in cs4297a_init()
2706 rval = cs4297a_read_ac97(s, AC97_POWER_CONTROL, &pwr); in cs4297a_init()
2716 mixer_ioctl(s, SOUND_MIXER_WRITE_RECSRC, (unsigned long) &val); in cs4297a_init()
2719 mixer_ioctl(s, initvol[i].mixch, (unsigned long) &val); in cs4297a_init()
2724 cs4297a_write_ac97(s, 0x02, 0x0808); in cs4297a_init()
2725 cs4297a_write_ac97(s, 0x18, 0x0808); in cs4297a_init()
2729 list_add(&s->list, &cs4297a_devs); in cs4297a_init()
2731 cs4297a_read_ac97(s, AC97_VENDOR_ID1, &id); in cs4297a_init()
2746 unregister_sound_mixer(s->dev_mixer); in cs4297a_init()
2748 unregister_sound_dsp(s->dev_audio); in cs4297a_init()
2750 free_irq(s->irq, s); in cs4297a_init()
2752 kfree(s); in cs4297a_init()