Lines Matching refs:outb

214 		outb(((unsigned char) (reg & 0xff) | devc->MCE_bit), io_Index_Addr(devc));  in ad_read()
223 outb(((unsigned char) (23 & 0xff) | devc->MCE_bit), io_Index_Addr(devc)); in ad_read()
224 outb(((unsigned char) (xra & 0xff)), io_Indexed_Data(devc)); in ad_read()
240 outb(((unsigned char) (reg & 0xff) | devc->MCE_bit), io_Index_Addr(devc)); in ad_write()
241 outb(((unsigned char) (data & 0xff)), io_Indexed_Data(devc)); in ad_write()
249 outb(((unsigned char) (23 & 0xff) | devc->MCE_bit), io_Index_Addr(devc)); in ad_write()
250 outb(((unsigned char) (xra & 0xff)), io_Indexed_Data(devc)); in ad_write()
251 outb((unsigned char) (data & 0xff), io_Indexed_Data(devc)); in ad_write()
320 outb((devc->MCE_bit), io_Index_Addr(devc)); in ad_enter_MCE()
335 outb((0x00), io_Index_Addr(devc)); /* Clear the MCE bit */ in ad_leave_MCE()
341 outb((0x00), io_Index_Addr(devc)); /* Clear the MCE bit */ in ad_leave_MCE()
1349 outb(0, io_Status(devc)); /* Clear interrupt status */ in ad1848_halt_input()
1350 outb(0, io_Status(devc)); /* Clear interrupt status */ in ad1848_halt_input()
1385 outb((0), io_Status(devc)); /* Clear interrupt status */ in ad1848_halt_output()
1386 outb((0), io_Status(devc)); /* Clear interrupt status */ in ad1848_halt_output()
1521 outb((0), io_Status(devc)); /* Clear pending interrupts */ in ad1848_init_hw()
2215 outb((0), io_Status(devc)); /* Clear interrupt status */ in adintr()
2227 outb(11, 0xe0e); in adintr()
2229 outb((~c930_stat), 0xe0f); in adintr()
2289 outb(0x10, 0xc44); in init_deskpro_m()
2290 outb(0x40, 0xc45); in init_deskpro_m()
2291 outb(0x00, 0xc46); in init_deskpro_m()
2292 outb(0xe8, 0xc47); in init_deskpro_m()
2293 outb(0x14, 0xc44); in init_deskpro_m()
2294 outb(0x40, 0xc45); in init_deskpro_m()
2295 outb(0x00, 0xc46); in init_deskpro_m()
2296 outb(0xe8, 0xc47); in init_deskpro_m()
2297 outb(0x10, 0xc44); in init_deskpro_m()
2316 outb((tmp | 0x04), 0xc44); /* Select bank 1 */ in init_deskpro()
2356 outb((tmp & ~0x04), 0xc44); in init_deskpro()
2358 outb((tmp | 0x04), 0xc44); in init_deskpro()
2383 outb((tmp & ~0x04), 0xc44); /* Write to bank=0 */ in init_deskpro()
2388 outb((tmp & ~0x04), 0xc44); /* Select bank=0 */ in init_deskpro()
2390 outb((tmp | 0x04), 0xc44); /* Select bank=1 */ in init_deskpro()
2407 outb((tmp & ~0x04), 0xc44); /* Select bank=0 */ in init_deskpro()
2409 outb((tmp | 0x04), 0xc44); /* Select bank=1 */ in init_deskpro()
2413 outb((tmp & ~0x04), 0xc44); /* Select bank=0 */ in init_deskpro()
2414 outb((0x88), 0xc45); /* FM base 7:0 = 0x88 */ in init_deskpro()
2415 outb((tmp | 0x04), 0xc44); /* Select bank=1 */ in init_deskpro()
2416 outb((0x10), 0xc45); /* MSS ID = 0x10 (MSS port returns 0x04) */ in init_deskpro()
2421 outb((tmp & ~0x04), 0xc44); /* Select bank=0 */ in init_deskpro()
2423 outb((tmp | 0x04), 0xc44); /* Select bank=1 */ in init_deskpro()
2438 outb((tmp & ~0x04), 0xc44); /* Select bank=0 */ in init_deskpro()
2440 outb((tmp | 0x04), 0xc44); /* Select bank=1 */ in init_deskpro()
2444 outb((tmp & ~0x04), 0xc44); /* Select bank=0 */ in init_deskpro()
2445 outb((0x03), 0xc46); /* FM base 15:8 = 0x03 */ in init_deskpro()
2446 outb((tmp | 0x04), 0xc44); /* Select bank=1 */ in init_deskpro()
2447 outb((0x11), 0xc46); /* ASIC ID = 0x11 */ in init_deskpro()
2452 outb((tmp & ~0x04), 0xc44); /* Select bank=0 */ in init_deskpro()
2454 outb((tmp | 0x04), 0xc44); /* Select bank=1 */ in init_deskpro()
2468 outb((tmp & ~0x04), 0xc44); /* Select bank=0 */ in init_deskpro()
2470 outb((tmp | 0x04), 0xc44); /* Select bank=1 */ in init_deskpro()
2474 outb((tmp & ~0x04), 0xc44); /* Select bank=0 */ in init_deskpro()
2475 outb((0x7c), 0xc47); /* FM decode enable bits = 0x7c */ in init_deskpro()
2476 outb((tmp | 0x04), 0xc44); /* Select bank=1 */ in init_deskpro()
2477 outb((0x00), 0xc47); /* Reserved bank1 = 0x00 */ in init_deskpro()
2482 outb((tmp & ~0x04), 0xc44); /* Select bank=0 */ in init_deskpro()
2484 outb((tmp | 0x04), 0xc44); /* Select bank=1 */ in init_deskpro()
2496 outb((0x80), 0xc6f); in init_deskpro()
2632 outb((bits | 0x40), config_port); in attach_ms_sound()
2671 outb((bits | dma_bits[dma] | dma2_bit), config_port); /* Write IRQ+DMA setup */ in attach_ms_sound()