228 TGA_WRITE_REG(struct tga_par *par, u32 v, u32 r)  in TGA_WRITE_REG()  argument
230 	writel(v, par->tga_regs_base +r);  in TGA_WRITE_REG()
234 TGA_READ_REG(struct tga_par *par, u32 r)  in TGA_READ_REG()  argument
236 	return readl(par->tga_regs_base +r);  in TGA_READ_REG()
240 BT485_WRITE(struct tga_par *par, u8 v, u8 r)  in BT485_WRITE()  argument
242 	TGA_WRITE_REG(par, r, TGA_RAMDAC_SETUP_REG);  in BT485_WRITE()
243 	TGA_WRITE_REG(par, v | (r << 8), TGA_RAMDAC_REG);  in BT485_WRITE()
247 BT463_LOAD_ADDR(struct tga_par *par, u16 a)  in BT463_LOAD_ADDR()  argument
249 	TGA_WRITE_REG(par, BT463_ADDR_LO<<2, TGA_RAMDAC_SETUP_REG);  in BT463_LOAD_ADDR()
250 	TGA_WRITE_REG(par, (BT463_ADDR_LO<<10) | (a & 0xff), TGA_RAMDAC_REG);  in BT463_LOAD_ADDR()
251 	TGA_WRITE_REG(par, BT463_ADDR_HI<<2, TGA_RAMDAC_SETUP_REG);  in BT463_LOAD_ADDR()
252 	TGA_WRITE_REG(par, (BT463_ADDR_HI<<10) | (a >> 8), TGA_RAMDAC_REG);  in BT463_LOAD_ADDR()
256 BT463_WRITE(struct tga_par *par, u32 m, u16 a, u8 v)  in BT463_WRITE()  argument
258 	BT463_LOAD_ADDR(par, a);  in BT463_WRITE()
259 	TGA_WRITE_REG(par, m << 2, TGA_RAMDAC_SETUP_REG);  in BT463_WRITE()
260 	TGA_WRITE_REG(par, m << 10 | v, TGA_RAMDAC_REG);  in BT463_WRITE()
264 BT459_LOAD_ADDR(struct tga_par *par, u16 a)  in BT459_LOAD_ADDR()  argument
266 	TGA_WRITE_REG(par, BT459_ADDR_LO << 2, TGA_RAMDAC_SETUP_REG);  in BT459_LOAD_ADDR()
267 	TGA_WRITE_REG(par, a & 0xff, TGA_RAMDAC_REG);  in BT459_LOAD_ADDR()
268 	TGA_WRITE_REG(par, BT459_ADDR_HI << 2, TGA_RAMDAC_SETUP_REG);  in BT459_LOAD_ADDR()
269 	TGA_WRITE_REG(par, a >> 8, TGA_RAMDAC_REG);  in BT459_LOAD_ADDR()
273 BT459_WRITE(struct tga_par *par, u32 m, u16 a, u8 v)  in BT459_WRITE()  argument
275 	BT459_LOAD_ADDR(par, a);  in BT459_WRITE()
276 	TGA_WRITE_REG(par, m << 2, TGA_RAMDAC_SETUP_REG);  in BT459_WRITE()
277 	TGA_WRITE_REG(par, v, TGA_RAMDAC_REG);  in BT459_WRITE()