101 #define rtsx_pci_writel(pcr, reg, value) \  argument
102 	iowrite32(value, (pcr)->remap_addr + reg)
103 #define rtsx_pci_readl(pcr, reg) \  argument
104 	ioread32((pcr)->remap_addr + reg)
105 #define rtsx_pci_writew(pcr, reg, value) \  argument
106 	iowrite16(value, (pcr)->remap_addr + reg)
107 #define rtsx_pci_readw(pcr, reg) \  argument
108 	ioread16((pcr)->remap_addr + reg)
109 #define rtsx_pci_writeb(pcr, reg, value) \  argument
110 	iowrite8(value, (pcr)->remap_addr + reg)
111 #define rtsx_pci_readb(pcr, reg) \  argument
112 	ioread8((pcr)->remap_addr + reg)
114 #define rtsx_pci_read_config_byte(pcr, where, val) \  argument
115 	pci_read_config_byte((pcr)->pci, where, val)
117 #define rtsx_pci_write_config_byte(pcr, where, val) \  argument
118 	pci_write_config_byte((pcr)->pci, where, val)
120 #define rtsx_pci_read_config_dword(pcr, where, val) \  argument
121 	pci_read_config_dword((pcr)->pci, where, val)
123 #define rtsx_pci_write_config_dword(pcr, where, val) \  argument
124 	pci_write_config_dword((pcr)->pci, where, val)
851 #define rtsx_pci_init_cmd(pcr)		((pcr)->ci = 0)  argument
856 	struct rtsx_pcr			*pcr;  member
860 	int (*write_phy)(struct rtsx_pcr *pcr, u8 addr, u16 val);
861 	int (*read_phy)(struct rtsx_pcr *pcr, u8 addr, u16 *val);
862 	int		(*extra_init_hw)(struct rtsx_pcr *pcr);
863 	int		(*optimize_phy)(struct rtsx_pcr *pcr);
864 	int		(*turn_on_led)(struct rtsx_pcr *pcr);
865 	int		(*turn_off_led)(struct rtsx_pcr *pcr);
866 	int		(*enable_auto_blink)(struct rtsx_pcr *pcr);
867 	int		(*disable_auto_blink)(struct rtsx_pcr *pcr);
868 	int		(*card_power_on)(struct rtsx_pcr *pcr, int card);
869 	int		(*card_power_off)(struct rtsx_pcr *pcr, int card);
870 	int		(*switch_output_voltage)(struct rtsx_pcr *pcr,
872 	unsigned int	(*cd_deglitch)(struct rtsx_pcr *pcr);
874 	void		(*fetch_vendor_settings)(struct rtsx_pcr *pcr);
875 	void		(*force_power_down)(struct rtsx_pcr *pcr, u8 pm_state);
962 #define CHK_PCI_PID(pcr, pid)		((pcr)->pci->device == (pid))  argument
963 #define PCI_VID(pcr)			((pcr)->pci->vendor)  argument
964 #define PCI_PID(pcr)			((pcr)->pci->device)  argument
965 #define is_version(pcr, pid, ver)				\  argument
966 	(CHK_PCI_PID(pcr, pid) && (pcr)->ic_version == (ver))
967 #define pcr_dbg(pcr, fmt, arg...)				\  argument
968 	dev_dbg(&(pcr)->pci->dev, fmt, ##arg)
973 #define SDR104_TX_PHASE(pcr)		SDR104_PHASE((pcr)->tx_initial_phase)  argument
974 #define SDR50_TX_PHASE(pcr)		SDR50_PHASE((pcr)->tx_initial_phase)  argument
975 #define DDR50_TX_PHASE(pcr)		DDR50_PHASE((pcr)->tx_initial_phase)  argument
976 #define SDR104_RX_PHASE(pcr)		SDR104_PHASE((pcr)->rx_initial_phase)  argument
977 #define SDR50_RX_PHASE(pcr)		SDR50_PHASE((pcr)->rx_initial_phase)  argument
978 #define DDR50_RX_PHASE(pcr)		DDR50_PHASE((pcr)->rx_initial_phase)  argument
982 void rtsx_pci_start_run(struct rtsx_pcr *pcr);
983 int rtsx_pci_write_register(struct rtsx_pcr *pcr, u16 addr, u8 mask, u8 data);
984 int rtsx_pci_read_register(struct rtsx_pcr *pcr, u16 addr, u8 *data);
985 int rtsx_pci_write_phy_register(struct rtsx_pcr *pcr, u8 addr, u16 val);
986 int rtsx_pci_read_phy_register(struct rtsx_pcr *pcr, u8 addr, u16 *val);
987 void rtsx_pci_stop_cmd(struct rtsx_pcr *pcr);
988 void rtsx_pci_add_cmd(struct rtsx_pcr *pcr,
990 void rtsx_pci_send_cmd_no_wait(struct rtsx_pcr *pcr);
991 int rtsx_pci_send_cmd(struct rtsx_pcr *pcr, int timeout);
992 int rtsx_pci_transfer_data(struct rtsx_pcr *pcr, struct scatterlist *sglist,
994 int rtsx_pci_dma_map_sg(struct rtsx_pcr *pcr, struct scatterlist *sglist,
996 void rtsx_pci_dma_unmap_sg(struct rtsx_pcr *pcr, struct scatterlist *sglist,
998 int rtsx_pci_dma_transfer(struct rtsx_pcr *pcr, struct scatterlist *sglist,
1000 int rtsx_pci_read_ppbuf(struct rtsx_pcr *pcr, u8 *buf, int buf_len);
1001 int rtsx_pci_write_ppbuf(struct rtsx_pcr *pcr, u8 *buf, int buf_len);
1002 int rtsx_pci_card_pull_ctl_enable(struct rtsx_pcr *pcr, int card);
1003 int rtsx_pci_card_pull_ctl_disable(struct rtsx_pcr *pcr, int card);
1004 int rtsx_pci_switch_clock(struct rtsx_pcr *pcr, unsigned int card_clock,
1006 int rtsx_pci_card_power_on(struct rtsx_pcr *pcr, int card);
1007 int rtsx_pci_card_power_off(struct rtsx_pcr *pcr, int card);
1008 int rtsx_pci_card_exclusive_check(struct rtsx_pcr *pcr, int card);
1009 int rtsx_pci_switch_output_voltage(struct rtsx_pcr *pcr, u8 voltage);
1010 unsigned int rtsx_pci_card_exist(struct rtsx_pcr *pcr);
1011 void rtsx_pci_complete_unfinished_transfer(struct rtsx_pcr *pcr);
1013 static inline u8 *rtsx_pci_get_cmd_data(struct rtsx_pcr *pcr)  in rtsx_pci_get_cmd_data()  argument
1015 	return (u8 *)(pcr->host_cmds_ptr);  in rtsx_pci_get_cmd_data()
1018 static inline int rtsx_pci_update_cfg_byte(struct rtsx_pcr *pcr, int addr,  in rtsx_pci_update_cfg_byte()  argument
1024 	err = pci_read_config_byte(pcr->pci, addr, &val);  in rtsx_pci_update_cfg_byte()
1027 	return pci_write_config_byte(pcr->pci, addr, (val & mask) | append);  in rtsx_pci_update_cfg_byte()
1030 static inline void rtsx_pci_write_be32(struct rtsx_pcr *pcr, u16 reg, u32 val)  in rtsx_pci_write_be32()  argument
1032 	rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, reg,     0xFF, val >> 24);  in rtsx_pci_write_be32()
1033 	rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, reg + 1, 0xFF, val >> 16);  in rtsx_pci_write_be32()
1034 	rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, reg + 2, 0xFF, val >> 8);  in rtsx_pci_write_be32()
1035 	rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, reg + 3, 0xFF, val);  in rtsx_pci_write_be32()
1038 static inline int rtsx_pci_update_phy(struct rtsx_pcr *pcr, u8 addr,  in rtsx_pci_update_phy()  argument
1044 	err = rtsx_pci_read_phy_register(pcr, addr, &val);  in rtsx_pci_update_phy()
1048 	return rtsx_pci_write_phy_register(pcr, addr, (val & mask) | append);  in rtsx_pci_update_phy()