653 #define bcma_cc_read32(cc, offset) \  argument
654 	bcma_read32((cc)->core, offset)
655 #define bcma_cc_write32(cc, offset, val) \  argument
656 	bcma_write32((cc)->core, offset, val)
658 #define bcma_cc_mask32(cc, offset, mask) \  argument
659 	bcma_cc_write32(cc, offset, bcma_cc_read32(cc, offset) & (mask))
660 #define bcma_cc_set32(cc, offset, set) \  argument
661 	bcma_cc_write32(cc, offset, bcma_cc_read32(cc, offset) | (set))
662 #define bcma_cc_maskset32(cc, offset, mask, set) \  argument
663 	bcma_cc_write32(cc, offset, (bcma_cc_read32(cc, offset) & (mask)) | (set))
665 extern u32 bcma_chipco_watchdog_timer_set(struct bcma_drv_cc *cc, u32 ticks);
667 extern u32 bcma_chipco_get_alp_clock(struct bcma_drv_cc *cc);
669 void bcma_chipco_irq_mask(struct bcma_drv_cc *cc, u32 mask, u32 value);
671 u32 bcma_chipco_irq_status(struct bcma_drv_cc *cc, u32 mask);
674 u32 bcma_chipco_gpio_in(struct bcma_drv_cc *cc, u32 mask);
675 u32 bcma_chipco_gpio_out(struct bcma_drv_cc *cc, u32 mask, u32 value);
676 u32 bcma_chipco_gpio_outen(struct bcma_drv_cc *cc, u32 mask, u32 value);
677 u32 bcma_chipco_gpio_control(struct bcma_drv_cc *cc, u32 mask, u32 value);
678 u32 bcma_chipco_gpio_intmask(struct bcma_drv_cc *cc, u32 mask, u32 value);
679 u32 bcma_chipco_gpio_polarity(struct bcma_drv_cc *cc, u32 mask, u32 value);
680 u32 bcma_chipco_gpio_pullup(struct bcma_drv_cc *cc, u32 mask, u32 value);
681 u32 bcma_chipco_gpio_pulldown(struct bcma_drv_cc *cc, u32 mask, u32 value);
684 extern void bcma_chipco_pll_write(struct bcma_drv_cc *cc, u32 offset,
686 extern void bcma_chipco_pll_maskset(struct bcma_drv_cc *cc, u32 offset,
688 extern void bcma_chipco_chipctl_maskset(struct bcma_drv_cc *cc,
690 extern void bcma_chipco_regctl_maskset(struct bcma_drv_cc *cc,
692 extern void bcma_pmu_spuravoid_pllupdate(struct bcma_drv_cc *cc, int spuravoid);
694 extern u32 bcma_pmu_get_bus_clock(struct bcma_drv_cc *cc);