911 	temp_ctl = ioread32be(bridge->base + TSI148_LCSR_OT[i] +  in tsi148_master_set()
914 	iowrite32be(temp_ctl, bridge->base + TSI148_LCSR_OT[i] +  in tsi148_master_set()
1016 	iowrite32be(pci_base_high, bridge->base + TSI148_LCSR_OT[i] +  in tsi148_master_set()
1018 	iowrite32be(pci_base_low, bridge->base + TSI148_LCSR_OT[i] +  in tsi148_master_set()
1020 	iowrite32be(pci_bound_high, bridge->base + TSI148_LCSR_OT[i] +  in tsi148_master_set()
1022 	iowrite32be(pci_bound_low, bridge->base + TSI148_LCSR_OT[i] +  in tsi148_master_set()
1024 	iowrite32be(vme_offset_high, bridge->base + TSI148_LCSR_OT[i] +  in tsi148_master_set()
1026 	iowrite32be(vme_offset_low, bridge->base + TSI148_LCSR_OT[i] +  in tsi148_master_set()
1030 	iowrite32be(temp_ctl, bridge->base + TSI148_LCSR_OT[i] +  in tsi148_master_set()
1036 	iowrite32be(temp_ctl, bridge->base + TSI148_LCSR_OT[i] +  in tsi148_master_set()
1073 	ctl = ioread32be(bridge->base + TSI148_LCSR_OT[i] +  in __tsi148_master_get()
1076 	pci_base_high = ioread32be(bridge->base + TSI148_LCSR_OT[i] +  in __tsi148_master_get()
1078 	pci_base_low = ioread32be(bridge->base + TSI148_LCSR_OT[i] +  in __tsi148_master_get()
1080 	pci_bound_high = ioread32be(bridge->base + TSI148_LCSR_OT[i] +  in __tsi148_master_get()
1082 	pci_bound_low = ioread32be(bridge->base + TSI148_LCSR_OT[i] +  in __tsi148_master_get()
1084 	vme_offset_high = ioread32be(bridge->base + TSI148_LCSR_OT[i] +  in __tsi148_master_get()
1086 	vme_offset_low = ioread32be(bridge->base + TSI148_LCSR_OT[i] +  in __tsi148_master_get()
1392 	pci_addr_high = ioread32be(bridge->base + TSI148_LCSR_OT[i] +  in tsi148_master_rmw()
1394 	pci_addr_low = ioread32be(bridge->base + TSI148_LCSR_OT[i] +  in tsi148_master_rmw()
2612 		iowrite32be(0, bridge->base + TSI148_LCSR_OT[i] +  in tsi148_remove()