545 	temp_ctl = ioread32be(bridge->base + TSI148_LCSR_IT[i] +  in tsi148_slave_set()
548 	iowrite32be(temp_ctl, bridge->base + TSI148_LCSR_IT[i] +  in tsi148_slave_set()
552 	iowrite32be(vme_base_high, bridge->base + TSI148_LCSR_IT[i] +  in tsi148_slave_set()
554 	iowrite32be(vme_base_low, bridge->base + TSI148_LCSR_IT[i] +  in tsi148_slave_set()
556 	iowrite32be(vme_bound_high, bridge->base + TSI148_LCSR_IT[i] +  in tsi148_slave_set()
558 	iowrite32be(vme_bound_low, bridge->base + TSI148_LCSR_IT[i] +  in tsi148_slave_set()
560 	iowrite32be(pci_offset_high, bridge->base + TSI148_LCSR_IT[i] +  in tsi148_slave_set()
562 	iowrite32be(pci_offset_low, bridge->base + TSI148_LCSR_IT[i] +  in tsi148_slave_set()
607 	iowrite32be(temp_ctl, bridge->base + TSI148_LCSR_IT[i] +  in tsi148_slave_set()
613 	iowrite32be(temp_ctl, bridge->base + TSI148_LCSR_IT[i] +  in tsi148_slave_set()
638 	ctl = ioread32be(bridge->base + TSI148_LCSR_IT[i] +  in tsi148_slave_get()
641 	vme_base_high = ioread32be(bridge->base + TSI148_LCSR_IT[i] +  in tsi148_slave_get()
643 	vme_base_low = ioread32be(bridge->base + TSI148_LCSR_IT[i] +  in tsi148_slave_get()
645 	vme_bound_high = ioread32be(bridge->base + TSI148_LCSR_IT[i] +  in tsi148_slave_get()
647 	vme_bound_low = ioread32be(bridge->base + TSI148_LCSR_IT[i] +  in tsi148_slave_get()
649 	pci_offset_high = ioread32be(bridge->base + TSI148_LCSR_IT[i] +  in tsi148_slave_get()
651 	pci_offset_low = ioread32be(bridge->base + TSI148_LCSR_IT[i] +  in tsi148_slave_get()
2610 		iowrite32be(0, bridge->base + TSI148_LCSR_IT[i] +  in tsi148_remove()