Lines Matching refs:f
265 if (status.f.cmdfifo_avail >= entries) in w100_fifo_wait()
280 if (!status.f.gui_active) in w100fb_sync()
309 dp_cntl.f.dst_x_dir = 1; in w100_init_graphic_engine()
310 dp_cntl.f.dst_y_dir = 1; in w100_init_graphic_engine()
311 dp_cntl.f.src_x_dir = 1; in w100_init_graphic_engine()
312 dp_cntl.f.src_y_dir = 1; in w100_init_graphic_engine()
313 dp_cntl.f.dst_major_x = 1; in w100_init_graphic_engine()
314 dp_cntl.f.src_major_x = 1; in w100_init_graphic_engine()
318 gmc.f.gmc_src_pitch_offset_cntl = 1; in w100_init_graphic_engine()
319 gmc.f.gmc_dst_pitch_offset_cntl = 1; in w100_init_graphic_engine()
320 gmc.f.gmc_src_clipping = 1; in w100_init_graphic_engine()
321 gmc.f.gmc_dst_clipping = 1; in w100_init_graphic_engine()
322 gmc.f.gmc_brush_datatype = GMC_BRUSH_NONE; in w100_init_graphic_engine()
323 gmc.f.gmc_dst_datatype = 3; /* from DstType_16Bpp_444 */ in w100_init_graphic_engine()
324 gmc.f.gmc_src_datatype = SRC_DATATYPE_EQU_DST; in w100_init_graphic_engine()
325 gmc.f.gmc_byte_pix_order = 1; in w100_init_graphic_engine()
326 gmc.f.gmc_default_sel = 0; in w100_init_graphic_engine()
327 gmc.f.gmc_rop3 = ROP3_SRCCOPY; in w100_init_graphic_engine()
328 gmc.f.gmc_dp_src_source = DP_SRC_MEM_RECTANGULAR; in w100_init_graphic_engine()
329 gmc.f.gmc_clr_cmp_fcn_dis = 1; in w100_init_graphic_engine()
330 gmc.f.gmc_wr_msk_dis = 1; in w100_init_graphic_engine()
331 gmc.f.gmc_dp_op = DP_OP_ROP; in w100_init_graphic_engine()
335 dp_datatype.f.dp_dst_datatype = gmc.f.gmc_dst_datatype; in w100_init_graphic_engine()
336 dp_datatype.f.dp_brush_datatype = gmc.f.gmc_brush_datatype; in w100_init_graphic_engine()
337 dp_datatype.f.dp_src2_type = 0; in w100_init_graphic_engine()
338 dp_datatype.f.dp_src2_datatype = gmc.f.gmc_src_datatype; in w100_init_graphic_engine()
339 dp_datatype.f.dp_src_datatype = gmc.f.gmc_src_datatype; in w100_init_graphic_engine()
340 dp_datatype.f.dp_byte_pix_order = gmc.f.gmc_byte_pix_order; in w100_init_graphic_engine()
343 dp_mix.f.dp_src_source = gmc.f.gmc_dp_src_source; in w100_init_graphic_engine()
344 dp_mix.f.dp_src2_source = 1; in w100_init_graphic_engine()
345 dp_mix.f.dp_rop3 = gmc.f.gmc_rop3; in w100_init_graphic_engine()
346 dp_mix.f.dp_op = gmc.f.gmc_dp_op; in w100_init_graphic_engine()
364 gmc.f.gmc_rop3 = ROP3_PATCOPY; in w100fb_fillrect()
365 gmc.f.gmc_brush_datatype = GMC_BRUSH_SOLID_COLOR; in w100fb_fillrect()
392 gmc.f.gmc_rop3 = ROP3_SRCCOPY; in w100fb_copyarea()
393 gmc.f.gmc_brush_datatype = GMC_BRUSH_NONE; in w100fb_copyarea()
829 disp_db_buf_wr_cntl.f.db_buf_cntl = 0x1e; in w100_update_disable()
830 disp_db_buf_wr_cntl.f.update_db_buf = 0; in w100_update_disable()
831 disp_db_buf_wr_cntl.f.en_db_buf = 0; in w100_update_disable()
840 disp_db_buf_wr_cntl.f.db_buf_cntl = 0x1e; in w100_update_enable()
841 disp_db_buf_wr_cntl.f.update_db_buf = 1; in w100_update_enable()
842 disp_db_buf_wr_cntl.f.en_db_buf = 1; in w100_update_enable()
899 cif_write_dbg.f.dis_packer_ful_during_rbbm_timeout = 0; in w100_hw_init()
900 cif_write_dbg.f.en_dword_split_to_rbbm = 1; in w100_hw_init()
901 cif_write_dbg.f.dis_timeout_during_rbbm = 1; in w100_hw_init()
905 cif_read_dbg.f.dis_rd_same_byte_to_trig_fetch = 1; in w100_hw_init()
909 cif_cntl.f.dis_system_bits = 1; in w100_hw_init()
910 cif_cntl.f.dis_mr = 1; in w100_hw_init()
911 cif_cntl.f.en_wait_to_compensate_dq_prop_dly = 0; in w100_hw_init()
912 cif_cntl.f.intb_oe = 1; in w100_hw_init()
913 cif_cntl.f.interrupt_active_high = 1; in w100_hw_init()
918 intf_cntl.f.ad_inc_a = 1; in w100_hw_init()
919 intf_cntl.f.ad_inc_b = 1; in w100_hw_init()
920 intf_cntl.f.rd_data_rdy_a = 0; in w100_hw_init()
921 intf_cntl.f.rd_data_rdy_b = 0; in w100_hw_init()
925 cpu_default.f.access_ind_addr_a = 1; in w100_hw_init()
926 cpu_default.f.access_ind_addr_b = 1; in w100_hw_init()
927 cpu_default.f.access_scratch_reg = 1; in w100_hw_init()
928 cpu_default.f.transition_size = 0; in w100_hw_init()
935 cfgreg_base.f.cfgreg_base = W100_CFG_BASE; in w100_hw_init()
939 wrap_start_dir.f.start_addr = WRAP_BUF_BASE_VALUE >> 1; in w100_hw_init()
943 wrap_top_dir.f.top_addr = WRAP_BUF_TOP_VALUE >> 1; in w100_hw_init()
1043 clk_test_cntl.f.start_check_freq = 0x0; in w100_get_testcount()
1044 clk_test_cntl.f.testclk_sel = testclk_sel; in w100_get_testcount()
1045 clk_test_cntl.f.tstcount_rst = 0x1; /* set reset */ in w100_get_testcount()
1048 clk_test_cntl.f.tstcount_rst = 0x0; /* clear reset */ in w100_get_testcount()
1052 clk_test_cntl.f.start_check_freq = 0x1; in w100_get_testcount()
1060 clk_test_cntl.f.start_check_freq = 0x0; in w100_get_testcount()
1063 return clk_test_cntl.f.test_count; in w100_get_testcount()
1073 w100_pwr_state.pll_cntl.f.pll_pwdn = 0x0; /* power down */ in w100_pll_adjust()
1074 w100_pwr_state.pll_cntl.f.pll_reset = 0x0; /* not reset */ in w100_pll_adjust()
1075 w100_pwr_state.pll_cntl.f.pll_tcpoff = 0x1; /* Hi-Z */ in w100_pll_adjust()
1076 w100_pwr_state.pll_cntl.f.pll_pvg = 0x0; /* VCO gain = 0 */ in w100_pll_adjust()
1077 w100_pwr_state.pll_cntl.f.pll_vcofr = 0x0; /* VCO frequency range control = off */ in w100_pll_adjust()
1078 w100_pwr_state.pll_cntl.f.pll_ioffset = 0x0; /* current offset inside VCO = 0 */ in w100_pll_adjust()
1079 w100_pwr_state.pll_cntl.f.pll_ring_off = 0x0; in w100_pll_adjust()
1087 w100_pwr_state.pll_cntl.f.pll_dactal = 0xd; in w100_pll_adjust()
1093 w100_pwr_state.pll_cntl.f.pll_dactal = 0x7; in w100_pll_adjust()
1100 if ((w100_pwr_state.pll_cntl.f.pll_vcofr == 0x0) && in w100_pll_adjust()
1101 ((w100_pwr_state.pll_cntl.f.pll_pvg == 0x7) || in w100_pll_adjust()
1102 (w100_pwr_state.pll_cntl.f.pll_ioffset == 0x0))) { in w100_pll_adjust()
1104 w100_pwr_state.pll_cntl.f.pll_vcofr = 0x1; in w100_pll_adjust()
1105 w100_pwr_state.pll_cntl.f.pll_pvg = 0x0; in w100_pll_adjust()
1106 w100_pwr_state.pll_cntl.f.pll_ioffset = 0x0; in w100_pll_adjust()
1110 if ((w100_pwr_state.pll_cntl.f.pll_ioffset) < 0x3) { in w100_pll_adjust()
1111 w100_pwr_state.pll_cntl.f.pll_ioffset += 0x1; in w100_pll_adjust()
1112 } else if ((w100_pwr_state.pll_cntl.f.pll_pvg) < 0x7) { in w100_pll_adjust()
1113 w100_pwr_state.pll_cntl.f.pll_ioffset = 0x0; in w100_pll_adjust()
1114 w100_pwr_state.pll_cntl.f.pll_pvg += 0x1; in w100_pll_adjust()
1133 w100_pwr_state.pll_cntl.f.pll_dactal = 0xa; in w100_pll_calibration()
1139 w100_pwr_state.pll_cntl.f.pll_tcpoff = 0x0; /* normal */ in w100_pll_calibration()
1143 w100_pwr_state.pll_cntl.f.pll_dactal = 0x0; in w100_pll_calibration()
1160 w100_pwr_state.pwrmgt_cntl.f.pwm_fast_noml_hw_en = 0x0; /* disable fast to normal */ in w100_pll_set_clk()
1161 w100_pwr_state.pwrmgt_cntl.f.pwm_noml_fast_hw_en = 0x0; /* disable normal to fast */ in w100_pll_set_clk()
1166 w100_pwr_state.sclk_cntl.f.sclk_src_sel = CLK_SRC_XTAL; in w100_pll_set_clk()
1169 w100_pwr_state.pll_ref_fb_div.f.pll_ref_div = pll->M; in w100_pll_set_clk()
1170 w100_pwr_state.pll_ref_fb_div.f.pll_fb_div_int = pll->N_int; in w100_pll_set_clk()
1171 w100_pwr_state.pll_ref_fb_div.f.pll_fb_div_frac = pll->N_fac; in w100_pll_set_clk()
1172 w100_pwr_state.pll_ref_fb_div.f.pll_lock_time = pll->lock_time; in w100_pll_set_clk()
1175 w100_pwr_state.pwrmgt_cntl.f.pwm_mode_req = 0; in w100_pll_set_clk()
1182 w100_pwr_state.pwrmgt_cntl.f.pwm_fast_noml_hw_en = 0x1; /* reenable fast to normal */ in w100_pll_set_clk()
1183 w100_pwr_state.pwrmgt_cntl.f.pwm_noml_fast_hw_en = 0x1; /* reenable normal to fast */ in w100_pll_set_clk()
1207 w100_pwr_state.clk_pin_cntl.f.osc_en = 0x1; in w100_pwm_setup()
1208 w100_pwr_state.clk_pin_cntl.f.osc_gain = 0x1f; in w100_pwm_setup()
1209 w100_pwr_state.clk_pin_cntl.f.dont_use_xtalin = 0x0; in w100_pwm_setup()
1210 w100_pwr_state.clk_pin_cntl.f.xtalin_pm_en = 0x0; in w100_pwm_setup()
1211 w100_pwr_state.clk_pin_cntl.f.xtalin_dbl_en = par->mach->xtal_dbl ? 1 : 0; in w100_pwm_setup()
1212 w100_pwr_state.clk_pin_cntl.f.cg_debug = 0x0; in w100_pwm_setup()
1215 w100_pwr_state.sclk_cntl.f.sclk_src_sel = CLK_SRC_XTAL; in w100_pwm_setup()
1216 w100_pwr_state.sclk_cntl.f.sclk_post_div_fast = 0x0; /* Pfast = 1 */ in w100_pwm_setup()
1217 w100_pwr_state.sclk_cntl.f.sclk_clkon_hys = 0x3; in w100_pwm_setup()
1218 w100_pwr_state.sclk_cntl.f.sclk_post_div_slow = 0x0; /* Pslow = 1 */ in w100_pwm_setup()
1219 w100_pwr_state.sclk_cntl.f.disp_cg_ok2switch_en = 0x0; in w100_pwm_setup()
1220 w100_pwr_state.sclk_cntl.f.sclk_force_reg = 0x0; /* Dynamic */ in w100_pwm_setup()
1221 w100_pwr_state.sclk_cntl.f.sclk_force_disp = 0x0; /* Dynamic */ in w100_pwm_setup()
1222 w100_pwr_state.sclk_cntl.f.sclk_force_mc = 0x0; /* Dynamic */ in w100_pwm_setup()
1223 w100_pwr_state.sclk_cntl.f.sclk_force_extmc = 0x0; /* Dynamic */ in w100_pwm_setup()
1224 w100_pwr_state.sclk_cntl.f.sclk_force_cp = 0x0; /* Dynamic */ in w100_pwm_setup()
1225 w100_pwr_state.sclk_cntl.f.sclk_force_e2 = 0x0; /* Dynamic */ in w100_pwm_setup()
1226 w100_pwr_state.sclk_cntl.f.sclk_force_e3 = 0x0; /* Dynamic */ in w100_pwm_setup()
1227 w100_pwr_state.sclk_cntl.f.sclk_force_idct = 0x0; /* Dynamic */ in w100_pwm_setup()
1228 w100_pwr_state.sclk_cntl.f.sclk_force_bist = 0x0; /* Dynamic */ in w100_pwm_setup()
1229 w100_pwr_state.sclk_cntl.f.busy_extend_cp = 0x0; in w100_pwm_setup()
1230 w100_pwr_state.sclk_cntl.f.busy_extend_e2 = 0x0; in w100_pwm_setup()
1231 w100_pwr_state.sclk_cntl.f.busy_extend_e3 = 0x0; in w100_pwm_setup()
1232 w100_pwr_state.sclk_cntl.f.busy_extend_idct = 0x0; in w100_pwm_setup()
1235 w100_pwr_state.pclk_cntl.f.pclk_src_sel = CLK_SRC_XTAL; in w100_pwm_setup()
1236 w100_pwr_state.pclk_cntl.f.pclk_post_div = 0x1; /* P = 2 */ in w100_pwm_setup()
1237 w100_pwr_state.pclk_cntl.f.pclk_force_disp = 0x0; /* Dynamic */ in w100_pwm_setup()
1240 w100_pwr_state.pll_ref_fb_div.f.pll_ref_div = 0x0; /* M = 1 */ in w100_pwm_setup()
1241 w100_pwr_state.pll_ref_fb_div.f.pll_fb_div_int = 0x0; /* N = 1.0 */ in w100_pwm_setup()
1242 w100_pwr_state.pll_ref_fb_div.f.pll_fb_div_frac = 0x0; in w100_pwm_setup()
1243 w100_pwr_state.pll_ref_fb_div.f.pll_reset_time = 0x5; in w100_pwm_setup()
1244 w100_pwr_state.pll_ref_fb_div.f.pll_lock_time = 0xff; in w100_pwm_setup()
1247 w100_pwr_state.pll_cntl.f.pll_pwdn = 0x1; in w100_pwm_setup()
1248 w100_pwr_state.pll_cntl.f.pll_reset = 0x1; in w100_pwm_setup()
1249 w100_pwr_state.pll_cntl.f.pll_pm_en = 0x0; in w100_pwm_setup()
1250 w100_pwr_state.pll_cntl.f.pll_mode = 0x0; /* uses VCO clock */ in w100_pwm_setup()
1251 w100_pwr_state.pll_cntl.f.pll_refclk_sel = 0x0; in w100_pwm_setup()
1252 w100_pwr_state.pll_cntl.f.pll_fbclk_sel = 0x0; in w100_pwm_setup()
1253 w100_pwr_state.pll_cntl.f.pll_tcpoff = 0x0; in w100_pwm_setup()
1254 w100_pwr_state.pll_cntl.f.pll_pcp = 0x4; in w100_pwm_setup()
1255 w100_pwr_state.pll_cntl.f.pll_pvg = 0x0; in w100_pwm_setup()
1256 w100_pwr_state.pll_cntl.f.pll_vcofr = 0x0; in w100_pwm_setup()
1257 w100_pwr_state.pll_cntl.f.pll_ioffset = 0x0; in w100_pwm_setup()
1258 w100_pwr_state.pll_cntl.f.pll_pecc_mode = 0x0; in w100_pwm_setup()
1259 w100_pwr_state.pll_cntl.f.pll_pecc_scon = 0x0; in w100_pwm_setup()
1260 w100_pwr_state.pll_cntl.f.pll_dactal = 0x0; /* Hi-Z */ in w100_pwm_setup()
1261 w100_pwr_state.pll_cntl.f.pll_cp_clip = 0x3; in w100_pwm_setup()
1262 w100_pwr_state.pll_cntl.f.pll_conf = 0x2; in w100_pwm_setup()
1263 w100_pwr_state.pll_cntl.f.pll_mbctrl = 0x2; in w100_pwm_setup()
1264 w100_pwr_state.pll_cntl.f.pll_ring_off = 0x0; in w100_pwm_setup()
1267 w100_pwr_state.pwrmgt_cntl.f.pwm_enable = 0x0; in w100_pwm_setup()
1268 w100_pwr_state.pwrmgt_cntl.f.pwm_mode_req = 0x1; /* normal mode (0, 1, 3) */ in w100_pwm_setup()
1269 w100_pwr_state.pwrmgt_cntl.f.pwm_wakeup_cond = 0x0; in w100_pwm_setup()
1270 w100_pwr_state.pwrmgt_cntl.f.pwm_fast_noml_hw_en = 0x0; in w100_pwm_setup()
1271 w100_pwr_state.pwrmgt_cntl.f.pwm_noml_fast_hw_en = 0x0; in w100_pwm_setup()
1272 w100_pwr_state.pwrmgt_cntl.f.pwm_fast_noml_cond = 0x1; /* PM4,ENG */ in w100_pwm_setup()
1273 w100_pwr_state.pwrmgt_cntl.f.pwm_noml_fast_cond = 0x1; /* PM4,ENG */ in w100_pwm_setup()
1274 w100_pwr_state.pwrmgt_cntl.f.pwm_idle_timer = 0xFF; in w100_pwm_setup()
1275 w100_pwr_state.pwrmgt_cntl.f.pwm_busy_timer = 0xFF; in w100_pwm_setup()
1292 w100_pwr_state.sclk_cntl.f.sclk_src_sel = mode->sysclk_src; in w100_init_clocks()
1293 w100_pwr_state.sclk_cntl.f.sclk_post_div_fast = mode->sysclk_divider; in w100_init_clocks()
1294 w100_pwr_state.sclk_cntl.f.sclk_post_div_slow = mode->sysclk_divider; in w100_init_clocks()
1312 active_h_disp.f.active_h_start=mode->left_margin; in w100_init_lcd()
1313 active_h_disp.f.active_h_end=mode->left_margin + mode->xres; in w100_init_lcd()
1317 active_v_disp.f.active_v_start=mode->upper_margin; in w100_init_lcd()
1318 active_v_disp.f.active_v_end=mode->upper_margin + mode->yres; in w100_init_lcd()
1322 graphic_h_disp.f.graphic_h_start=mode->left_margin; in w100_init_lcd()
1323 graphic_h_disp.f.graphic_h_end=mode->left_margin + mode->xres; in w100_init_lcd()
1327 graphic_v_disp.f.graphic_v_start=mode->upper_margin; in w100_init_lcd()
1328 graphic_v_disp.f.graphic_v_end=mode->upper_margin + mode->yres; in w100_init_lcd()
1332 crtc_total.f.crtc_h_total=mode->left_margin + mode->xres + mode->right_margin; in w100_init_lcd()
1333 crtc_total.f.crtc_v_total=mode->upper_margin + mode->yres + mode->lower_margin; in w100_init_lcd()
1376 intmem_location.f.mc_fb_start = W100_FB_BASE >> 8; in w100_setup_memory()
1377 intmem_location.f.mc_fb_top = (W100_FB_BASE+MEM_INT_SIZE) >> 8; in w100_setup_memory()
1382 extmem_location.f.mc_ext_mem_start = MEM_EXT_BASE_VALUE >> 8; in w100_setup_memory()
1383 extmem_location.f.mc_ext_mem_top = (MEM_EXT_BASE_VALUE-1) >> 8; in w100_setup_memory()
1387 intmem_location.f.mc_fb_start = MEM_INT_BASE_VALUE >> 8; in w100_setup_memory()
1388 intmem_location.f.mc_fb_top = (MEM_INT_BASE_VALUE+MEM_INT_SIZE) >> 8; in w100_setup_memory()
1392 extmem_location.f.mc_ext_mem_start = W100_FB_BASE >> 8; in w100_setup_memory()
1393 extmem_location.f.mc_ext_mem_top = (W100_FB_BASE+par->mach->mem->size) >> 8; in w100_setup_memory()
1496 w100_pwr_state.pclk_cntl.f.pclk_src_sel = par->mode->pixclk_src; in w100_set_dispregs()
1497 w100_pwr_state.pclk_cntl.f.pclk_post_div = divider; in w100_set_dispregs()
1521 hsync /= (w100_pwr_state.pclk_cntl.f.pclk_post_div + 1); in calc_hsync()
1525 par->hsync_len = hsync / (crtc_ss.f.ss_end-crtc_ss.f.ss_start); in calc_hsync()