189 		viafb_read_reg(VIACR, CR3F) & 0x0F;  in fp_id_to_vindex()
359 	viafb_write_reg_mask(CR79, VIACR, 0x07, BIT0 + BIT1 + BIT2);  in load_lcd_scaling()
374 				viafb_load_reg_num, reg, VIACR);  in load_lcd_scaling()
390 			viafb_write_reg_mask(CRA2, VIACR, 0xC0, BIT7 + BIT6);  in load_lcd_scaling()
395 				viafb_load_reg_num, reg, VIACR);  in load_lcd_scaling()
402 		viafb_write_reg_mask(CRA2, VIACR, 0x00, BIT7);  in load_lcd_scaling()
418 				viafb_load_reg_num, reg, VIACR);  in load_lcd_scaling()
434 			viafb_write_reg_mask(CRA2, VIACR, 0x08, BIT3);  in load_lcd_scaling()
439 				viafb_load_reg_num, reg, VIACR);  in load_lcd_scaling()
446 		viafb_write_reg_mask(CRA2, VIACR, 0x00, BIT3);  in load_lcd_scaling()
462 				viafb_write_reg(CR66, VIACR, cr66);  in via_pitch_alignment_patch_lcd()
463 				cr67 = viafb_read_reg(VIACR, CR67) & 0xFC;  in via_pitch_alignment_patch_lcd()
467 				viafb_write_reg(CR67, VIACR, cr67);  in via_pitch_alignment_patch_lcd()
471 			cr67 = viafb_read_reg(VIACR, CR67) & 0xF3;  in via_pitch_alignment_patch_lcd()
473 			viafb_write_reg(CR67, VIACR, cr67);  in via_pitch_alignment_patch_lcd()
476 			viafb_write_reg(CR65, VIACR, cr65);  in via_pitch_alignment_patch_lcd()
480 				viafb_write_reg(CR13, VIACR, cr13);  in via_pitch_alignment_patch_lcd()
481 				cr35 = viafb_read_reg(VIACR, CR35) & 0x1F;  in via_pitch_alignment_patch_lcd()
485 				viafb_write_reg(CR35, VIACR, cr35);  in via_pitch_alignment_patch_lcd()
533 			viafb_write_reg_mask(CR99, VIACR, 0x08,  in lcd_patch_skew()
576 			via_write_reg_mask(VIACR, 0x79, 0x00,  in viafb_lcd_set_mode()
599 		viafb_write_reg_mask(CR6A, VIACR, 0x01, BIT0);  in viafb_lcd_set_mode()
622 		viafb_write_reg_mask(CRD4, VIACR, 0, BIT1);  in integrated_lvds_disable()
625 		viafb_write_reg_mask(CRD3, VIACR, 0xC0, BIT6 + BIT7);  in integrated_lvds_disable()
631 		viafb_write_reg_mask(CR6A, VIACR, 0, BIT3);  in integrated_lvds_disable()
634 		viafb_write_reg_mask(CR91, VIACR, 0xC0, BIT6 + BIT7);  in integrated_lvds_disable()
641 			viafb_write_reg_mask(CRD2, VIACR, 0x80, BIT7);  in integrated_lvds_disable()
647 			viafb_write_reg_mask(CRD2, VIACR, 0x40, BIT6);  in integrated_lvds_disable()
653 			viafb_write_reg_mask(CRD2, VIACR, 0xC0, BIT6 + BIT7);  in integrated_lvds_disable()
666 		viafb_write_reg_mask(CRD2, VIACR, 0x00, BIT0 + BIT1);  in integrated_lvds_enable()
668 		viafb_write_reg_mask(CRD2, VIACR, 0x03, BIT0 + BIT1);  in integrated_lvds_enable()
675 		viafb_write_reg_mask(CR91, VIACR, 0, BIT0);  in integrated_lvds_enable()
677 		viafb_write_reg_mask(CR91, VIACR, 0, BIT6 + BIT7);  in integrated_lvds_enable()
679 		viafb_write_reg_mask(CR6A, VIACR, 0x08, BIT3);  in integrated_lvds_enable()
684 		viafb_write_reg_mask(CRD3, VIACR, 0, BIT0);  in integrated_lvds_enable()
686 		viafb_write_reg_mask(CRD3, VIACR, 0, BIT6 + BIT7);  in integrated_lvds_enable()
688 		viafb_write_reg_mask(CRD4, VIACR, 0x02, BIT1);  in integrated_lvds_enable()
696 			viafb_write_reg_mask(CRD2, VIACR, 0, BIT7);  in integrated_lvds_enable()
702 			viafb_write_reg_mask(CRD2, VIACR, 0, BIT6);  in integrated_lvds_enable()
708 			viafb_write_reg_mask(CRD2, VIACR, 0, BIT6 + BIT7);  in integrated_lvds_enable()
743 		viafb_write_reg_mask(CR91, VIACR, 0x80, 0x80);  in viafb_lcd_disable()
747 	viafb_write_reg_mask(CR79, VIACR, 0x00, 0x01);  in viafb_lcd_disable()
749 	viafb_write_reg_mask(CR6B, VIACR, 0x00, 0x08);  in viafb_lcd_disable()
759 			viafb_write_reg_mask(CR97, VIACR, 0x84,  in set_lcd_output_path()
766 			viafb_write_reg(CR91, VIACR, 0x00);  in set_lcd_output_path()
773 	viafb_write_reg_mask(CR6B, VIACR, 0x00, BIT3);  in viafb_lcd_enable()
774 	viafb_write_reg_mask(CR6A, VIACR, 0x08, BIT3);  in viafb_lcd_enable()
808 		viafb_write_reg_mask(CR91, VIACR, 0x00, 0x80);  in viafb_lcd_enable()
810 		viafb_write_reg_mask(CR6A, VIACR, 0x48, 0x48);  in viafb_lcd_enable()
819 	viafb_write_reg_mask(CR91, VIACR, 0x11, 0x11);  in lcd_powersequence_off()
824 		viafb_write_reg_mask(CR91, VIACR, (u8) data, (u8) mask);  in lcd_powersequence_off()
829 	viafb_write_reg_mask(CR6A, VIACR, 0x00, 0x08);  in lcd_powersequence_off()
837 	viafb_write_reg_mask(CR91, VIACR, 0x11, 0x11);  in lcd_powersequence_on()
840 	viafb_write_reg_mask(CR6A, VIACR, 0x08, 0x08);  in lcd_powersequence_on()
845 		viafb_write_reg_mask(CR91, VIACR, (u8) data, (u8) mask);  in lcd_powersequence_on()
861 	viafb_write_reg_mask(CR88, VIACR, (bdithering | bdual), BIT4 + BIT0);  in fill_lcd_format()