370 	struct io_register reg[IGA2_SHADOW_HOR_TOTAL_REG_NUM];  member
376 	struct io_register reg[IGA2_SHADOW_HOR_BLANK_END_REG_NUM];  member
382 	struct io_register reg[IGA2_SHADOW_VER_TOTAL_REG_NUM];  member
388 	struct io_register reg[IGA2_SHADOW_VER_ADDR_REG_NUM];  member
394 	struct io_register reg[IGA2_SHADOW_VER_BLANK_START_REG_NUM];  member
400 	struct io_register reg[IGA2_SHADOW_VER_BLANK_END_REG_NUM];  member
406 	struct io_register reg[IGA2_SHADOW_VER_SYNC_START_REG_NUM];  member
412 	struct io_register reg[IGA2_SHADOW_VER_SYNC_END_REG_NUM];  member
418 	struct io_register reg[IGA1_FETCH_COUNT_REG_NUM];  member
424 	struct io_register reg[IGA2_FETCH_COUNT_REG_NUM];  member
435 	struct io_register reg[IGA1_STARTING_ADDR_REG_NUM];  member
440 	struct io_register reg[IGA2_STARTING_ADDR_REG_NUM];  member
451 	struct io_register reg[LCD_POWER_SEQ_TD0_REG_NUM];  member
456 	struct io_register reg[LCD_POWER_SEQ_TD1_REG_NUM];  member
461 	struct io_register reg[LCD_POWER_SEQ_TD2_REG_NUM];  member
466 	struct io_register reg[LCD_POWER_SEQ_TD3_REG_NUM];  member
479 	struct io_register reg[LCD_HOR_SCALING_FACTOR_REG_NUM];  member
484 	struct io_register reg[LCD_VER_SCALING_FACTOR_REG_NUM];  member
515 	struct io_register reg[IGA1_FIFO_DEPTH_SELECT_REG_NUM];  member
520 	struct io_register reg[IGA1_FIFO_THRESHOLD_REG_NUM];  member
525 	struct io_register reg[IGA1_FIFO_HIGH_THRESHOLD_REG_NUM];  member
530 	struct io_register reg[IGA1_DISPLAY_QUEUE_EXPIRE_NUM_REG_NUM];  member
535 	struct io_register reg[IGA2_FIFO_DEPTH_SELECT_REG_NUM];  member
540 	struct io_register reg[IGA2_FIFO_THRESHOLD_REG_NUM];  member
545 	struct io_register reg[IGA2_FIFO_HIGH_THRESHOLD_REG_NUM];  member
550 	struct io_register reg[IGA2_DISPLAY_QUEUE_EXPIRE_NUM_REG_NUM];  member