181 static inline u32 __sst_read(u8 __iomem *vbase, u32 reg)  in __sst_read()  argument
183 	u32 ret = readl(vbase + reg);  in __sst_read()
188 static inline void __sst_write(u8 __iomem *vbase, u32 reg, u32 val)  in __sst_write()  argument
191 	writel(val, vbase + reg);  in __sst_write()
194 static inline void __sst_set_bits(u8 __iomem *vbase, u32 reg, u32 val)  in __sst_set_bits()  argument
197 	__sst_write(vbase, reg, __sst_read(vbase, reg) | val);  in __sst_set_bits()
200 static inline void __sst_unset_bits(u8 __iomem *vbase, u32 reg, u32 val)  in __sst_unset_bits()  argument
203 	__sst_write(vbase, reg, __sst_read(vbase, reg) & ~val);  in __sst_unset_bits()
215 static int __sst_wait_idle(u8 __iomem *vbase)  in __sst_wait_idle()  argument
222 		if (__sst_read(vbase, STATUS) & STATUS_FBI_BUSY) {  in __sst_wait_idle()
240 static u8 __sst_dac_read(u8 __iomem *vbase, u8 reg)  in __sst_dac_read()  argument
245 	__sst_write(vbase, DAC_DATA, ((u32)reg << 8) | DAC_READ_CMD );  in __sst_dac_read()
246 	__sst_wait_idle(vbase);  in __sst_dac_read()
248 	ret = __sst_read(vbase, DAC_READ) & 0xff;  in __sst_dac_read()
254 static void __sst_dac_write(u8 __iomem *vbase, u8 reg, u8 val)  in __sst_dac_write()  argument
258 	__sst_write(vbase, DAC_DATA,(((u32)reg << 8)) | (u32)val);  in __sst_dac_write()
259 	__sst_wait_idle(vbase);  in __sst_dac_write()
263 static u32 __dac_i_read(u8 __iomem *vbase, u8 reg)  in __dac_i_read()  argument
267 	__sst_dac_write(vbase, DACREG_ADDR_I, reg);  in __dac_i_read()
268 	ret = __sst_dac_read(vbase, DACREG_DATA_I);  in __dac_i_read()
272 static void __dac_i_write(u8 __iomem *vbase, u8 reg,u8 val)  in __dac_i_write()  argument
275 	__sst_dac_write(vbase, DACREG_ADDR_I, reg);  in __dac_i_write()
276 	__sst_dac_write(vbase, DACREG_DATA_I, val);  in __dac_i_write()