Lines Matching refs:savage_in32
262 while ((savage_in32(0x48C00, par) & 0x0000ffff) > slots); in savage3D_waitfifo()
270 while ((savage_in32(0x48C60, par) & 0x001fffff) > slots); in savage4_waitfifo()
278 while ((savage_in32(0x48C60, par) & 0x0000ffff) > slots); in savage2000_waitfifo()
285 while ((savage_in32(0x48C00, par) & 0x0008ffff) != 0x80000); in savage3D_waitidle()
291 while ((savage_in32(0x48C60, par) & 0x00a00000) != 0x00a00000); in savage4_waitidle()
297 while ((savage_in32(0x48C60, par) & 0x009fffff)); in savage2000_waitidle()
314 savage_out32(0x48C18, savage_in32(0x48C18, par) & 0x3FF0, par); in SavageSetup2DEngine()
323 savage_out32(0x48C18, savage_in32(0x48C18, par) | 0x0C, par); in SavageSetup2DEngine()
331 savage_out32(0x48C18, savage_in32(0x48C18, par) & 0x3FF0, par); in SavageSetup2DEngine()
336 savage_out32(0x48C18, savage_in32(0x48C18, par) | 0x08, par); in SavageSetup2DEngine()
348 savage_out32(0x48C18, savage_in32(0x48C18, par) | 0x00280000, in SavageSetup2DEngine()
680 reg->MMPR0 = savage_in32(FIFO_CONTROL_REG, par); in savage_get_default_par()
681 reg->MMPR1 = savage_in32(MIU_CONTROL_REG, par); in savage_get_default_par()
682 reg->MMPR2 = savage_in32(STREAMS_TIMEOUT_REG, par); in savage_get_default_par()
683 reg->MMPR3 = savage_in32(MISC_TIMEOUT_REG, par); in savage_get_default_par()