Lines Matching refs:plane
249 static unsigned long dispc_plane_pclk_rate(enum omap_plane plane);
250 static unsigned long dispc_plane_lclk_rate(enum omap_plane plane);
590 enum omap_plane plane = OMAP_DSS_WB; in dispc_wb_go() local
593 enable = REG_GET(DISPC_OVL_ATTRIBUTES(plane), 0, 0) == 1; in dispc_wb_go()
607 static void dispc_ovl_write_firh_reg(enum omap_plane plane, int reg, u32 value) in dispc_ovl_write_firh_reg() argument
609 dispc_write_reg(DISPC_OVL_FIR_COEF_H(plane, reg), value); in dispc_ovl_write_firh_reg()
612 static void dispc_ovl_write_firhv_reg(enum omap_plane plane, int reg, u32 value) in dispc_ovl_write_firhv_reg() argument
614 dispc_write_reg(DISPC_OVL_FIR_COEF_HV(plane, reg), value); in dispc_ovl_write_firhv_reg()
617 static void dispc_ovl_write_firv_reg(enum omap_plane plane, int reg, u32 value) in dispc_ovl_write_firv_reg() argument
619 dispc_write_reg(DISPC_OVL_FIR_COEF_V(plane, reg), value); in dispc_ovl_write_firv_reg()
622 static void dispc_ovl_write_firh2_reg(enum omap_plane plane, int reg, u32 value) in dispc_ovl_write_firh2_reg() argument
624 BUG_ON(plane == OMAP_DSS_GFX); in dispc_ovl_write_firh2_reg()
626 dispc_write_reg(DISPC_OVL_FIR_COEF_H2(plane, reg), value); in dispc_ovl_write_firh2_reg()
629 static void dispc_ovl_write_firhv2_reg(enum omap_plane plane, int reg, in dispc_ovl_write_firhv2_reg() argument
632 BUG_ON(plane == OMAP_DSS_GFX); in dispc_ovl_write_firhv2_reg()
634 dispc_write_reg(DISPC_OVL_FIR_COEF_HV2(plane, reg), value); in dispc_ovl_write_firhv2_reg()
637 static void dispc_ovl_write_firv2_reg(enum omap_plane plane, int reg, u32 value) in dispc_ovl_write_firv2_reg() argument
639 BUG_ON(plane == OMAP_DSS_GFX); in dispc_ovl_write_firv2_reg()
641 dispc_write_reg(DISPC_OVL_FIR_COEF_V2(plane, reg), value); in dispc_ovl_write_firv2_reg()
644 static void dispc_ovl_set_scale_coef(enum omap_plane plane, int fir_hinc, in dispc_ovl_set_scale_coef() argument
667 dispc_ovl_write_firh_reg(plane, i, h); in dispc_ovl_set_scale_coef()
668 dispc_ovl_write_firhv_reg(plane, i, hv); in dispc_ovl_set_scale_coef()
670 dispc_ovl_write_firh2_reg(plane, i, h); in dispc_ovl_set_scale_coef()
671 dispc_ovl_write_firhv2_reg(plane, i, hv); in dispc_ovl_set_scale_coef()
682 dispc_ovl_write_firv_reg(plane, i, v); in dispc_ovl_set_scale_coef()
684 dispc_ovl_write_firv2_reg(plane, i, v); in dispc_ovl_set_scale_coef()
690 static void dispc_ovl_write_color_conv_coef(enum omap_plane plane, in dispc_ovl_write_color_conv_coef() argument
695 dispc_write_reg(DISPC_OVL_CONV_COEF(plane, 0), CVAL(ct->rcr, ct->ry)); in dispc_ovl_write_color_conv_coef()
696 dispc_write_reg(DISPC_OVL_CONV_COEF(plane, 1), CVAL(ct->gy, ct->rcb)); in dispc_ovl_write_color_conv_coef()
697 dispc_write_reg(DISPC_OVL_CONV_COEF(plane, 2), CVAL(ct->gcb, ct->gcr)); in dispc_ovl_write_color_conv_coef()
698 dispc_write_reg(DISPC_OVL_CONV_COEF(plane, 3), CVAL(ct->bcr, ct->by)); in dispc_ovl_write_color_conv_coef()
699 dispc_write_reg(DISPC_OVL_CONV_COEF(plane, 4), CVAL(0, ct->bcb)); in dispc_ovl_write_color_conv_coef()
701 REG_FLD_MOD(DISPC_OVL_ATTRIBUTES(plane), ct->full_range, 11, 11); in dispc_ovl_write_color_conv_coef()
725 static void dispc_ovl_set_ba0(enum omap_plane plane, u32 paddr) in dispc_ovl_set_ba0() argument
727 dispc_write_reg(DISPC_OVL_BA0(plane), paddr); in dispc_ovl_set_ba0()
730 static void dispc_ovl_set_ba1(enum omap_plane plane, u32 paddr) in dispc_ovl_set_ba1() argument
732 dispc_write_reg(DISPC_OVL_BA1(plane), paddr); in dispc_ovl_set_ba1()
735 static void dispc_ovl_set_ba0_uv(enum omap_plane plane, u32 paddr) in dispc_ovl_set_ba0_uv() argument
737 dispc_write_reg(DISPC_OVL_BA0_UV(plane), paddr); in dispc_ovl_set_ba0_uv()
740 static void dispc_ovl_set_ba1_uv(enum omap_plane plane, u32 paddr) in dispc_ovl_set_ba1_uv() argument
742 dispc_write_reg(DISPC_OVL_BA1_UV(plane), paddr); in dispc_ovl_set_ba1_uv()
745 static void dispc_ovl_set_pos(enum omap_plane plane, in dispc_ovl_set_pos() argument
755 dispc_write_reg(DISPC_OVL_POSITION(plane), val); in dispc_ovl_set_pos()
758 static void dispc_ovl_set_input_size(enum omap_plane plane, int width, in dispc_ovl_set_input_size() argument
763 if (plane == OMAP_DSS_GFX || plane == OMAP_DSS_WB) in dispc_ovl_set_input_size()
764 dispc_write_reg(DISPC_OVL_SIZE(plane), val); in dispc_ovl_set_input_size()
766 dispc_write_reg(DISPC_OVL_PICTURE_SIZE(plane), val); in dispc_ovl_set_input_size()
769 static void dispc_ovl_set_output_size(enum omap_plane plane, int width, in dispc_ovl_set_output_size() argument
774 BUG_ON(plane == OMAP_DSS_GFX); in dispc_ovl_set_output_size()
778 if (plane == OMAP_DSS_WB) in dispc_ovl_set_output_size()
779 dispc_write_reg(DISPC_OVL_PICTURE_SIZE(plane), val); in dispc_ovl_set_output_size()
781 dispc_write_reg(DISPC_OVL_SIZE(plane), val); in dispc_ovl_set_output_size()
784 static void dispc_ovl_set_zorder(enum omap_plane plane, in dispc_ovl_set_zorder() argument
790 REG_FLD_MOD(DISPC_OVL_ATTRIBUTES(plane), zorder, 27, 26); in dispc_ovl_set_zorder()
804 static void dispc_ovl_set_pre_mult_alpha(enum omap_plane plane, in dispc_ovl_set_pre_mult_alpha() argument
810 REG_FLD_MOD(DISPC_OVL_ATTRIBUTES(plane), enable ? 1 : 0, 28, 28); in dispc_ovl_set_pre_mult_alpha()
813 static void dispc_ovl_setup_global_alpha(enum omap_plane plane, in dispc_ovl_setup_global_alpha() argument
822 shift = shifts[plane]; in dispc_ovl_setup_global_alpha()
826 static void dispc_ovl_set_pix_inc(enum omap_plane plane, s32 inc) in dispc_ovl_set_pix_inc() argument
828 dispc_write_reg(DISPC_OVL_PIXEL_INC(plane), inc); in dispc_ovl_set_pix_inc()
831 static void dispc_ovl_set_row_inc(enum omap_plane plane, s32 inc) in dispc_ovl_set_row_inc() argument
833 dispc_write_reg(DISPC_OVL_ROW_INC(plane), inc); in dispc_ovl_set_row_inc()
836 static void dispc_ovl_set_color_mode(enum omap_plane plane, in dispc_ovl_set_color_mode() argument
840 if (plane != OMAP_DSS_GFX) { in dispc_ovl_set_color_mode()
914 REG_FLD_MOD(DISPC_OVL_ATTRIBUTES(plane), m, 4, 1); in dispc_ovl_set_color_mode()
917 static void dispc_ovl_configure_burst_type(enum omap_plane plane, in dispc_ovl_configure_burst_type() argument
924 REG_FLD_MOD(DISPC_OVL_ATTRIBUTES(plane), 1, 29, 29); in dispc_ovl_configure_burst_type()
926 REG_FLD_MOD(DISPC_OVL_ATTRIBUTES(plane), 0, 29, 29); in dispc_ovl_configure_burst_type()
929 void dispc_ovl_set_channel_out(enum omap_plane plane, enum omap_channel channel) in dispc_ovl_set_channel_out() argument
935 switch (plane) { in dispc_ovl_set_channel_out()
949 val = dispc_read_reg(DISPC_OVL_ATTRIBUTES(plane)); in dispc_ovl_set_channel_out()
983 dispc_write_reg(DISPC_OVL_ATTRIBUTES(plane), val); in dispc_ovl_set_channel_out()
987 static enum omap_channel dispc_ovl_get_channel_out(enum omap_plane plane) in dispc_ovl_get_channel_out() argument
993 switch (plane) { in dispc_ovl_get_channel_out()
1007 val = dispc_read_reg(DISPC_OVL_ATTRIBUTES(plane)); in dispc_ovl_get_channel_out()
1030 enum omap_plane plane = OMAP_DSS_WB; in dispc_wb_set_channel_in() local
1032 REG_FLD_MOD(DISPC_OVL_ATTRIBUTES(plane), channel, 18, 16); in dispc_wb_set_channel_in()
1035 static void dispc_ovl_set_burst_size(enum omap_plane plane, in dispc_ovl_set_burst_size() argument
1041 shift = shifts[plane]; in dispc_ovl_set_burst_size()
1042 REG_FLD_MOD(DISPC_OVL_ATTRIBUTES(plane), burst_size, shift + 1, shift); in dispc_ovl_set_burst_size()
1055 static u32 dispc_ovl_get_burst_size(enum omap_plane plane) in dispc_ovl_get_burst_size() argument
1104 static void dispc_ovl_set_vid_color_conv(enum omap_plane plane, bool enable) in dispc_ovl_set_vid_color_conv() argument
1108 BUG_ON(plane == OMAP_DSS_GFX); in dispc_ovl_set_vid_color_conv()
1110 val = dispc_read_reg(DISPC_OVL_ATTRIBUTES(plane)); in dispc_ovl_set_vid_color_conv()
1112 dispc_write_reg(DISPC_OVL_ATTRIBUTES(plane), val); in dispc_ovl_set_vid_color_conv()
1115 static void dispc_ovl_enable_replication(enum omap_plane plane, in dispc_ovl_enable_replication() argument
1124 shift = shifts[plane]; in dispc_ovl_enable_replication()
1125 REG_FLD_MOD(DISPC_OVL_ATTRIBUTES(plane), enable, shift, shift); in dispc_ovl_enable_replication()
1201 static u32 dispc_ovl_get_fifo_size(enum omap_plane plane) in dispc_ovl_get_fifo_size() argument
1207 if (dispc.fifo_assignment[fifo] == plane) in dispc_ovl_get_fifo_size()
1214 void dispc_ovl_set_fifo_threshold(enum omap_plane plane, u32 low, u32 high) in dispc_ovl_set_fifo_threshold() argument
1231 plane, in dispc_ovl_set_fifo_threshold()
1232 REG_GET(DISPC_OVL_FIFO_THRESHOLD(plane), in dispc_ovl_set_fifo_threshold()
1234 REG_GET(DISPC_OVL_FIFO_THRESHOLD(plane), in dispc_ovl_set_fifo_threshold()
1238 dispc_write_reg(DISPC_OVL_FIFO_THRESHOLD(plane), in dispc_ovl_set_fifo_threshold()
1248 plane != OMAP_DSS_WB) in dispc_ovl_set_fifo_threshold()
1249 dispc_write_reg(DISPC_OVL_PRELOAD(plane), min(high, 0xfffu)); in dispc_ovl_set_fifo_threshold()
1264 void dispc_ovl_compute_fifo_thresholds(enum omap_plane plane, in dispc_ovl_compute_fifo_thresholds() argument
1277 burst_size = dispc_ovl_get_burst_size(plane); in dispc_ovl_compute_fifo_thresholds()
1278 ovl_fifo_size = dispc_ovl_get_fifo_size(plane); in dispc_ovl_compute_fifo_thresholds()
1297 } else if (plane == OMAP_DSS_WB) { in dispc_ovl_compute_fifo_thresholds()
1312 static void dispc_ovl_set_mflag(enum omap_plane plane, bool enable) in dispc_ovl_set_mflag() argument
1316 if (plane == OMAP_DSS_GFX) in dispc_ovl_set_mflag()
1321 REG_FLD_MOD(DISPC_OVL_ATTRIBUTES(plane), enable, bit, bit); in dispc_ovl_set_mflag()
1324 static void dispc_ovl_set_mflag_threshold(enum omap_plane plane, in dispc_ovl_set_mflag_threshold() argument
1327 dispc_write_reg(DISPC_OVL_MFLAG_THRESHOLD(plane), in dispc_ovl_set_mflag_threshold()
1369 static void dispc_ovl_set_fir(enum omap_plane plane, in dispc_ovl_set_fir() argument
1385 dispc_write_reg(DISPC_OVL_FIR(plane), val); in dispc_ovl_set_fir()
1388 dispc_write_reg(DISPC_OVL_FIR2(plane), val); in dispc_ovl_set_fir()
1392 static void dispc_ovl_set_vid_accu0(enum omap_plane plane, int haccu, int vaccu) in dispc_ovl_set_vid_accu0() argument
1403 dispc_write_reg(DISPC_OVL_ACCU0(plane), val); in dispc_ovl_set_vid_accu0()
1406 static void dispc_ovl_set_vid_accu1(enum omap_plane plane, int haccu, int vaccu) in dispc_ovl_set_vid_accu1() argument
1417 dispc_write_reg(DISPC_OVL_ACCU1(plane), val); in dispc_ovl_set_vid_accu1()
1420 static void dispc_ovl_set_vid_accu2_0(enum omap_plane plane, int haccu, in dispc_ovl_set_vid_accu2_0() argument
1426 dispc_write_reg(DISPC_OVL_ACCU2_0(plane), val); in dispc_ovl_set_vid_accu2_0()
1429 static void dispc_ovl_set_vid_accu2_1(enum omap_plane plane, int haccu, in dispc_ovl_set_vid_accu2_1() argument
1435 dispc_write_reg(DISPC_OVL_ACCU2_1(plane), val); in dispc_ovl_set_vid_accu2_1()
1438 static void dispc_ovl_set_scale_param(enum omap_plane plane, in dispc_ovl_set_scale_param() argument
1449 dispc_ovl_set_scale_coef(plane, fir_hinc, fir_vinc, five_taps, in dispc_ovl_set_scale_param()
1451 dispc_ovl_set_fir(plane, fir_hinc, fir_vinc, color_comp); in dispc_ovl_set_scale_param()
1454 static void dispc_ovl_set_accu_uv(enum omap_plane plane, in dispc_ovl_set_accu_uv() argument
1538 dispc_ovl_set_vid_accu2_0(plane, h_accu2_0, v_accu2_0); in dispc_ovl_set_accu_uv()
1539 dispc_ovl_set_vid_accu2_1(plane, h_accu2_1, v_accu2_1); in dispc_ovl_set_accu_uv()
1542 static void dispc_ovl_set_scaling_common(enum omap_plane plane, in dispc_ovl_set_scaling_common() argument
1553 dispc_ovl_set_scale_param(plane, orig_width, orig_height, in dispc_ovl_set_scaling_common()
1556 l = dispc_read_reg(DISPC_OVL_ATTRIBUTES(plane)); in dispc_ovl_set_scaling_common()
1577 dispc_write_reg(DISPC_OVL_ATTRIBUTES(plane), l); in dispc_ovl_set_scaling_common()
1592 dispc_ovl_set_vid_accu0(plane, 0, accu0); in dispc_ovl_set_scaling_common()
1593 dispc_ovl_set_vid_accu1(plane, 0, accu1); in dispc_ovl_set_scaling_common()
1596 static void dispc_ovl_set_scaling_uv(enum omap_plane plane, in dispc_ovl_set_scaling_uv() argument
1605 bool chroma_upscale = plane != OMAP_DSS_WB ? true : false; in dispc_ovl_set_scaling_uv()
1613 if (plane != OMAP_DSS_WB) in dispc_ovl_set_scaling_uv()
1614 REG_FLD_MOD(DISPC_OVL_ATTRIBUTES2(plane), 0, 8, 8); in dispc_ovl_set_scaling_uv()
1618 dispc_ovl_set_accu_uv(plane, orig_width, orig_height, out_width, in dispc_ovl_set_scaling_uv()
1662 dispc_ovl_set_scale_param(plane, orig_width, orig_height, in dispc_ovl_set_scaling_uv()
1666 if (plane != OMAP_DSS_WB) in dispc_ovl_set_scaling_uv()
1667 REG_FLD_MOD(DISPC_OVL_ATTRIBUTES2(plane), in dispc_ovl_set_scaling_uv()
1671 REG_FLD_MOD(DISPC_OVL_ATTRIBUTES(plane), scale_x ? 1 : 0, 5, 5); in dispc_ovl_set_scaling_uv()
1673 REG_FLD_MOD(DISPC_OVL_ATTRIBUTES(plane), scale_y ? 1 : 0, 6, 6); in dispc_ovl_set_scaling_uv()
1676 static void dispc_ovl_set_scaling(enum omap_plane plane, in dispc_ovl_set_scaling() argument
1683 BUG_ON(plane == OMAP_DSS_GFX); in dispc_ovl_set_scaling()
1685 dispc_ovl_set_scaling_common(plane, in dispc_ovl_set_scaling()
1692 dispc_ovl_set_scaling_uv(plane, in dispc_ovl_set_scaling()
1700 static void dispc_ovl_set_rotation_attrs(enum omap_plane plane, u8 rotation, in dispc_ovl_set_rotation_attrs() argument
1757 REG_FLD_MOD(DISPC_OVL_ATTRIBUTES(plane), vidrot, 13, 12); in dispc_ovl_set_rotation_attrs()
1759 REG_FLD_MOD(DISPC_OVL_ATTRIBUTES(plane), in dispc_ovl_set_rotation_attrs()
1767 REG_FLD_MOD(DISPC_OVL_ATTRIBUTES(plane), doublestride, 22, 22); in dispc_ovl_set_rotation_attrs()
2511 int dispc_ovl_check(enum omap_plane plane, enum omap_channel channel, in dispc_ovl_check() argument
2516 enum omap_overlay_caps caps = dss_feat_get_overlay_caps(plane); in dispc_ovl_check()
2542 if (!dss_feat_color_mode_supported(plane, oi->color_mode)) in dispc_ovl_check()
2552 static int dispc_ovl_setup_common(enum omap_plane plane, in dispc_ovl_setup_common() argument
2573 unsigned long pclk = dispc_plane_pclk_rate(plane); in dispc_ovl_setup_common()
2574 unsigned long lclk = dispc_plane_lclk_rate(plane); in dispc_ovl_setup_common()
2611 if (!dss_feat_color_mode_supported(plane, color_mode)) in dispc_ovl_setup_common()
2673 if (plane == OMAP_DSS_WB) { in dispc_ovl_setup_common()
2702 dispc_ovl_set_color_mode(plane, color_mode); in dispc_ovl_setup_common()
2704 dispc_ovl_configure_burst_type(plane, rotation_type); in dispc_ovl_setup_common()
2706 dispc_ovl_set_ba0(plane, paddr + offset0); in dispc_ovl_setup_common()
2707 dispc_ovl_set_ba1(plane, paddr + offset1); in dispc_ovl_setup_common()
2710 dispc_ovl_set_ba0_uv(plane, p_uv_addr + offset0); in dispc_ovl_setup_common()
2711 dispc_ovl_set_ba1_uv(plane, p_uv_addr + offset1); in dispc_ovl_setup_common()
2717 dispc_ovl_set_row_inc(plane, row_inc); in dispc_ovl_setup_common()
2718 dispc_ovl_set_pix_inc(plane, pix_inc); in dispc_ovl_setup_common()
2723 dispc_ovl_set_pos(plane, caps, pos_x, pos_y); in dispc_ovl_setup_common()
2725 dispc_ovl_set_input_size(plane, in_width, in_height); in dispc_ovl_setup_common()
2728 dispc_ovl_set_scaling(plane, in_width, in_height, out_width, in dispc_ovl_setup_common()
2731 dispc_ovl_set_output_size(plane, out_width, out_height); in dispc_ovl_setup_common()
2732 dispc_ovl_set_vid_color_conv(plane, cconv); in dispc_ovl_setup_common()
2735 dispc_ovl_set_rotation_attrs(plane, rotation, rotation_type, mirror, in dispc_ovl_setup_common()
2738 dispc_ovl_set_zorder(plane, caps, zorder); in dispc_ovl_setup_common()
2739 dispc_ovl_set_pre_mult_alpha(plane, caps, pre_mult_alpha); in dispc_ovl_setup_common()
2740 dispc_ovl_setup_global_alpha(plane, caps, global_alpha); in dispc_ovl_setup_common()
2742 dispc_ovl_enable_replication(plane, caps, replication); in dispc_ovl_setup_common()
2747 int dispc_ovl_setup(enum omap_plane plane, const struct omap_overlay_info *oi, in dispc_ovl_setup() argument
2752 enum omap_overlay_caps caps = dss_feat_get_overlay_caps(plane); in dispc_ovl_setup()
2755 channel = dispc_ovl_get_channel_out(plane); in dispc_ovl_setup()
2759 plane, &oi->paddr, &oi->p_uv_addr, oi->screen_width, oi->pos_x, in dispc_ovl_setup()
2763 r = dispc_ovl_setup_common(plane, caps, oi->paddr, oi->p_uv_addr, in dispc_ovl_setup()
2778 enum omap_plane plane = OMAP_DSS_WB; in dispc_wb_setup() local
2793 r = dispc_ovl_setup_common(plane, caps, wi->paddr, wi->p_uv_addr, in dispc_wb_setup()
2816 l = dispc_read_reg(DISPC_OVL_ATTRIBUTES(plane)); in dispc_wb_setup()
2819 dispc_write_reg(DISPC_OVL_ATTRIBUTES(plane), l); in dispc_wb_setup()
2824 int dispc_ovl_enable(enum omap_plane plane, bool enable) in dispc_ovl_enable() argument
2826 DSSDBG("dispc_enable_plane %d, %d\n", plane, enable); in dispc_ovl_enable()
2828 REG_FLD_MOD(DISPC_OVL_ATTRIBUTES(plane), enable ? 1 : 0, 0, 0); in dispc_ovl_enable()
2834 bool dispc_ovl_enabled(enum omap_plane plane) in dispc_ovl_enabled() argument
2836 return REG_GET(DISPC_OVL_ATTRIBUTES(plane), 0, 0); in dispc_ovl_enabled()
3356 static unsigned long dispc_plane_pclk_rate(enum omap_plane plane) in dispc_plane_pclk_rate() argument
3360 if (plane == OMAP_DSS_WB) in dispc_plane_pclk_rate()
3363 channel = dispc_ovl_get_channel_out(plane); in dispc_plane_pclk_rate()
3368 static unsigned long dispc_plane_lclk_rate(enum omap_plane plane) in dispc_plane_lclk_rate() argument
3372 if (plane == OMAP_DSS_WB) in dispc_plane_lclk_rate()
3375 channel = dispc_ovl_get_channel_out(plane); in dispc_plane_lclk_rate()
3560 #define DISPC_REG(plane, name, i) name(plane, i) in dispc_dump_regs() argument
3561 #define DUMPREG(plane, name, i) \ in dispc_dump_regs() argument
3562 seq_printf(s, "%s_%d(%s)%*s %08x\n", #name, i, p_names[plane], \ in dispc_dump_regs()
3563 (int)(46 - strlen(#name) - strlen(p_names[plane])), " ", \ in dispc_dump_regs()
3564 dispc_read_reg(DISPC_REG(plane, name, i))) in dispc_dump_regs()